SE9301007L - Bidirectional MOS switch - Google Patents

Bidirectional MOS switch

Info

Publication number
SE9301007L
SE9301007L SE9301007A SE9301007A SE9301007L SE 9301007 L SE9301007 L SE 9301007L SE 9301007 A SE9301007 A SE 9301007A SE 9301007 A SE9301007 A SE 9301007A SE 9301007 L SE9301007 L SE 9301007L
Authority
SE
Sweden
Prior art keywords
mos switch
contact
switch
type
layers
Prior art date
Application number
SE9301007A
Other languages
Swedish (sv)
Other versions
SE9301007D0 (en
SE501081C2 (en
Inventor
Per Svedberg
Original Assignee
Asea Brown Boveri
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asea Brown Boveri filed Critical Asea Brown Boveri
Priority to SE9301007A priority Critical patent/SE501081C2/en
Publication of SE9301007D0 publication Critical patent/SE9301007D0/en
Publication of SE9301007L publication Critical patent/SE9301007L/en
Publication of SE501081C2 publication Critical patent/SE501081C2/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)

Abstract

The MOS switch is formed in a semiconductor layer (2) on an insulating substrate (1), and includes two highly doped contact (3a, 3b) electrode areas (S1/D2, S2/D1). There are two MOS structures, with respective channel (6a, 6b) regions, of different conductivity to the contact regions, and control electrodes (8a, 8b). - There are n N-type layers (5) and n+1 P-type layers (4) arranged on top of one another, between the contact areas, where n is an integer greater than or equal to 1. The bottom and top layers (4a, 4b) are P-type. The switch is pref. formed on an insulator e.g. diamond, sapphire or silicon dioxide.
SE9301007A 1993-03-26 1993-03-26 Bidirectional MOS switch - includes multilayered structure, having alternate p=type and n=type layers, between two sets of contact and channel regions, with top and bottom p=type layers and one more p=type layer than n=type layer SE501081C2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
SE9301007A SE501081C2 (en) 1993-03-26 1993-03-26 Bidirectional MOS switch - includes multilayered structure, having alternate p=type and n=type layers, between two sets of contact and channel regions, with top and bottom p=type layers and one more p=type layer than n=type layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9301007A SE501081C2 (en) 1993-03-26 1993-03-26 Bidirectional MOS switch - includes multilayered structure, having alternate p=type and n=type layers, between two sets of contact and channel regions, with top and bottom p=type layers and one more p=type layer than n=type layer

Publications (3)

Publication Number Publication Date
SE9301007D0 SE9301007D0 (en) 1993-03-26
SE9301007L true SE9301007L (en) 1994-09-27
SE501081C2 SE501081C2 (en) 1994-11-07

Family

ID=20389370

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9301007A SE501081C2 (en) 1993-03-26 1993-03-26 Bidirectional MOS switch - includes multilayered structure, having alternate p=type and n=type layers, between two sets of contact and channel regions, with top and bottom p=type layers and one more p=type layer than n=type layer

Country Status (1)

Country Link
SE (1) SE501081C2 (en)

Also Published As

Publication number Publication date
SE9301007D0 (en) 1993-03-26
SE501081C2 (en) 1994-11-07

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