SE9201697D0 - Kvadratisk vaeljararkitektur - Google Patents

Kvadratisk vaeljararkitektur

Info

Publication number
SE9201697D0
SE9201697D0 SE9201697A SE9201697A SE9201697D0 SE 9201697 D0 SE9201697 D0 SE 9201697D0 SE 9201697 A SE9201697 A SE 9201697A SE 9201697 A SE9201697 A SE 9201697A SE 9201697 D0 SE9201697 D0 SE 9201697D0
Authority
SE
Sweden
Prior art keywords
output
quadratic
links
buffering level
switching
Prior art date
Application number
SE9201697A
Other languages
English (en)
Other versions
SE515177C2 (sv
SE9201697L (sv
Inventor
S Sandin
Original Assignee
Ellemtel Utvecklings Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ellemtel Utvecklings Ab filed Critical Ellemtel Utvecklings Ab
Priority to SE9201697A priority Critical patent/SE515177C2/sv
Publication of SE9201697D0 publication Critical patent/SE9201697D0/sv
Priority to US08/067,012 priority patent/US5471468A/en
Priority to AU43650/93A priority patent/AU670442B2/en
Priority to KR1019940704374A priority patent/KR100253517B1/ko
Priority to EP93913718A priority patent/EP0717901B1/en
Priority to BR9306457A priority patent/BR9306457A/pt
Priority to DE69333739T priority patent/DE69333739T2/de
Priority to PCT/SE1993/000474 priority patent/WO1993025032A1/en
Priority to MX9303190A priority patent/MX9303190A/es
Priority to CN93106792A priority patent/CN1081054A/zh
Publication of SE9201697L publication Critical patent/SE9201697L/sv
Priority to NO944468A priority patent/NO944468L/no
Priority to FI945646A priority patent/FI945646A/sv
Publication of SE515177C2 publication Critical patent/SE515177C2/sv

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/15—Interconnection of switching modules
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/10—Packet switching elements characterised by the switching fabric construction
    • H04L49/101—Packet switching elements characterised by the switching fabric construction using crossbar or matrix
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3027—Output queuing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
SE9201697A 1992-06-01 1992-06-01 Kvadratisk väljararkitektur SE515177C2 (sv)

Priority Applications (12)

Application Number Priority Date Filing Date Title
SE9201697A SE515177C2 (sv) 1992-06-01 1992-06-01 Kvadratisk väljararkitektur
US08/067,012 US5471468A (en) 1992-06-01 1993-05-26 Square switching architecture
PCT/SE1993/000474 WO1993025032A1 (en) 1992-06-01 1993-05-27 Square switching architecture
DE69333739T DE69333739T2 (de) 1992-06-01 1993-05-27 Quadratische vermittlungsarchitektur
KR1019940704374A KR100253517B1 (ko) 1992-06-01 1993-05-27 스위칭 아키텍쳐를 갖는 패킷 스위치
EP93913718A EP0717901B1 (en) 1992-06-01 1993-05-27 Square switching architecture
BR9306457A BR9306457A (pt) 1992-06-01 1993-05-27 Comutador compactado com uma arquitetura de ligação compreendendo uma rede cruzada de elos de ligação de entrada e saída
AU43650/93A AU670442B2 (en) 1992-06-01 1993-05-27 Square switching architecture
MX9303190A MX9303190A (es) 1992-06-01 1993-05-28 Arquitectura de conmutacion cuadrada.
CN93106792A CN1081054A (zh) 1992-06-01 1993-06-01 方形交换体系
NO944468A NO944468L (no) 1992-06-01 1994-11-22 Kvadratisk svitsjearkitektur
FI945646A FI945646A (sv) 1992-06-01 1994-11-30 Kvadratisk kopplingsarkitektur

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9201697A SE515177C2 (sv) 1992-06-01 1992-06-01 Kvadratisk väljararkitektur

Publications (3)

Publication Number Publication Date
SE9201697D0 true SE9201697D0 (sv) 1992-06-01
SE9201697L SE9201697L (sv) 1993-12-02
SE515177C2 SE515177C2 (sv) 2001-06-25

Family

ID=20386389

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9201697A SE515177C2 (sv) 1992-06-01 1992-06-01 Kvadratisk väljararkitektur

Country Status (11)

Country Link
US (1) US5471468A (sv)
EP (1) EP0717901B1 (sv)
KR (1) KR100253517B1 (sv)
CN (1) CN1081054A (sv)
AU (1) AU670442B2 (sv)
BR (1) BR9306457A (sv)
DE (1) DE69333739T2 (sv)
FI (1) FI945646A (sv)
MX (1) MX9303190A (sv)
SE (1) SE515177C2 (sv)
WO (1) WO1993025032A1 (sv)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5813040A (en) * 1995-12-29 1998-09-22 Gte Laboratories Inc Write controller for a CAM-based switch with lineraly searchable memory utilizing hardware-encoded status tags to indicate avaliablity of each memory location for writing
US5774463A (en) * 1995-12-29 1998-06-30 Gte Laboratories Incorporated Switching matrix with contention arbitration
US5862128A (en) * 1995-12-29 1999-01-19 Gte Laboratories Inc Merged buffer signal switch
US5872787A (en) * 1996-05-15 1999-02-16 Gte Laboratories Incorporated Distributed switch buffer utilizing cascaded modular switch chips
US6018523A (en) * 1997-10-22 2000-01-25 Lucent Technologies, Inc. Switching networks having improved layouts
US6360281B1 (en) * 1998-05-29 2002-03-19 3Com Corporation System and method for communicating with a serial communications device using multiple virtual ports
US6067267A (en) * 1998-08-12 2000-05-23 Toshiba America Electronic Components, Inc. Four-way interleaved FIFO architecture with look ahead conditional decoder for PCI applications
SE518427C2 (sv) 2000-01-21 2002-10-08 Gunnar Karlsson Förfarande och anordning för multiplexering av dataflöden
FR2832823A1 (fr) * 2001-11-23 2003-05-30 Koninkl Philips Electronics Nv Dispositif de commutation muni de moyens de tests integres

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE754135A (fr) * 1969-10-17 1970-12-31 Burroughs Corp Circuit selecteur a grande vitesse
US4165497A (en) * 1977-11-11 1979-08-21 Aiken Industries Inc. Wideband RF switching matrix
US4470139A (en) * 1981-12-28 1984-09-04 Northern Telecom Limited Switching network for use in a time division multiplex system
US4754451A (en) * 1986-08-06 1988-06-28 American Telephone And Telegraph Company, At&T Bell Laboratories N-by-N "knockout" switch for a high-performance packet switching system with variable length packets
US4817082A (en) * 1987-03-09 1989-03-28 American Telephone And Telegraph Company, At&T Bell Laboratories Crosspoint switching system using control rings with fast token circulation
CA1292054C (en) * 1987-05-15 1991-11-12 Hitachi, Ltd. Packet switching equipment and a packet switching method for controlling packet switched networks
JPH0683261B2 (ja) * 1987-05-26 1994-10-19 富士通株式会社 ヘッダ駆動形パケット交換機
DE3742748A1 (de) * 1987-12-17 1989-07-06 Philips Patentverwaltung Koppelfeld und koppelfeldsteuerung fuer einen vermittlungsknoten eines breitband-vermittlungssystems
DE3742941A1 (de) * 1987-12-18 1989-07-06 Standard Elektrik Lorenz Ag Einrichtungen zur paketvermittlung
SE462361B (sv) * 1988-03-30 1990-06-11 Ellemtel Utvecklings Ab Paketdatavaeljare
ATE103442T1 (de) * 1988-12-23 1994-04-15 Siemens Ag Modular erweiterbares digitales einstufiges koppelnetz in atm (asynchronous transfer mode) - technik fuer eine schnelle paketvermittelte informationsuebertragung.
JPH0758963B2 (ja) * 1989-01-27 1995-06-21 日本電気株式会社 セル交換装置
US4970507A (en) * 1989-03-17 1990-11-13 Gte Laboratories Incorporated Broadband switching matrix for delay equalization and elimination of inversion
US5278548A (en) * 1991-04-11 1994-01-11 The United States Of America As Represented By The Secretary Of The Navy Buffered feedthrough crossbar switch

Also Published As

Publication number Publication date
EP0717901B1 (en) 2005-01-12
DE69333739D1 (de) 2005-02-17
WO1993025032A1 (en) 1993-12-09
DE69333739T2 (de) 2005-12-01
EP0717901A1 (en) 1996-06-26
CN1081054A (zh) 1994-01-19
KR950702078A (ko) 1995-05-17
SE515177C2 (sv) 2001-06-25
US5471468A (en) 1995-11-28
SE9201697L (sv) 1993-12-02
KR100253517B1 (ko) 2000-04-15
AU4365093A (en) 1993-12-30
MX9303190A (es) 1994-01-31
FI945646A0 (sv) 1994-11-30
AU670442B2 (en) 1996-07-18
FI945646A (sv) 1994-11-30
BR9306457A (pt) 1998-06-30

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Legal Events

Date Code Title Description
NUG Patent has lapsed