SE8701618D0 - Programminnesstyrt realtidssystem omfattande tre i huvudsak identiska processorer - Google Patents

Programminnesstyrt realtidssystem omfattande tre i huvudsak identiska processorer

Info

Publication number
SE8701618D0
SE8701618D0 SE8701618A SE8701618A SE8701618D0 SE 8701618 D0 SE8701618 D0 SE 8701618D0 SE 8701618 A SE8701618 A SE 8701618A SE 8701618 A SE8701618 A SE 8701618A SE 8701618 D0 SE8701618 D0 SE 8701618D0
Authority
SE
Sweden
Prior art keywords
processor
reserve
processors
real time
inputs
Prior art date
Application number
SE8701618A
Other languages
English (en)
Other versions
SE8701618L (sv
SE457391B (sv
Inventor
B E Ossfeldt
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Priority to SE8701618A priority Critical patent/SE457391B/sv
Publication of SE8701618D0 publication Critical patent/SE8701618D0/sv
Priority to EP88850110A priority patent/EP0287539B1/en
Priority to DE8888850110T priority patent/DE3863310D1/de
Priority to US07/176,759 priority patent/US4916695A/en
Publication of SE8701618L publication Critical patent/SE8701618L/sv
Publication of SE457391B publication Critical patent/SE457391B/sv

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/183—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components
    • G06F11/184—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components where the redundant components implement processing functionality
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1679—Temporal synchronisation or re-synchronisation of redundant processing components at clock signal level
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1687—Temporal synchronisation or re-synchronisation of redundant processing components at event level, e.g. by interrupt or result of polling

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
SE8701618A 1987-04-16 1987-04-16 Programminnesstyrt realtidssystem omfattande tre i huvudsak identiska processorer SE457391B (sv)

Priority Applications (4)

Application Number Priority Date Filing Date Title
SE8701618A SE457391B (sv) 1987-04-16 1987-04-16 Programminnesstyrt realtidssystem omfattande tre i huvudsak identiska processorer
EP88850110A EP0287539B1 (en) 1987-04-16 1988-03-30 Stored program controlled real time system including three substantially identical processors
DE8888850110T DE3863310D1 (de) 1987-04-16 1988-03-30 Echtzeitdatenverarbeitungssystem mit drei weitgehend identischen prozessoren, die von einem gespeicherten programm kontrolliert sind.
US07/176,759 US4916695A (en) 1987-04-16 1988-04-01 Stored program controlled real time system including three substantially identical processors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE8701618A SE457391B (sv) 1987-04-16 1987-04-16 Programminnesstyrt realtidssystem omfattande tre i huvudsak identiska processorer

Publications (3)

Publication Number Publication Date
SE8701618D0 true SE8701618D0 (sv) 1987-04-16
SE8701618L SE8701618L (sv) 1988-10-17
SE457391B SE457391B (sv) 1988-12-19

Family

ID=20368239

Family Applications (1)

Application Number Title Priority Date Filing Date
SE8701618A SE457391B (sv) 1987-04-16 1987-04-16 Programminnesstyrt realtidssystem omfattande tre i huvudsak identiska processorer

Country Status (4)

Country Link
US (1) US4916695A (sv)
EP (1) EP0287539B1 (sv)
DE (1) DE3863310D1 (sv)
SE (1) SE457391B (sv)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE461484B (sv) * 1988-06-23 1990-02-19 Ellemtel Utvecklings Ab Saett och anordning foer att alstra en startsignal foer parallellsynkron drift av tre i huvudsak identiska databehandlingsenheter
US5168499A (en) * 1990-05-02 1992-12-01 California Institute Of Technology Fault detection and bypass in a sequence information signal processor
US5129080A (en) * 1990-10-17 1992-07-07 International Business Machines Corporation Method and system increasing the operational availability of a system of computer programs operating in a distributed system of computers
US6247144B1 (en) * 1991-01-31 2001-06-12 Compaq Computer Corporation Method and apparatus for comparing real time operation of object code compatible processors
US5339404A (en) * 1991-05-28 1994-08-16 International Business Machines Corporation Asynchronous TMR processing system
US5428769A (en) * 1992-03-31 1995-06-27 The Dow Chemical Company Process control interface system having triply redundant remote field units
US5434997A (en) * 1992-10-02 1995-07-18 Compaq Computer Corp. Method and apparatus for testing and debugging a tightly coupled mirrored processing system
US5758058A (en) * 1993-03-31 1998-05-26 Intel Corporation Apparatus and method for initializing a master/checker fault detecting microprocessor
US5630056A (en) * 1994-09-20 1997-05-13 Stratus Computer, Inc. Digital data processing methods and apparatus for fault detection and fault tolerance
US6735715B1 (en) 2000-04-13 2004-05-11 Stratus Technologies Bermuda Ltd. System and method for operating a SCSI bus with redundant SCSI adaptors
US6691257B1 (en) 2000-04-13 2004-02-10 Stratus Technologies Bermuda Ltd. Fault-tolerant maintenance bus protocol and method for using the same
US6708283B1 (en) 2000-04-13 2004-03-16 Stratus Technologies, Bermuda Ltd. System and method for operating a system with redundant peripheral bus controllers
US6687851B1 (en) 2000-04-13 2004-02-03 Stratus Technologies Bermuda Ltd. Method and system for upgrading fault-tolerant systems
US6820213B1 (en) 2000-04-13 2004-11-16 Stratus Technologies Bermuda, Ltd. Fault-tolerant computer system with voter delay buffer
US6633996B1 (en) 2000-04-13 2003-10-14 Stratus Technologies Bermuda Ltd. Fault-tolerant maintenance bus architecture
US6691225B1 (en) 2000-04-14 2004-02-10 Stratus Technologies Bermuda Ltd. Method and apparatus for deterministically booting a computer system having redundant components
US6718474B1 (en) 2000-09-21 2004-04-06 Stratus Technologies Bermuda Ltd. Methods and apparatus for clock management based on environmental conditions
US6948010B2 (en) 2000-12-20 2005-09-20 Stratus Technologies Bermuda Ltd. Method and apparatus for efficiently moving portions of a memory block
US6766479B2 (en) 2001-02-28 2004-07-20 Stratus Technologies Bermuda, Ltd. Apparatus and methods for identifying bus protocol violations
US7065672B2 (en) * 2001-03-28 2006-06-20 Stratus Technologies Bermuda Ltd. Apparatus and methods for fault-tolerant computing using a switching fabric
US6928583B2 (en) * 2001-04-11 2005-08-09 Stratus Technologies Bermuda Ltd. Apparatus and method for two computing elements in a fault-tolerant server to execute instructions in lockstep
US6996750B2 (en) * 2001-05-31 2006-02-07 Stratus Technologies Bermuda Ltd. Methods and apparatus for computer bus error termination

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4099241A (en) * 1973-10-30 1978-07-04 Telefonaktiebolaget L M Ericsson Apparatus for facilitating a cooperation between an executive computer and a reserve computer
JPS594054B2 (ja) * 1979-04-17 1984-01-27 株式会社日立製作所 マルチプロセツサ障害検出方式
DE3003291C2 (de) * 1980-01-30 1983-02-24 Siemens AG, 1000 Berlin und 8000 München Zweikanalige Datenverarbeitungsanordnung für Eisenbahnsicherungszwecke
US4375683A (en) * 1980-11-12 1983-03-01 August Systems Fault tolerant computational system and voter circuit
GB2093614B (en) * 1981-02-19 1984-10-17 Plessey Co Ltd Triply redundant microprocessor system
JPS5985153A (ja) * 1982-11-08 1984-05-17 Hitachi Ltd 冗長化制御装置
JPS59212902A (ja) * 1983-05-18 1984-12-01 Hitachi Ltd 多重化制御装置
US4665522A (en) * 1985-01-28 1987-05-12 The Charles Stark Draper Laboratory, Inc. Multi-channel redundant processing systems
DE3518105A1 (de) * 1985-05-21 1986-11-27 Alfred Teves Gmbh, 6000 Frankfurt Verfahren und schaltungsanordnung zur unterdrueckung von kurzzeitigen stoerungen

Also Published As

Publication number Publication date
EP0287539B1 (en) 1991-06-19
SE8701618L (sv) 1988-10-17
DE3863310D1 (de) 1991-07-25
US4916695A (en) 1990-04-10
EP0287539A1 (en) 1988-10-19
SE457391B (sv) 1988-12-19

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