SE7415002L - - Google Patents

Info

Publication number
SE7415002L
SE7415002L SE7415002A SE7415002A SE7415002L SE 7415002 L SE7415002 L SE 7415002L SE 7415002 A SE7415002 A SE 7415002A SE 7415002 A SE7415002 A SE 7415002A SE 7415002 L SE7415002 L SE 7415002L
Authority
SE
Sweden
Prior art keywords
goes
earth
bit line
write
turn
Prior art date
Application number
SE7415002A
Other languages
Unknown language ( )
Inventor
W M Regitz
Original Assignee
Honeywell Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Inc filed Critical Honeywell Inc
Publication of SE7415002L publication Critical patent/SE7415002L/

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/405—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4087—Address decoders, e.g. bit - or word line decoders; Multiple line decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Databases & Information Systems (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

1292265 F.E.T. memory circuits HONEYWELL Inc 25 Feb 1970 [19 March 1969] 9148/70 Heading H3T [Also in Division G4] A memory cell has three transistors such as F.E.T.'s 12, 14, 16 connected substantially as shown to a storage node C10, a selection signal input 18, bit lines 20, 22, and earth. The signal V x at 18 has three levels (Fig. 3, not shown), being zero in time t 0 t 1 when bit line 22 is charged to V c = - 13v. via F.E.T. 26, held on by V D = - 20v. When reading, V x goes to - 6v. (t 1 - t3), and F.E.T. 16, but not F.E.T. 12, turns on. F.E.T. 14 is on or not according to whether C10 stores negative voltage (1) or zero (0), and so bit line 22 is discharged to earth or not, F.E.T. 26 having been turned off at t 1 . When V c goes up to Ov. (at t 2 ) F.E.T. 24 is therefore on or not according to whether bit line 22 is still negative or not, and a read amplifier 40 having a normally negative input V s senses current flow or lack of it from F.E.T. 24 to that input when strobed at 42. To refresh the stored data, V x goes to - 20v. to turn on F.E.T. 12 at t 3 and apply V s =- 17 or earth to C10, according to the read-out signal. To write, in t4 - t 5 time, V D goes to - 20 to turn on F.E.T. 26 and earth bit line 22 (to V c =0v.) so keeping F.E.T. 24 off, while V s is made Ov. or - 17v. to write a 0 or 1 by write driver 44. A F.E.T. - gate (Fig. 2, not shown) may be included between point 36 and the write and read circuits 40, 44. In a matrix (Fig. 4, not shown) each column of cells has the F.E.T.'s 24, 26 of Fig. 1 in common (76), and column select gates (70). Each row has a common select circuit (58), whose inputs (XAO, XBO) must both be high to turn off parallel F.E.T.'s (64, 66) and pass the three-level selection signal V x (from 65) through a F.E.T. (62) to the cells, when a signal V g is negative.
SE7415002A 1969-03-19 1974-11-29 SE7415002L (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US80842169A 1969-03-19 1969-03-19

Publications (1)

Publication Number Publication Date
SE7415002L true SE7415002L (en) 1974-11-29

Family

ID=25198716

Family Applications (3)

Application Number Title Priority Date Filing Date
SE7003519A SE382275B (en) 1969-03-19 1970-03-17 ELECTRONIC MEMORY ELEMENT.
SE7415002A SE7415002L (en) 1969-03-19 1974-11-29
SE7502344A SE396495B (en) 1969-03-19 1975-03-03 ELECTRONIC MEMORY

Family Applications Before (1)

Application Number Title Priority Date Filing Date
SE7003519A SE382275B (en) 1969-03-19 1970-03-17 ELECTRONIC MEMORY ELEMENT.

Family Applications After (1)

Application Number Title Priority Date Filing Date
SE7502344A SE396495B (en) 1969-03-19 1975-03-03 ELECTRONIC MEMORY

Country Status (7)

Country Link
JP (1) JPS5623237B1 (en)
CA (1) CA941964A (en)
CH (1) CH540548A (en)
DE (1) DE2013233A1 (en)
FR (1) FR2037223B1 (en)
GB (1) GB1292265A (en)
SE (3) SE382275B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6037015U (en) * 1983-08-18 1985-03-14 丸山　スミエ shirt pocket

Also Published As

Publication number Publication date
GB1292265A (en) 1972-10-11
SE382275B (en) 1976-01-19
FR2037223A1 (en) 1970-12-31
CH540548A (en) 1973-08-15
SE396495B (en) 1977-09-19
SE7502344L (en) 1975-03-03
JPS5623237B1 (en) 1981-05-29
CA941964A (en) 1974-02-12
FR2037223B1 (en) 1974-05-03
DE2013233A1 (en) 1970-10-01

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