SE445284B - Anordning for delning av en pulsfoljd med en forutbestemd faktor - Google Patents
Anordning for delning av en pulsfoljd med en forutbestemd faktorInfo
- Publication number
- SE445284B SE445284B SE8000628A SE8000628A SE445284B SE 445284 B SE445284 B SE 445284B SE 8000628 A SE8000628 A SE 8000628A SE 8000628 A SE8000628 A SE 8000628A SE 445284 B SE445284 B SE 445284B
- Authority
- SE
- Sweden
- Prior art keywords
- output
- register
- transistors
- inputs
- input
- Prior art date
Links
- 238000001208 nuclear magnetic resonance pulse sequence Methods 0.000 claims description 12
- 238000010586 diagram Methods 0.000 description 10
- 239000004065 semiconductor Substances 0.000 description 4
- 235000013405 beer Nutrition 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 125000004122 cyclic group Chemical group 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000000737 periodic effect Effects 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
- H03K23/64—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two
- H03K23/66—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
- H03K23/64—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two
- H03K23/66—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses
- H03K23/667—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses by switching the base during a counting cycle
Landscapes
- Manipulation Of Pulses (AREA)
- Time-Division Multiplex Systems (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Dc Digital Transmission (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB7903449A GB2041591B (en) | 1979-01-31 | 1979-01-31 | Frequency divider |
Publications (2)
Publication Number | Publication Date |
---|---|
SE8000628L SE8000628L (sv) | 1980-08-01 |
SE445284B true SE445284B (sv) | 1986-06-09 |
Family
ID=10502864
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SE8000628A SE445284B (sv) | 1979-01-31 | 1980-01-28 | Anordning for delning av en pulsfoljd med en forutbestemd faktor |
Country Status (6)
Country | Link |
---|---|
US (1) | US4315166A (is) |
JP (1) | JPS55104137A (is) |
DE (1) | DE3001388C2 (is) |
FR (1) | FR2448256A1 (is) |
GB (1) | GB2041591B (is) |
SE (1) | SE445284B (is) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3634594A1 (de) * | 1986-10-10 | 1988-04-14 | Philips Patentverwaltung | Schaltungsanordnung zur erzeugung rationalzahliger frequenzverhaeltnisse |
US5297273A (en) * | 1990-08-30 | 1994-03-22 | Westinghouse Electric Corp. | System for optically splitting high-speed digital signals using cascading tree-type configuration wherein the number of successive level of cascading increase by a factor of two |
US5859890A (en) * | 1997-02-26 | 1999-01-12 | Motorola, Inc. | Dual modulus prescaler |
US6389095B1 (en) | 2000-10-27 | 2002-05-14 | Qualcomm, Incorporated | Divide-by-three circuit |
EP1241788A1 (en) * | 2001-03-13 | 2002-09-18 | STMicroelectronics Limited | Digital frequency divider |
US6950958B2 (en) * | 2001-10-15 | 2005-09-27 | Intel Corporation | Method and apparatus for dividing a high-frequency clock signal and further dividing the divided high-frequency clock signal in accordance with a data input |
US6988217B1 (en) | 2002-02-27 | 2006-01-17 | Advanced Micro Devices, Inc. | Method and mechanism for generating a clock signal with a relatively linear increase or decrease in clock frequency |
US7395286B1 (en) * | 2004-01-05 | 2008-07-01 | National Semiconductor Corporation | Method for generating non-overlapping N-phases of divide-by-N clocks with precise 1/N duty ratio using a shift register |
GB2437990B (en) | 2006-01-24 | 2008-06-25 | Toumaz Technology Ltd | Frequency divider circuits |
US8504854B2 (en) | 2010-06-21 | 2013-08-06 | Advanced Micro Devices, Inc. | Managing multiple operating points for stable virtual frequencies |
US9261949B2 (en) | 2010-10-29 | 2016-02-16 | Advanced Micro Devices, Inc. | Method for adaptive performance optimization of the soc |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3460129A (en) * | 1964-03-09 | 1969-08-05 | Ericsson Telefon Ab L M | Frequency divider |
SE314012B (is) * | 1964-07-07 | 1969-08-25 | T G Hesselgren | |
US3375449A (en) * | 1965-05-12 | 1968-03-26 | Int Standard Electric Corp | Frequency divider with variable digital ratio |
JPS5040656B2 (is) * | 1971-11-12 | 1975-12-25 | ||
GB1478200A (en) * | 1974-09-16 | 1977-06-29 | Nat Res Dev | Threshold logic gates |
NL7415575A (nl) * | 1974-11-29 | 1976-06-01 | Philips Nv | Schakeling voor frequentiedeling van hoog- frequent impulsen. |
US3970867A (en) * | 1975-02-18 | 1976-07-20 | Texas Instruments Incorporated | Synchronous counter/divider using only four NAND or NOR gates per bit |
US4234849A (en) * | 1976-07-26 | 1980-11-18 | Hewlett-Packard Company | Programmable frequency divider and method |
-
1979
- 1979-01-31 GB GB7903449A patent/GB2041591B/en not_active Expired
-
1980
- 1980-01-16 DE DE3001388A patent/DE3001388C2/de not_active Expired
- 1980-01-21 US US06/113,843 patent/US4315166A/en not_active Expired - Lifetime
- 1980-01-25 FR FR8001645A patent/FR2448256A1/fr active Granted
- 1980-01-28 SE SE8000628A patent/SE445284B/sv not_active IP Right Cessation
- 1980-01-30 JP JP888680A patent/JPS55104137A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
DE3001388A1 (de) | 1980-08-07 |
FR2448256A1 (fr) | 1980-08-29 |
GB2041591A (en) | 1980-09-10 |
US4315166A (en) | 1982-02-09 |
SE8000628L (sv) | 1980-08-01 |
JPS55104137A (en) | 1980-08-09 |
FR2448256B1 (is) | 1982-03-05 |
JPH038128B2 (is) | 1991-02-05 |
DE3001388C2 (de) | 1987-05-14 |
GB2041591B (en) | 1983-05-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4901076A (en) | Circuit for converting between serial and parallel data streams by high speed addressing | |
EP0468732A2 (en) | Sequence control apparatus | |
SE445284B (sv) | Anordning for delning av en pulsfoljd med en forutbestemd faktor | |
US6847241B1 (en) | Delay lock loop using shift register with token bit to select adjacent clock signals | |
US7843374B2 (en) | Priority encoder | |
US4477904A (en) | Parity generation/detection logic circuit from transfer gates | |
US4675553A (en) | Sequential logic circuits implemented with inverter function logic | |
KR950009690B1 (ko) | 순환 여유검사(crc) 동기 장치 | |
EP0386908B1 (en) | PCM communication system | |
CN1122918A (zh) | 具有可测试部件块的半导体集成电路 | |
KR960011539B1 (ko) | Ic 시험장치의 논리비교회로 | |
Higuchi et al. | Static-hazard-free T-gate for ternary memory element and its application to ternary counters | |
US10171228B2 (en) | Receiving circuit, electronic device, transmission/reception system, and receiving circuit control method | |
US3110866A (en) | Data selecting and synchronizing circuit comprising plural gates and flipflops interconnecting data handling systems | |
KR20180008768A (ko) | 링 주파수 분할기 | |
JP3272533B2 (ja) | マルチプレクサ回路およびデマルチプレクサ回路 | |
JPS63253714A (ja) | トリガ信号発生器 | |
US4177447A (en) | Device for detecting errors in a digital transmission system | |
US4691331A (en) | Self-correcting frequency dividers | |
US4387341A (en) | Multi-purpose retimer driver | |
SE450320B (sv) | Digital fasforskjutningskrets for sekventiell tendning av ett flertal tyristorer | |
US3323111A (en) | Distortion signal generator | |
KR950010837B1 (ko) | 임의로 선택가능한 가변다항식을 갖는 순환중복검사 다항식 생성기 | |
SU1684925A1 (ru) | Счетчик | |
SU1056180A1 (ru) | Устройство дл сравнени параллельных кодов чисел |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
NUG | Patent has lapsed |
Ref document number: 8000628-1 Effective date: 19920806 Format of ref document f/p: F |