SE440831B - Anordning for omvandling av virtuella adresser till reella adresser for databehandlingssystem med realtidsbearbetning - Google Patents

Anordning for omvandling av virtuella adresser till reella adresser for databehandlingssystem med realtidsbearbetning

Info

Publication number
SE440831B
SE440831B SE7906180A SE7906180A SE440831B SE 440831 B SE440831 B SE 440831B SE 7906180 A SE7906180 A SE 7906180A SE 7906180 A SE7906180 A SE 7906180A SE 440831 B SE440831 B SE 440831B
Authority
SE
Sweden
Prior art keywords
circuit
signal
output
primary memory
validity
Prior art date
Application number
SE7906180A
Other languages
English (en)
Swedish (sv)
Other versions
SE7906180L (sv
Inventor
J M Allain
D Courtel
J-L Joubert
J-P Vidonne
Original Assignee
Materiel Telephonique
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Materiel Telephonique filed Critical Materiel Telephonique
Publication of SE7906180L publication Critical patent/SE7906180L/
Publication of SE440831B publication Critical patent/SE440831B/sv

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/0623—Address space extension for memory modules

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Executing Machine-Instructions (AREA)
  • Debugging And Monitoring (AREA)
SE7906180A 1978-07-19 1979-07-18 Anordning for omvandling av virtuella adresser till reella adresser for databehandlingssystem med realtidsbearbetning SE440831B (sv)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7821403A FR2431732A1 (fr) 1978-07-19 1978-07-19 Dispositif de conversion d'adresse virtuelle en adresse reelle

Publications (2)

Publication Number Publication Date
SE7906180L SE7906180L (sv) 1980-01-20
SE440831B true SE440831B (sv) 1985-08-19

Family

ID=9210908

Family Applications (1)

Application Number Title Priority Date Filing Date
SE7906180A SE440831B (sv) 1978-07-19 1979-07-18 Anordning for omvandling av virtuella adresser till reella adresser for databehandlingssystem med realtidsbearbetning

Country Status (14)

Country Link
US (1) US4319322A ( )
AU (1) AU4902179A ( )
BE (1) BE877784A ( )
BR (1) BR7904557A ( )
CA (1) CA1127317A ( )
DE (1) DE2929280A1 ( )
ES (1) ES482579A1 ( )
FR (1) FR2431732A1 ( )
GB (1) GB2027549B ( )
GR (1) GR69254B ( )
IT (1) IT1235756B ( )
SE (1) SE440831B ( )
SU (1) SU1162377A3 ( )
TR (1) TR20120A ( )

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4432053A (en) * 1981-06-29 1984-02-14 Burroughs Corporation Address generating apparatus and method
JPS59128670A (ja) * 1983-01-12 1984-07-24 Hitachi Ltd ベクトル処理装置
US4654789A (en) * 1984-04-04 1987-03-31 Honeywell Information Systems Inc. LSI microprocessor chip with backward pin compatibility
US4677548A (en) * 1984-09-26 1987-06-30 Honeywell Information Systems Inc. LSI microprocessor chip with backward pin compatibility and forward expandable functionality
US4777589A (en) * 1985-06-28 1988-10-11 Hewlett-Packard Company Direct input/output in a virtual memory system
AU597363B2 (en) * 1987-05-22 1990-05-31 Honeywell Bull Inc. Present bit recycle and detect logic for a memory management unit
JPH01112450A (ja) * 1987-10-27 1989-05-01 Sharp Corp メモリ管理ユニット
EP0333215B1 (en) * 1988-03-18 1994-08-31 Wang Laboratories Inc. Distributed reference and change table for a virtual memory system
JPH0293952A (ja) * 1988-09-30 1990-04-04 Hitachi Ltd 仮想計算機システム
FR2722319B1 (fr) * 1994-07-08 1996-08-14 Thomson Csf Dispositif de visualisation couleurs
JP2820048B2 (ja) * 1995-01-18 1998-11-05 日本電気株式会社 画像処理システムとその記憶装置およびそのアクセス方法
FR2751398B1 (fr) * 1996-07-16 1998-08-28 Thomson Csf Dispositif d'eclairage et application a l'eclairage d'un ecran transmissif
EP1293905A1 (en) * 2001-09-17 2003-03-19 STMicroelectronics S.r.l. A pointer circuit
US20140059283A1 (en) * 2012-08-23 2014-02-27 Advanced Micro Devices, Inc. Controlling a memory array

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL6806735A ( ) * 1968-05-11 1969-11-13
US3588829A (en) 1968-11-14 1971-06-28 Ibm Integrated memory system with block transfer to a buffer store
US3815101A (en) * 1972-11-08 1974-06-04 Sperry Rand Corp Processor state and storage limits register auto-switch
JPS51115737A (en) * 1975-03-24 1976-10-12 Hitachi Ltd Adress conversion versus control system
GB1515376A (en) * 1975-07-09 1978-06-21 Int Computers Ltd Data storage systems
US4042911A (en) * 1976-04-30 1977-08-16 International Business Machines Corporation Outer and asynchronous storage extension system
US4084225A (en) * 1976-09-24 1978-04-11 Sperry Rand Corporation Virtual address translator
US4084226A (en) * 1976-09-24 1978-04-11 Sperry Rand Corporation Virtual address translator

Also Published As

Publication number Publication date
BE877784A (fr) 1979-11-16
SU1162377A3 (ru) 1985-06-15
ES482579A1 (es) 1980-04-01
GB2027549A (en) 1980-02-20
CA1127317A (fr) 1982-07-06
IT1235756B (it) 1992-09-28
GB2027549B (en) 1982-06-30
BR7904557A (pt) 1980-04-08
IT7924363A0 (it) 1979-07-16
GR69254B ( ) 1982-05-11
TR20120A (tr) 1980-09-01
AU4902179A (en) 1980-01-24
US4319322A (en) 1982-03-09
FR2431732B1 ( ) 1982-01-08
DE2929280A1 (de) 1980-01-31
FR2431732A1 (fr) 1980-02-15
SE7906180L (sv) 1980-01-20

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