US3453600A
(en)
*
|
1966-08-18 |
1969-07-01 |
Ibm |
Program suspension system
|
US3510845A
(en)
*
|
1966-09-06 |
1970-05-05 |
Gen Electric |
Data processing system including program transfer means
|
US3573736A
(en)
*
|
1968-01-15 |
1971-04-06 |
Ibm |
Interruption and interlock arrangement
|
JPS4843461B1
(xx)
*
|
1968-10-17 |
1973-12-19 |
|
|
US3639912A
(en)
*
|
1969-04-16 |
1972-02-01 |
Honeywell Inf Systems |
Management control subsystem for multiprogrammed data processing system
|
US3665487A
(en)
*
|
1969-06-05 |
1972-05-23 |
Honeywell Inf Systems |
Storage structure for management control subsystem in multiprogrammed data processing system
|
SE330455B
(xx)
*
|
1969-06-17 |
1970-11-16 |
Ericsson Telefon Ab L M |
|
US3648252A
(en)
*
|
1969-11-03 |
1972-03-07 |
Honeywell Inc |
Multiprogrammable, multiprocessor computer system
|
US3675217A
(en)
*
|
1969-12-23 |
1972-07-04 |
Ibm |
Sequence interlocking and priority apparatus
|
US3740722A
(en)
*
|
1970-07-02 |
1973-06-19 |
Modicon Corp |
Digital computer
|
US3676852A
(en)
*
|
1970-07-20 |
1972-07-11 |
Ibm |
Multiple program digital computer
|
US3789365A
(en)
*
|
1971-06-03 |
1974-01-29 |
Bunker Ramo |
Processor interrupt system
|
US3728692A
(en)
*
|
1971-08-31 |
1973-04-17 |
Ibm |
Instruction selection in a two-program counter instruction unit
|
DE2214240C2
(de)
*
|
1972-03-23 |
1974-03-28 |
Siemens Ag, 1000 Berlin U. 8000 Muenchen |
Verfahren zur Abspeicherung von Steuerdaten bei Programmunterbrechung in einem Verarbeitungssystem
|
US3798615A
(en)
*
|
1972-10-02 |
1974-03-19 |
Rca Corp |
Computer system with program-controlled program counters
|
GB1448866A
(en)
*
|
1973-04-13 |
1976-09-08 |
Int Computers Ltd |
Microprogrammed data processing systems
|
GB1426273A
(en)
*
|
1973-04-13 |
1976-02-25 |
Int Computers Ltd |
Data processing
|
US3828327A
(en)
*
|
1973-04-30 |
1974-08-06 |
Ibm |
Simplified storage protection and address translation under system mode control in a data processing system
|
US3913073A
(en)
*
|
1973-05-31 |
1975-10-14 |
Burroughs Corp |
Multi-memory computer system
|
IT1020701B
(it)
*
|
1974-09-02 |
1977-12-30 |
Olivetti & Co Spa |
Contabile elettronica biprogramma bile
|
US4342082A
(en)
*
|
1977-01-13 |
1982-07-27 |
International Business Machines Corp. |
Program instruction mechanism for shortened recursive handling of interruptions
|
US4250546A
(en)
*
|
1978-07-31 |
1981-02-10 |
Motorola, Inc. |
Fast interrupt method
|
JPS5530730A
(en)
*
|
1978-08-22 |
1980-03-04 |
Nec Corp |
Data processor
|
FR2464008A1
(fr)
*
|
1979-08-17 |
1981-02-27 |
Thomson Brandt |
Dispositif d'alimentation de tube a decharge et generateur de lumiere comportant un tel dispositif
|
US4939640A
(en)
*
|
1981-05-22 |
1990-07-03 |
Data General Corporation |
Data processing system having unique microinstruction control and stack means
|
DE3138961C2
(de)
*
|
1981-09-30 |
1985-12-12 |
Siemens AG, 1000 Berlin und 8000 München |
Schaltungsanordnung zur schnellen Ausführung von Unterbrechungen nach Erkennen einer Unterbrechungsanforderung
|
DE3587643T2
(de)
*
|
1984-03-02 |
1994-03-24 |
Nippon Electric Co |
Informationsverarbeitungseinheit mit Unterbrechungsfunktion.
|
JPS6298434A
(ja)
*
|
1985-10-25 |
1987-05-07 |
Hitachi Ltd |
デ−タ処理システム
|
JPS6349945A
(ja)
*
|
1986-08-20 |
1988-03-02 |
Nec Corp |
デ−タ処理装置のプロセス・ロ−ルイン方式
|
US5142677A
(en)
*
|
1989-05-04 |
1992-08-25 |
Texas Instruments Incorporated |
Context switching devices, systems and methods
|
JPH0193837A
(ja)
*
|
1987-10-05 |
1989-04-12 |
Nec Corp |
デバッグ用マイクロプロセッサ
|
GB2234613B
(en)
*
|
1989-08-03 |
1993-07-07 |
Sun Microsystems Inc |
Method and apparatus for switching context of state elements in a microprocessor
|
US6128728A
(en)
|
1997-08-01 |
2000-10-03 |
Micron Technology, Inc. |
Virtual shadow registers and virtual register windows
|
US6076157A
(en)
*
|
1997-10-23 |
2000-06-13 |
International Business Machines Corporation |
Method and apparatus to force a thread switch in a multithreaded processor
|
US6697935B1
(en)
|
1997-10-23 |
2004-02-24 |
International Business Machines Corporation |
Method and apparatus for selecting thread switch events in a multithreaded processor
|
US6567839B1
(en)
|
1997-10-23 |
2003-05-20 |
International Business Machines Corporation |
Thread switch control in a multithreaded processor system
|
US6212544B1
(en)
|
1997-10-23 |
2001-04-03 |
International Business Machines Corporation |
Altering thread priorities in a multithreaded processor
|
US6105051A
(en)
*
|
1997-10-23 |
2000-08-15 |
International Business Machines Corporation |
Apparatus and method to guarantee forward progress in execution of threads in a multithreaded processor
|
US6243767B1
(en)
*
|
1998-06-02 |
2001-06-05 |
Adaptec, Inc. |
System for register partitioning in multi-tasking host adapters by assigning a register set and a unique identifier in each of a plurality of hardware modules
|
US6668317B1
(en)
|
1999-08-31 |
2003-12-23 |
Intel Corporation |
Microengine for parallel processor architecture
|
US6606704B1
(en)
*
|
1999-08-31 |
2003-08-12 |
Intel Corporation |
Parallel multithreaded processor with plural microengines executing multiple threads each microengine having loadable microcode
|
US6983350B1
(en)
|
1999-08-31 |
2006-01-03 |
Intel Corporation |
SDRAM controller for parallel processor architecture
|
US6687246B1
(en)
|
1999-08-31 |
2004-02-03 |
Intel Corporation |
Scalable switching fabric
|
US6427196B1
(en)
*
|
1999-08-31 |
2002-07-30 |
Intel Corporation |
SRAM controller for parallel processor architecture including address and command queue and arbiter
|
US6611276B1
(en)
*
|
1999-08-31 |
2003-08-26 |
Intel Corporation |
Graphical user interface that displays operation of processor threads over time
|
US7191309B1
(en)
|
1999-09-01 |
2007-03-13 |
Intel Corporation |
Double shift instruction for micro engine used in multithreaded parallel processor architecture
|
US7546444B1
(en)
|
1999-09-01 |
2009-06-09 |
Intel Corporation |
Register set used in multithreaded parallel processor architecture
|
US7421572B1
(en)
|
1999-09-01 |
2008-09-02 |
Intel Corporation |
Branch instruction for processor with branching dependent on a specified bit in a register
|
US6532509B1
(en)
|
1999-12-22 |
2003-03-11 |
Intel Corporation |
Arbitrating command requests in a parallel multi-threaded processing system
|
US6694380B1
(en)
*
|
1999-12-27 |
2004-02-17 |
Intel Corporation |
Mapping requests from a processing unit that uses memory-mapped input-output space
|
US6631430B1
(en)
*
|
1999-12-28 |
2003-10-07 |
Intel Corporation |
Optimizations to receive packet status from fifo bus
|
US6307789B1
(en)
*
|
1999-12-28 |
2001-10-23 |
Intel Corporation |
Scratchpad memory
|
US6625654B1
(en)
*
|
1999-12-28 |
2003-09-23 |
Intel Corporation |
Thread signaling in multi-threaded network processor
|
US7620702B1
(en)
|
1999-12-28 |
2009-11-17 |
Intel Corporation |
Providing real-time control data for a network processor
|
US6661794B1
(en)
*
|
1999-12-29 |
2003-12-09 |
Intel Corporation |
Method and apparatus for gigabit packet assignment for multithreaded packet processing
|
US6584522B1
(en)
*
|
1999-12-30 |
2003-06-24 |
Intel Corporation |
Communication between processors
|
US6952824B1
(en)
|
1999-12-30 |
2005-10-04 |
Intel Corporation |
Multi-threaded sequenced receive for fast network port stream of packets
|
US6976095B1
(en)
|
1999-12-30 |
2005-12-13 |
Intel Corporation |
Port blocking technique for maintaining receive packet ordering for a multiple ethernet port switch
|
US7480706B1
(en)
|
1999-12-30 |
2009-01-20 |
Intel Corporation |
Multi-threaded round-robin receive for fast network port
|
US6631462B1
(en)
*
|
2000-01-05 |
2003-10-07 |
Intel Corporation |
Memory shared between processing threads
|
US7681018B2
(en)
*
|
2000-08-31 |
2010-03-16 |
Intel Corporation |
Method and apparatus for providing large register address space while maximizing cycletime performance for a multi-threaded register file set
|
US20020053017A1
(en)
*
|
2000-09-01 |
2002-05-02 |
Adiletta Matthew J. |
Register instructions for a multithreaded processor
|
US7020871B2
(en)
*
|
2000-12-21 |
2006-03-28 |
Intel Corporation |
Breakpoint method for parallel hardware threads in multithreaded processor
|
US6868476B2
(en)
*
|
2001-08-27 |
2005-03-15 |
Intel Corporation |
Software controlled content addressable memory in a general purpose execution datapath
|
US7487505B2
(en)
|
2001-08-27 |
2009-02-03 |
Intel Corporation |
Multithreaded microprocessor with register allocation based on number of active threads
|
US7216204B2
(en)
*
|
2001-08-27 |
2007-05-08 |
Intel Corporation |
Mechanism for providing early coherency detection to enable high performance memory updates in a latency sensitive multithreaded environment
|
US7225281B2
(en)
|
2001-08-27 |
2007-05-29 |
Intel Corporation |
Multiprocessor infrastructure for providing flexible bandwidth allocation via multiple instantiations of separate data buses, control buses and support mechanisms
|
US7126952B2
(en)
*
|
2001-09-28 |
2006-10-24 |
Intel Corporation |
Multiprotocol decapsulation/encapsulation control structure and packet protocol conversion method
|
US7158964B2
(en)
*
|
2001-12-12 |
2007-01-02 |
Intel Corporation |
Queue management
|
US7107413B2
(en)
*
|
2001-12-17 |
2006-09-12 |
Intel Corporation |
Write queue descriptor count instruction for high speed queuing
|
US7269179B2
(en)
*
|
2001-12-18 |
2007-09-11 |
Intel Corporation |
Control mechanisms for enqueue and dequeue operations in a pipelined network processor
|
US7895239B2
(en)
*
|
2002-01-04 |
2011-02-22 |
Intel Corporation |
Queue arrays in network devices
|
US7181573B2
(en)
*
|
2002-01-07 |
2007-02-20 |
Intel Corporation |
Queue array caching in network devices
|
US6934951B2
(en)
*
|
2002-01-17 |
2005-08-23 |
Intel Corporation |
Parallel processor with functional pipeline providing programming engines by supporting multiple contexts and critical section
|
US7610451B2
(en)
|
2002-01-25 |
2009-10-27 |
Intel Corporation |
Data transfer mechanism using unidirectional pull bus and push bus
|
US7181594B2
(en)
*
|
2002-01-25 |
2007-02-20 |
Intel Corporation |
Context pipelines
|
US7149226B2
(en)
*
|
2002-02-01 |
2006-12-12 |
Intel Corporation |
Processing data packets
|
DE10240634B4
(de)
*
|
2002-03-12 |
2007-07-19 |
Minebea Co., Ltd. |
Hydrodynamisches Lager für einen Spindelmotor
|
US7437724B2
(en)
*
|
2002-04-03 |
2008-10-14 |
Intel Corporation |
Registers for data transfers
|
FR2840702B1
(fr)
*
|
2002-06-06 |
2004-11-26 |
Tak Asic |
Procede de changement de taches de codage d'image
|
US7471688B2
(en)
*
|
2002-06-18 |
2008-12-30 |
Intel Corporation |
Scheduling system for transmission of cells to ATM virtual circuits and DSL ports
|
US7337275B2
(en)
|
2002-08-13 |
2008-02-26 |
Intel Corporation |
Free list and ring data structure management
|
US7352769B2
(en)
|
2002-09-12 |
2008-04-01 |
Intel Corporation |
Multiple calendar schedule reservation structure and method
|
US7433307B2
(en)
*
|
2002-11-05 |
2008-10-07 |
Intel Corporation |
Flow control in a network environment
|
US6941438B2
(en)
*
|
2003-01-10 |
2005-09-06 |
Intel Corporation |
Memory interleaving
|
US7443836B2
(en)
|
2003-06-16 |
2008-10-28 |
Intel Corporation |
Processing a data packet
|
US7213099B2
(en)
*
|
2003-12-30 |
2007-05-01 |
Intel Corporation |
Method and apparatus utilizing non-uniformly distributed DRAM configurations and to detect in-range memory address matches
|