SE1300553A1

SE1300553A1 - DC/DC-strömriktare med flera portar

Info

Publication number: SE1300553A1
Application number: SE1300553A
Authority: SE
Inventors: Alireza Nami; Jan Svensson; Roberto Alves
Original assignee: Abb Technology Ltd
Priority date: 2013-08-20
Filing date: 2013-08-20
Publication date: 2013-08-27

Abstract

DC/DC-STRÖMRIKTARE MED FLERA PORTAR. Beskrivningen hänför sig till en DC/DC-strömriktare med förmåga att blockera DC-fel, varvid strömriktaren innefattar en första och en andra spänningsstyv modulär flernivåströmriktare (M2C1, M2C2) kopplade i serie. Den första spänningsstyva modulära flernivåströmriktaren (M2C1) är ansluten mellan en första anslutningsterminal och en andra anslutningsterminal, och den andra spänningsstyva modulära flernivåströmriktaren (M2C2) är ansluten mellan den andra anslutningsterminalen och en tredje anslutningsterminal för att tillhandahålla en första spänning (UDC1) mellan den första och den tredje anslutningsterminalen och en andra spänning (UDC2) mellan den andra och den tredje anslutningsterminalen. Den första spänningsstyva modulära flernivåströmriktaren (M2C1) innefattar åtminstone en 4-kvadrant cell som kan styras för att tillhandahålla en positiv eller en negativ cellspänning.(Fig. 15)

Description

15 20 25 30 connected between the ﬁrst connection terminal and the second connection terminal, and the second modular multilevel voltage source converter is connected between the second connection terminal and the third connection terminal to provide a first voltage between the ﬁrst and third connection terminals and a second voltage between the second and the third connection terminals. The ﬁrst modular multilevel voltage source converter comprises at least one 4-quadrant cell which can be switched to provide a positive or a negative cell voltage.

A second embodiment provides a method for controlling a DC/DC converter according to the ﬁrst embodiment. The method comprises controlling the 4- quadrant cell(s) to provide a cell voltage which opposes a driving voltage associated with a fault current.

An advantage of some of the embodiments of this disclosure is DC fault blocking capability from both low voltage (LV) and high voltage (HV) side of the DC/DC converter.

Another advantage is that it is possible to avoid extra voltage rating or DC breaker in order to handle fault currents. Thus it may be possible to minimize the converter rating in the multiport DC/DC structure allowing for a low cost converter arrangement for High power DC/DC conversion including DC fault blocking capability.

A further advantage of embodiments that use bipolar cells is more control over converter arm and capacitor voltages.

Further advantages and features of embodiments of the present invention will become apparent when reading the following detailed description in conjunction with the drawings.

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic block diagram of a multiport DC/DC converter. 10 15 20 25 30 Fig. 2 is a schematic block diagram illustrating an embodiment of a M2C converter.

Fig. 3 is a schematic block diagram of a single phase multiport DC/DC converter.

Fig. 4 is a schematic block diagram of a Front to Front DC/DC topology.

Fig. 5 is a schematic block diagram of a half-bridge cell and equivalent circuits for different operating modes.

Fig. 6 is a schematic block diagram of a full-bridge cell and equivalent circuits for different operating modes.

Fig. 7 is a schematic block diagram illustrating a fault current at a HV side of a multiport DC/DC converter.

Fig.8 is a set of schematic block diagrams illustrating path current of DC fault in the HV side of a multiport DC/DC converter.

Fig. 9 is a schematic block diagram illustrating a fault current at a LV side of a multiport DC/DC converter.

Fig. 10 is a set of schematic block diagrams illustrating path current of DC fault in the LV side of a multiport DC/DC converter.

Fig. 11 is a set of schematic block diagrams illustrating a part of a DC/DC converter according to an embodiment as well as different operating modes.

Fig. 12 is a set of schematic block diagrams illustrating a part of a DC/DC converter according to an embodiment in a blocking mode.

Fig. 13 is a set of schematic block diagrams illustrating a part of a DC/DC converter according to an alternative embodiment as well as different operating modes.

Fig. 14 is a set of schematic block diagrams illustrating a part of a DC/DC converter according to an alternative embodiment in a blocking mode.

Figs. 15 and 16 are schematic block diagrams illustrating alternative embodiments of multiport DC/DC converters.

DETAlLED DESCRIPTION The embodiments of this disclosure will now be described more fully hereinafter with reference to the accompanying drawings, in which different example embodiments are shown. These example embodiments are provided so that this 10 15 20 25 30 disclosure will be thorough and complete and not for purposes of limitation. ln the drawings, like reference signs refer to like elements.

Fig. 2 and Fig. 3 illustrate the use of halfbridge cells in a multiport DC/DC converter. Fig. 3 shows a simpliﬁed schematic of the multiport DC/DC converter to analyze the current path during faults. The main advantages of this multiport DC/DC converter compared to a front to front converter topology, as illustrated in Fig. 4, are cost and loss reduction.

To study the problem of the capacity of the multiport DC/DC converter of Fig. 2 and Fig. 3 of limiting faults the equivalent circuit of the half-bridge after blocking the IGBTs must be taken into account. Fig. 5 shows these equivalent circuits.

The half bridge has the ability to limit the current in one direction by inserting the capacitor in series with the circuit (capacitor-diode path), but in the other direction acts as a short circuit (diode path).

As the conversion stages are of the cascaded two-level (CTL) topology type of converter the following problems can be observed: (1) DC fault blocking capability There is no DC fault blocking capability within the multiport DC/DC converter topology illustrated in Fig. 3 as shown in Fig. 7 and Fig. 8 due to natural commination through anti-parallel diodes (based on Half-bridge cells). This will add extra rating to the diodes and it is necessary to use a fast DC breaker.

Fig. 7 shows a HV side fault status. As shown in Fig. 8, the fault current exists from LV side (Udc2) to fault in HV side through M2C1 (upper converter) diodes while fault current through M2C2 is blocked.

Fig. 9 and Fig. 10 show a LV side fault status. As shown in Fig. 10(b), the fault current is blocked through both M2C1 and M2C2 as capacitors are in series with diodes in the current paths (Fig. 3). However, since the voltage rating of M2C1 is (Udc1-Udc2), another problem is: (2) Raring of M2C1 10 15 20 25 Extra voltage rating of M2C1 due to short circuit in LV side DC (Udc2=0).

Therefore, M2C1 needs to be rated for full HV DC side (Udc1) (see Fig. 9 and Fig. 10). This will reduce the cost effectiveness of the topology illustrated in Fig. 3 compared to an equivalent front to front topology (Fig. 4).

Embodiments of this invention tackle the above mentioned problems (1) and (2) by using 4 quadrant cell, such as full-bridge (FB) cells in the M2C1 converter. By this solution, (1) The multiport DC/DC converter offers DC fault blocking capability for both LV and HV side (problem 1) which can avoid the extra diode silicon area rating and/or use of extra DC breaker. (2) There is no need of extra rating for M2C1 converter which is the result of LV side fault (problem 2). This will reduce the cost and loss of the converter.

One embodiment uses mixed half-bridge and full-bridge cells. Such a mixed cell topology is shown in Figure 11(a). As shown in Table 1 below, in normal operation S3 is constantly ON and the whole cell becomes the same as a series connection of half-bridges and four different voltage levels can be generated out of this condition in normal operation.

Table 1: Switching state of mixed cell in normal and fault case 1 0 1 0 1 0 0 +U +U l > 0 N0rma| 1 O 1 0 0 1 0 O 0 OR Operation 0 1 1 0 1 0 +U +U +2U I < 0 0 1 1 0 0 1 +U 0 +U _ 0 0 0 0 0 0 +U +U +2U I < 0 Fault operation 0 0 0 0 0 0 _U 0 _U | > 0 The full bridge cell has the ability to insert the capacitor for currents in both directions. Fig. 6 shows the equivalent circuits of a full-bridge (FB). After blocking IGBT FB topology opposes the capacitor voltage (see Fig. 6, capacitor- diode path). 10 15 20 25 When a DC fault occurs, all IGBT switches are going to blocking mode and diodes and capacitor will remain in the current path. As shown in blocking mode switching state Table 1, opposite voltage can be created according to current direction due to natural diode commination. This will result in LV and HV side DC fault current blocking within the multiport DC/DC converter topology.

Clamped double cell (CDC) topology is another 4-quadrant cell which is described in the international patent application WO 2011067120 A1 and is illustrated in Fig. 13(a). As shown in Table 2 below, in normal operation S5 is constantly ON and the whole cell becomes the same as a series connection of half-bridges and four different voltage levels can be generated out of this condition in normal operation.

Table 2: Switching state of CDC cell in normal and fault case S1 Uout 'out 1 0 1 0 1 0 +U +U I > 0 _ 1 0 0 1 1 0 0 0 Normal Operation OR 0 1 1 0 1 +U +U +2U |< 0 0 1 0 1 1 +U O +U _ 0 0 0 O 0 +U +U +2U I < 0 Fault operation 0 0 0 0 0 -U 0 -U I > 0 When a DC fault occurs, all IGBT switches are going to blocking mode and diodes and capacitor will remain in the current path forming a full-bridge or series of half-bridge diode rectiﬁer according to current direction (see Fig. 14).

As shown in blocking mode switching state Table 2 and Fig. 14, opposite voltage can be created according to current direction due to natural diode commination. This will result in LV and HV side DC fault current blocking within the multiport DC/DC converter topology.

Fig. 15 illustrates a multiport DC/DC converter with mixed cells in M2C1, where the cells are half-bridge (HB) and FB Cells. 10 15 Fig. 16 illustrates a multiport DC/DC converter with clamped-diode cell (CDC) in M2C1.

The proposed topologies illustrated in Fig. 15 and 16 have the following beneﬁts: - The ability to block converter faults in multiport topology - Considering DC fault blocking capability on both topologies: low cost high power HVDC DC/DC converter - DC fault blocking capability within the DC/DC converter topology - Avoid the use of extra DC breaker or reduce the size of the DC breaker. ln the drawings and speciﬁcation, there have been disclosed typical embodiments and, although speciﬁc terms are employed, they are used in a generic and descriptive sense only and not for purposes of limitation, the scope of the invention being set forth in the following claims.

Claims

1. 0 15 20 25 30 CLAI MS A DC/DC converter comprising: at least one phase leg having a first, a second, and a third connection terminal, the at least one phase leg comprising a ﬁrst and a second modular multilevel voltage source converter (M2C1, M2C2) connected in series, wherein the ﬁrst modular multilevel voltage source converter (M2C1) is connected between the ﬁrst connection terminal and the second connection terminal, and the second modular multilevel voltage source converter (M2C2) is connected between the second connection terminal and the third connection terminal to provide a first voltage (UDC1) between the first and third connection terminals and a second voltage (UDC2) between the second and the third connection terminals, and wherein the ﬁrst modular multilevel voltage source converter (M2C1) comprises at least one 4-quadrant cell which can be switched to provide a positive or a negative cell voltage. The DC/DC converter according to claim 1, wherein said at least one 4-quadrant cell is a full-bridge cell. The DC/DC converter according to claim 1, wherein said at least one 4-quadrant cell is a clamped double cell. A method for controlling a DC/DC converter according to any of claims 1-3, the method comprising controlling said at least one 4-quadrant cell to provide a cell voltage which opposes a driving voltage associated with a fault current.