SE0200177L - Anordning för att förhindra kortslutning i en bip olär dubbelpolytransistor samt förfarande för att framställa en dylik anordning - Google Patents

Anordning för att förhindra kortslutning i en bip olär dubbelpolytransistor samt förfarande för att framställa en dylik anordning

Info

Publication number
SE0200177L
SE0200177L SE0200177A SE0200177A SE0200177L SE 0200177 L SE0200177 L SE 0200177L SE 0200177 A SE0200177 A SE 0200177A SE 0200177 A SE0200177 A SE 0200177A SE 0200177 L SE0200177 L SE 0200177L
Authority
SE
Sweden
Prior art keywords
silicon
layer
emitter
polytransistor
manufacturing
Prior art date
Application number
SE0200177A
Other languages
English (en)
Other versions
SE0200177D0 (sv
Inventor
Ted Johansson
Hans Nordstroem
Anders Lindgren
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Priority to SE0200177A priority Critical patent/SE0200177L/sv
Publication of SE0200177D0 publication Critical patent/SE0200177D0/sv
Priority to DE10297639T priority patent/DE10297639B4/de
Priority to PCT/SE2002/002212 priority patent/WO2003063224A1/en
Publication of SE0200177L publication Critical patent/SE0200177L/sv
Priority to US10/893,604 priority patent/US6911368B2/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0804Emitter regions of bipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642Isolation within the component, i.e. internal isolation
    • H01L29/0649Dielectric regions, e.g. SiO2 regions, air gaps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1004Base region of bipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/66272Silicon vertical transistors
    • H01L29/66287Silicon vertical transistors with a single crystalline emitter, collector or base including extrinsic, link or graft base formed on the silicon substrate, e.g. by epitaxy, recrystallisation, after insulating device isolation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73Bipolar junction transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73Bipolar junction transistors
    • H01L29/732Vertical transistors
    • H01L29/7322Vertical transistors having emitter-base and base-collector junctions leaving at the same surface of the body, e.g. planar transistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/3143Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
    • H01L21/3144Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers on silicon

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
  • Formation Of Insulating Films (AREA)
SE0200177A 2002-01-21 2002-01-21 Anordning för att förhindra kortslutning i en bip olär dubbelpolytransistor samt förfarande för att framställa en dylik anordning SE0200177L (sv)

Priority Applications (4)

Application Number Priority Date Filing Date Title
SE0200177A SE0200177L (sv) 2002-01-21 2002-01-21 Anordning för att förhindra kortslutning i en bip olär dubbelpolytransistor samt förfarande för att framställa en dylik anordning
DE10297639T DE10297639B4 (de) 2002-01-21 2002-12-02 Doppel-Polysilizium-Bipolartransistor mit einer Anordnung zur Kurzschluss-Vermeidung und ein Verfahren zur Herstellung einer solchen Anordnung
PCT/SE2002/002212 WO2003063224A1 (en) 2002-01-21 2002-12-02 An arrangement for preventing short-circuiting in a bipolar double-poly transistor and a method of fabricating such an arrangement
US10/893,604 US6911368B2 (en) 2002-01-21 2004-07-16 Arrangement for preventing short-circuiting in a bipolar double-poly transistor and a method of fabricating such an arrangement

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE0200177A SE0200177L (sv) 2002-01-21 2002-01-21 Anordning för att förhindra kortslutning i en bip olär dubbelpolytransistor samt förfarande för att framställa en dylik anordning

Publications (2)

Publication Number Publication Date
SE0200177D0 SE0200177D0 (sv) 2002-01-21
SE0200177L true SE0200177L (sv) 2003-07-22

Family

ID=20286731

Family Applications (1)

Application Number Title Priority Date Filing Date
SE0200177A SE0200177L (sv) 2002-01-21 2002-01-21 Anordning för att förhindra kortslutning i en bip olär dubbelpolytransistor samt förfarande för att framställa en dylik anordning

Country Status (4)

Country Link
US (1) US6911368B2 (sv)
DE (1) DE10297639B4 (sv)
SE (1) SE0200177L (sv)
WO (1) WO2003063224A1 (sv)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1575094B1 (en) 2004-03-12 2008-09-17 Infineon Technologies AG Bipolar transistor

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06275633A (ja) * 1993-03-22 1994-09-30 Miyazaki Oki Electric Co Ltd バイポーラ型半導体装置およびその製造方法
US5710075A (en) * 1996-11-06 1998-01-20 Vanguard International Semiconductor Corporation Method to increase surface area of a storage node electrode, of an STC structure, for DRAM devices
FR2756103B1 (fr) * 1996-11-19 1999-05-14 Sgs Thomson Microelectronics Fabrication de circuits integres bipolaires/cmos et d'un condensateur
DE69841435D1 (de) * 1997-07-11 2010-02-25 Infineon Technologies Ag Ein herstellungsverfahren für hochfrequenz-ic-komponenten
FR2776828B1 (fr) * 1998-03-31 2003-01-03 Sgs Thomson Microelectronics Region de base-emetteur d'un transistor bipolaire submicronique
JP3303833B2 (ja) * 1999-01-11 2002-07-22 日本電気株式会社 半導体装置及びその製造方法
US6323104B1 (en) * 2000-03-01 2001-11-27 Micron Technology, Inc. Method of forming an integrated circuitry isolation trench, method of forming integrated circuitry, and integrated circuitry

Also Published As

Publication number Publication date
WO2003063224A1 (en) 2003-07-31
SE0200177D0 (sv) 2002-01-21
DE10297639B4 (de) 2008-05-21
US6911368B2 (en) 2005-06-28
US20050003623A1 (en) 2005-01-06
DE10297639T5 (de) 2005-02-24

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