RU2797823C1 - Carrier recovery device - Google Patents

Abstract

FIELD: radio signals.

SUBSTANCE: receiving radio signals with binary phase shift keying (BPSK) or quadrature phase shift keying (QPSK) used in satellite, microwave digital communication systems. The carrier recovery device further comprises a first threshold unit (1), a differentiating circuit (2), a switch (3), an oscillatory circuit (5), and a second threshold unit (6) series-connected. The output of the second threshold unit (6) is connected to the first input of the multiplier (7). The second input of the key (3) is connected to a DC source (4). The input of the first threshold unit (1) is the input of the device.

EFFECT: lowering power losses by reducing the magnitude of the phase error tracking the carrier phase.

3 cl, 4 dwg

Description

The invention relates to the field of receiving radio signals with binary phase shift keying (BPSK) or quadrature phase shift keying (QPSK) and can be used in satellite, radio relay digital communication systems.

Demodulation of phase shift keying signals requires a carrier wave. There are several ways to restore the carrier [1, p. 151], [2, p. 302] and [3, p. 8].

The carrier signal can be recovered directly from the received information signal. To restore the carrier wave, it is necessary to eliminate the modulation, thereby restoring its component in the spectrum of the received signal. This can be done by raising the input signal to the mth power, followed by filtering the multiplied signal using a passive band-pass filter and dividing the signal selected by the filter by m (A.A. Pistohlkors scheme). With another carrier recovery method, it is also necessary to raise the input signal to the m-th power, after which the multiplied signal is filtered by a phase-locked loop [1, p. 151].

For most types of modulation (amplitude, phase, amplitude-phase), the carrier recovery system directly from the information signal can also be built according to a scheme called the Costas loop [2, p. 302]. In the device considered in [3], a demodulator operating according to the Costas scheme is used to restore the carrier signal with frequency multiplication.

The disadvantage of the described carrier recovery methods is the carrier-phase tracking phase errors. As is known, the phase errors of tracking the carrier phase when using the Costas loop and the PLL method with raising the input signal to a power are described by the same stochastic equations [4, p.103]. Therefore, ceteris paribus, the phase error variances of tracking the carrier phase of both this PLL method and the PLL method with raising the input signal to a power will be the same level.

The closest in technical essence to the proposed is the device described in [2, p. 301], which is taken as a prototype.

The functional diagram of the prototype device is shown in Fig. 1, where the following designations are introduced:

7 - multiplier;

8 - loop filter;

9 - voltage controlled generator (VCO);

10 - frequency divider by two;

11 - squaring device;

12 - bandpass filter.

The prototype device contains a series-connected squaring device 11, a bandpass filter 12, a multiplier 7, a loop filter 8, a voltage controlled oscillator (VCO) 9 and a frequency divider by two 10, the output of which is the output of the device. The output of the generator 9 is connected to the second input of the multiplier 7. The input of the squaring device 11 is the input of the device.

The prototype device works as follows.

The input squaring device 11 receives a signal with binary phase shift keying (BPSK). If the argument of the trigonometric function describing the phase-modulated signal with phase jumps 2π/m (m is the number of possible phase values) is increased m times, then the phase modulation is removed, the phase of the received signal does not depend on the information phase jumps and with an accuracy of a multiple of 2π/ m, repeats the phase of the original unmodulated signal.

The operation of multiplying the argument of the function describing the signal can be implemented using a quadrature when receiving radio signals with binary phase shift keying (BPSK) or using a non-linear element of the fourth degree when receiving radio signals with quadrature phase shift keying (QPSK). As is known, when the value of the information signal changes, the phase of the BPSK radio signal changes by 180°. The squaring operation removes the modulation and doubles the frequency of the signal.

The squaring thus results in a phase-coherent frequency component at twice the carrier frequency 2f _c . The filtered component at frequency 2f _c is then used to drive a PLL loop consisting of a multiplier 7, a loop filter 8 and a voltage controlled oscillator 9. The output of oscillator 9 is divided by two by a frequency divider 10 to generate a synchronous carrier for signal demodulation.

The disadvantage of the prototype device is the presence of a phase error tracking the carrier phase. The squaring operation leads to noise enrichment, which increases the noise power level at the PLL input and leads to an increase in phase error variance. As shown in [5, p. 638], with an input signal-to-noise ratio of 10 dB, using the method of raising to the fourth power (which is necessary when receiving a signal with QPSK) will lead to a loss of 2.9 dB.

Phase tracking errors of the carrier phase lead to energy losses, which show how much it is necessary to increase the signal-to-noise ratio at the input of the receiving device in order to obtain the potential bit error probability [6, p. 47].

The task to which the proposed technical solution is directed is to reduce energy losses by reducing the magnitude of the phase error of tracking the phase of the carrier frequency.

To solve this problem, a carrier recovery device containing a serially connected multiplier, a loop filter, a voltage-controlled oscillator and a frequency divider, the output of which is the output of the device, while the output of the voltage-controlled oscillator is connected to the second input of the multiplier, according to the invention , are introduced in series connected the first threshold unit, the differentiating circuit, the key, the oscillatory circuit and the second threshold unit, the output of which is connected to the first input of the multiplier, while the second input of the key is connected to a DC source; the input of the first threshold block is the input of the device.

In FIG. 2 shows a functional diagram of the proposed carrier recovery device, where the following designations are introduced:

1 - the first threshold block;

2 - differentiating circuit;

3 - key;

4 - direct current source;

5 - oscillatory circuit;

6 - second threshold block;

7 - multiplier;

8 - loop filter;

9 - voltage controlled generator;

10 - frequency divider.

The claimed device contains connected in series the first threshold unit 1, differentiating circuit 2, switch 3, oscillatory circuit 5, second threshold unit 6, multiplier 7, loop filter 8, voltage controlled generator 9 and frequency divider 10, the output of which is the output of the device. In this case, the multiplier 7, the loop filter 8 and the oscillator 9 form a PLL loop. The input of the multiplier 7 is the input of the PLL, and the output of the voltage-controlled oscillator 9 is connected to the second input of the multiplier 7. The DC source 4 is connected to the second input of the switch 3. The input of the first threshold block 1 is the input of the device.

The inventive carrier recovery device operates as follows.

The modulated BPSK signal (Fig. 3a) at frequency F _c is fed to the first threshold block 1 with a zero threshold, at the output of which a sequence of unipolar rectangular pulses is formed (Fig. 3b). The leading edges of the pulses follow with a frequency of T = 1/F _c during the transmitted information symbol, let's say "1". If at the end of the symbol "1" the symbol "0" follows, then the sequence of rising edges will shift by half a period relative to the previous sequence representing the symbol "1".

A sequence of unipolar rectangular pulses (Fig. 3b) is then fed to the input of the differentiating circuit 2, at the output of which positive and negative short pulses appear (Fig. 3c). The moments of appearance of these pulses coincide, respectively, with the leading and trailing edges of the sequence of unipolar rectangular pulses. Short positive pulses from the output of the differentiating circuit 2 are fed to the control input of the key 3 and open it for the duration of the positive pulses. Negative pulses from the output of the differentiating circuit 2 leave the key 3 in the locked state. When the key 3 is opened, the capacitor of the oscillatory circuit 5 begins to be charged from the direct current source 4 through the key 3. Then the key 3 closes, and in the oscillatory circuit 5 an oscillatory process begins at the natural frequency of the circuit tuned to the frequency 2∙F _c (Fig. 3d). This consumes the energy stored in the capacitor during the time during which the key 3 was open. In the case of receiving a BPSK signal, the resonant frequency of the oscillatory circuit 5 is chosen to be equal to twice the frequency 2F _c of the carrier of the input modulated signal. An oscillation with a frequency of 2F _c is input to the threshold block 6 with an operating threshold U _th = 0, where it is converted into a sequence of rectangular pulses (Fig. 3e). This sequence is then fed to the input of the multiplier 7, which is the input of the PLL loop, the voltage-controlled oscillator 9 of which is captured at a frequency of 2F _c . The output signal of the voltage controlled oscillator 9 is divided by two by a frequency divider 10, producing a reconstructed carrier wave (FIG. 3e).

Since the charge of the capacitor of the oscillatory circuit 5 from the direct current source 4 occurs very quickly, the oscillatory process in the circuit 5 also occurs without delay. If before the start of the signal packet at the output of the circuit, the voltage is close to zero, then the process of establishing the phase of the oscillation at its output is instantaneous [6, p. 100].

Each short positive pulse from the output of the differentiating circuit 2 excites an oscillatory process in the oscillatory circuit 5, which is damped. However, successive short positive pulses that open the key 3, through which the constant current source 4 recharges the capacitor of the oscillatory circuit 5, maintain oscillations in the circuit, due to which the sequence of rectangular clock pulses is generated continuously.

In the case of receiving a BPSK signal, the oscillatory circuit is tuned to a resonant frequency of 2f _c , and when receiving a QPSK signal, the oscillating circuit has a resonant frequency of 4f _c .

The operation of the proposed device when receiving a QPSK signal is illustrated in Fig. 4. The modulated QPSK signal input to the device is shown in FIG. 4a. In FIG. 4b shows a sequence of unipolar rectangular pulses at the output of the first threshold block 1. Positive and negative short pulses are generated at the output of the differentiating circuit 2 (Fig. 4c). In FIG. 4d shows the oscillatory process at the natural frequency of the oscillatory circuit tuned to the frequency 4∙F _c . These fluctuations are fed to the input of the threshold block 6 with the threshold U _th = 0, where they are converted into a sequence of rectangular pulses (Fig. 4e). This sequence then goes to the input of the multiplier 7, which is the input of the PLL loop, the voltage-controlled oscillator 9 of which is captured at a frequency of 4F _c . The output signal of the voltage controlled oscillator 9 is divided by four by a frequency divider 10, producing a reconstructed carrier wave (FIG. 4e).

Thus, in the proposed device, the operation of squaring the signal or to the fourth power is excluded, which leads to a decrease in energy losses by reducing the magnitude of the phase error of tracking the phase of the carrier frequency.

Information sources

1. Okunev Yu.B. Digital transmission of information by phase-modulated signals. Moscow: Radio and communication, 1991.

2. Prokis J. Digital communication. M.: Radio and communication, 2000.

3. Patent RU 2376718 C1. Demodulator of a communication system with double phase modulation. Published on 12/20/2009. Bull. No. 35.

4. W. Lindsay. Synchronization systems in communication and control. M.: Sov. radio, 1978.

5. Bernard Sklyar. Digital communication. Theoretical foundations and practical application. Moscow: Williams Publishing House, 2003.

6. Banquet V.L., Dorofeev V.M. Digital methods in satellite communications. Moscow: Radio and communication, 1988.

Claims (3)

1. A carrier recovery device containing a serially connected multiplier, a loop filter, a voltage-controlled oscillator, and a frequency divider, the output of which is the output of the device, while the output of the voltage-controlled oscillator is connected to the second input of the multiplier, characterized in that series-connected the first threshold block, a differentiating circuit, a key, an oscillatory circuit and a second threshold block, the output of which is connected to the first input of the multiplier, while the second input of the key is connected to a DC source; the input of the first threshold block is the input of the device. 2. The device according to claim 1, characterized in that the oscillatory circuit is tuned to twice the carrier frequency in the case of receiving radio signals with binary phase shift keying (BPSK), and a frequency divider by two is used as a frequency divider. 3. The device according to claim 1, characterized in that the oscillatory circuit is tuned to a quadruple carrier frequency in the case of receiving radio signals with quadrature phase shift keying (QPSK), and a frequency divider by four is used as a frequency divider.

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