RU2718220C1 - Paraphrase signal former with single spacer - Google Patents

Abstract

FIELD: pulse technique; computer engineering.

SUBSTANCE: invention relates to pulse and computer equipment and can be used in constructing self-synchronizing combinational, trigger, register and computing devices, digital information processing systems. In circuit containing inverter, AND-OR-NOT element, NAND element, information unary input, control input, paraphrase information output with single spacer and indicator output, two OR-AND-NOT elements are input, inverter input and output are connected to inputs of the first group of inputs AND elements of AND-OR-NOT element, and indicator output is connected to first inputs of first groups of OR inputs of OR-AND-NOT elements.

EFFECT: reduced complexity of realization of a paraphrase signal generator with a single spacer while ensuring self-synchronization of its operation with a self-synchronized environment with faster operation.

1 cl, 1 dwg

Description

A paraphase signal generator with a single spacer refers to pulsed and computational technology and can be used to build self-synchronous combination, trigger, register, and computing devices, and digital information processing systems.

The self-synchronous converter of a unary signal into a paraphase signal with a single spacer as part of a parallel register discharge with single-phase inputs is known [1, Fig. 11.19], containing two inverters, two AND-OR-NOT elements and an AND-NOT element.

A disadvantage of the known device is the inability to use it in self-synchronous operation.

Closest to the proposed solution by technical nature and adopted as a prototype is a converter of a unary signal to a paraphase signal with a single spacer [2], containing two inverters, two AND-OR-NOT elements and an AND-NOT element. Moreover, the prototype provides the possibility of self-synchronous operation of the converter of the unary signal to paraphase with a single spacer, allowing the change of the unary input immediately after the formation of the operating state at the paraphase output. However, the price of this technical solution is a twofold increase in hardware costs (the number of transistors required to implement the prototype) compared to its prototype and a decrease in the speed of the converter.

The objectives of the prototype, consisting in the implementation of the self-synchronous mode of the converter (shaper), allowing the change of the unary input immediately after the formation of the operating state at the paraphase output, can be achieved with significantly lower hardware costs.

The problem solved in the invention is to reduce the complexity of the circuit of the generator of the paraphase signal with a single spacer (not less than 26%), allowing you to change the unary input immediately after the formation of the operating state at the paraphase output, while ensuring its self-synchronous operation with more high speed (not less than 25%).

This is achieved by the fact that in the shaper of a paraphase signal with a single spacer, containing an inverter, an AND-OR-NOT element and an AND-NOT element, a unary input, a control input, a paraphase output with a single spacer and an indicator output, the inverter input being connected to the first input the first group of inputs AND AND AND-OR-NOT element, the output of the AND-NOT element is connected to the indicator output of the driver, two OR-AND-NOT elements are introduced, the second input of the first group of inputs AND of the AND-OR-NOT element connected to the inverter output and the second the input of the first group of inputs OR the first element OR-AND-NOT, the input of the second group of inputs AND element AND-OR-NOT connected to the control input, the output of the element AND-OR-NOT connected to the inputs of the second groups of inputs OR of the first and second elements OR-AND-NOT, the first inputs the first groups of inputs OR of the first and second elements OR-AND-NOT connected to the output of the AND-NOT element, the second input of the first group of inputs OR the second element OR-AND-NOT connected to the unary input of the driver and the inverter input, the input of the third group of inputs OR the first element OR-AND-NOT connected to the output of the second element OR-AND-NOT, the second the input of the AND-NOT element and the inverse component of the paraphase output, the input of the third group of inputs OR of the second OR-AND-NOT element is connected to the output of the first OR-AND-NOT element, the first input of the AND-NOT element and the direct component of the paraphase output.

The proposed device has significant features that distinguish it from the prototype and ensure the achievement of the claimed technical result. Indeed, the inverter input is connected to the first input of the first group of inputs AND of the AND-OR-NOT element, and the output of the AND-NOT element is connected to the indicator output of the former in the prototype. But the way to connect the inverter output to the inputs of the remaining elements of the signal converter circuit in the prototype does not provide its displayability when the converter is operating in a self-synchronous environment. It is the connection of the input and output of the inverter to the inputs of the first group of inputs AND element AND-OR-NOT converter allowed to achieve the effect expressed by the purpose of the invention.

Since the introduced structural connections in similar technical solutions are not known, the device can be considered to have significant differences.

The concept of "paraphase" used in the text of this application is defined as follows. A signal is considered to be paraphase, represented by two components - a pair of variables {X, XB}, which in the active phase have mutually inverse values: {X = 0, XB = 1} or {X = 1, XB = 0}. The transition of a paraphase signal from one static operating state to the opposite operating state can be carried out in two ways.

The first method involves the use of a paraphase signal with a spacer: when the transition to the next operating state is necessarily preceded by the transition to the third static state - the spacer (inactive or blanking state). If the state {1,1} is used as a spacer, then they say that a paraphase signal with a single spacer is used, and if the state is {0,0}, then a paraphase signal with a zero spacer is used. The spacer state is a static state, switching to which in self-synchronous circuitry should be fixed by the indicator of the end of the transition process, in this case, the end of switching to the spacer state.

The second method involves the use of a paraphase signal without a spacer. In this case, the transition from one working static state to another is carried out through a dynamic (short-term) state: {1,1} or {0,0}, - called a transit state.

In the materials of this application we are talking about the formation of a paraphase signal with a single spacer, in the future - just a paraphase signal.

A unary signal is an ordinary single information signal having two possible values: 0 or 1. The control input reflects the fact that a new value appears on the information unary input, which may also coincide with the previous value, by switching to the state "0".

In FIG. 1 is a diagram of a paraphase signal former with a single spacer. The circuit contains an inverter 1, an AND-OR-NOT element 2, an AND-NOT element 3, two OR-AND-NOT elements 4-5, a unary information input 6, a control input 7, a paraphase information output 8-9, an indicator output 10, the inverter 1 input is connected to the unary input 6, to the first input of the first group of inputs AND of the AND-OR-NOT 2 element and to the second input of the first group of inputs OR of the second OR-AND-NOT 5 element, the output of the AND-NOT 3 element is connected to the indicator output shaper 10 and the first inputs of the first groups of inputs OR of the first 4 and second 5 elements OR-AND-NOT, the second input of the first group of inputs And the AND-OR-NOT 2 element is connected to the inverter output and the second input of the first group of inputs OR of the first OR-AND-NOT 4 element, the input of the second group of inputs AND of the AND-OR-NOT 2 element is connected to control input 7, the output of the AND element OR NOT 2 is connected to the inputs of the second groups of inputs OR of the first 4 and second 5 elements OR-AND-NOT, the input of the third group of inputs OR of the first element OR-AND-NOT 4 is connected to the output of the second element OR-AND-NOT 5, the second input element AND-NOT 3 and the inverse component of the paraphase output 9, the input of the third group of inputs OR the second element OR-AND-NOT 5 sub It is relevant to the output of the first element OR-AND-NOT 4, the first input of the element AND-NOT 3 and the direct component of the paraphase output 8.

The scheme works as follows. In the spacer phase, logic 1 is supplied to the control input, as a result, both components of the paraphase output 8 and 9 take the value logical 1 and logic 0 appears on the indicator output 10 as a sign of the spacer. The value of the signal at the unary input 6 does not affect the values of the outputs of the shaper. In the working phase, the value of logic 0 is supplied to the control input 7, as a result of which the paraphase output 8, 9 switches to the state corresponding to the value of the unary input 6. Upon completion of switching the paraphase output 8, 9 to the working phase, the indicator output 10 will go to logical 1, reflecting the end of all transients in the shaper.

The features of this scheme in comparison with the prototype are as follows.

The AND-OR-NOT element, combining the unary input, the control input and the inverter output, to the input of which the unary input of the shaper is connected, provides control of the phases of the shaper and the indication of both the unary input and the shaper control input. This eliminates the need to use an additional G-trigger to indicate the inverter output, reducing the complexity of implementing a self-synchronous paraphase signal driver with a single spacer (the complexity of the prototype together with the additional two-input G-trigger is 38 CMOS transistors, while the complexity of the proposed circuit is 28 CMOS transistors) and ensuring self-synchronization of the shaper switching from the working phase to the spacer and vice versa. The implementation of the proposed device is based on the elements included in the standard library of elements available to end users. However, if we take into account the peculiarity of the input signals coming to the OR-AND-NOT 4 and 5 elements that implement the RS-trigger - the simultaneous arrival of signals from the outputs of the AND-OR-NOT 2 element and the AND-NOT 3 element to both components of the RS-trigger - you can reduce the number of transistors for the implementation of the latter from 16 to 14, and the shaper as a whole, from 28 to 26.

The number of cascades reloading the output capacities in the prototype is 25% more than in the proposed solution: 6 and 4, respectively.

Thus, the proposed device has less implementation complexity and ensures self-synchronous operation of the paraphase signal former with a single spacer with higher speed. The objective of the invention is achieved.

Sources:

[1] Varshavsky V.I., Chisinau M.A., Marakhovsky V.B. and other Automatic control of asynchronous processes in computers and discrete systems / Ed. IN AND. Warsaw. - M .: Science. Ch. ed. physical - mat. lit., 1986 .-- 400 p.

[2] L.P. Plekhanov, Yu.A. Stepchenkov, Yu.G. Dyachenko, A.N. Denisov. Unary to paraphase converter with a single spacer. - RF patent No. 2664013. Publ. 08/14/2018 Bull. Number 23. - 10 s.

Claims (1)

A paraphase signal generator with a single spacer, comprising an inverter, an AND-OR-NOT element and an AND-NOT element, a unary information input, a control input, a paraphase information output with a single spacer and an indicator output, the inverter input being connected to the first input of the first group of AND inputs of the AND-OR-NOT element, the output of the AND-NOT element is connected to the indicator output of the driver, characterized in that two OR-AND-NOT elements are introduced into the circuit, the second input of the first group of inputs AND of the AND-OR-NOT element connected to the inverter output and WTO the input of the first group of inputs OR of the first OR-AND-NOT element, the input of the second group of inputs AND of the AND-OR-NOT element is connected to the control input, the output of the AND-OR-NOT element is connected to the inputs of the second groups of inputs OR of the first and second elements OR- AND-NOT, the first inputs of the first groups of inputs OR of the first and second elements OR-AND-NOT connected to the output of the element AND-NOT, the second input of the first group of inputs OR of the second element OR-AND-NOT connected to the unary input of the driver and the inverter input, input third group of inputs OR the first element OR-AND-NOT connected to the output m of the second element OR-AND-NOT, the second input of the element AND-NOT and the inverse component of the phase output, the input of the third group of inputs OR of the second element OR-AND-NOT connected to the output of the first element OR-AND-NOT, the first input of the element AND-NOT and the direct component of the paraphase output.

Images