RU2483466C1 - Universal television system - Google Patents

Abstract

FIELD: radio engineering, communication.

SUBSTANCE: result is achieved by including, at the transmitting side in each video signal processing channel, a unit for selecting the signal of the most significant bit of the code, making, at the receiving side, a matrix of a plane-parallel screen from elements which successively emit three colours R, G, B, each with duration of one third of the duration of the frame period, and including in the audio playback channels a register unit, a decoder and a digital-to-analogue converter of the corresponding circuit.

EFFECT: transmitting digital video information with one signal in eight-bit codes, thereby reducing power consumption of the radio signal transmitter and reducing the loading of airwaves with electromagnetic wave energy.

17 dwg, 3 tbl

Description

The invention relates to radio communications technology and can be used for digital broadcasting of one stereo channel or two television channels on one carrier frequency.

The prototype adopted "Universal television system" [1], on the transmitting side containing two photoelectric converters / photovoltaic cells /, the first of them generates color signals of the right frame B, G, R of the stereo pair and three colors of the left frame B₂, G₂, R₂ stereo pairs, the second photomultiplier generates three color signals of one frame. The transmitting side includes six ADC video signals, six encoders, a code stream shaper, two keys, the first and second self-propelled pulse distributors / SRI /, two 3in1, 3v2 audio ADCs, a frequency synthesizer and a single-channel radio signal transmitter, containing a control unit / selector on the receiving side TV channels /, the path for receiving codes of video signals, the first channel for processing codes from three channels of color signals B, G, R, the second channel for processing codes from three channels of color signals B₂G₂, R₂, first and second screens. Both frames are transmitted and received in parallel. On the receiving side, the compressed video information is restored by the decoders, the number of samples in the lines is doubled, and the stereo pair frames that the viewer observes through the glasses of separate fields of view are simultaneously reproduced on two screens. Playable video mode 1000 × 1000 × 25 Hz.

The disadvantage of the prototype is the transmission of digital video and audio information in full binary 8-bit and 16-bit codes and the use of matrix elements screens, each of the three emitting cells.

The purpose of the invention is to reduce the loading of near-Earth space by the energy of electromagnetic waves and to reduce the size of the matrix elements in the screens.

The technical results are the transmission of video information with a single signal in eight-bit codes, sixteen-bit audio information with 5-bit codes, reducing the power consumption of the radio signal transmitter and increasing the resolution of the screens.

The essence of the invention is to conduct on the transmitting side to each color signal processing channel the high-order signal extraction unit in codes, to enter the audio signal processing channel to each channel of the high-order signal extraction unit of the code and the encoder, on the receiving side to the sound channel connected register block, decoder and DAC corresponding circuit.

The transmitting side is given in figure 1,

structure of the digital stream - figure 2,

block selection signal senior level in the codes of the video signal - figure 3,

block selection signal senior level in the sound codes - figure 4,

shaper code stream - figure 5,

the spectrum of the amplitude-modulated signal in Fig.6,

bipolar amplitude detector - Fig.7,

receiving side - in Fig.8,

frame code storage - in Fig.9,

block of registers - figure 10, 11,

block allocation signal SSI, CSI - Fig,

matrix element - in Fig.13,

the principle of operation of the radiating cell - Fig.14,

sound register block - in Fig.15,

DAC sound circuit - in Fig.16,

timing diagrams of the system - on Fig.

The universal television system operates in two modes: broadcasting a stereo program and broadcasting in parallel between two television channels. Video mode 1000 × 1000 × 25 Hz. Codes of the right and left frames go in parallel, the separation of their signal codes on the polar basis. The sampling frequency of the video signal codes in the ADC 12-17 / Fig. 1/ is:

f _d = 1000 _pp × 1000 _count × 25 Hz = 25 MHz,

where 1000 _pp is the number of lines in the frame,

1000 _{frame of reference} - the number of samples per line,

25 Hz - stereo pair frequency.

, период разрядов в коде 5 нс

.Video compression not applicable, 40 ns video code period

, the period of bits in the code is 5 ns

.

Clock frequency of sinusoidal oscillations:

f _t = 25 Hz × 8 × 3 = 600 MHz,

8 - the number of bits in the code, 3 - the number of codes of color signals in series.

The carrier frequency in the transmitter 39/1 / adopted:

f _and = 600 MHz × 12 = 7200 MHz. Upper side carrier frequency;

f _HB = 7200 MHz + 600 MHz = 7800 MHz, lower side carrier frequency;

f _nn = 7200 MHz-600 MHz = 6600 MHz, which is used in the system when transmitting video information.

The transmitting side contains the first photoelectric converter 1 / FEP /, is a sensor of video signals of three colors B, G, R of the right frame and three colors B _2, G ₂ , R _{2 of the} left frame of the stereo pair and includes the first lens 2 and the first matrix of the FIR 3 / device with charge injection / three-layer CMOS sensor [2, s.832] photosensitive side of which is located in the focal plane of the lens 2, the resolution matrix FDI 3 × 10 ^6/1000 × 1000 /, the first to third outputs FDI matrix 3 via diodes D1- D3 connected to the inputs of the pre-amplifiers 4, 5, 6, the outputs of which are the first or third outputs of the PEC 1, which includes the second lens 7 and the second matrix of the PZI 8, identical to the matrix of the PZI 3, the photosensitive side of the matrix of the PZI 8 is located in the focal plane of the lens 7. The first or third outputs of the matrix of the PZI 8 are connected to the inputs of the preliminary amplifiers 9, 10, 11, the outputs of which are 4-6 outputs of the photomultiplier tubes 1. The transmitting side includes six identical channels for processing video signals, each includes a series-connected ADC 12 / 13-17 /, converting analog video signals into 8-bit binary codes, A P 12-17 are identical to the ADC of the video signals in the analogue [3, p.5 of FIG. 3], and the block 18 / 19-23 / of the signal selection of the highest order code, the first to eighth outputs of which are connected to the corresponding first to eighth inputs of the first and second information inputs of the shaper 24 code stream. The transmitting side includes a code stream former 24, a frequency synthesizer 25, a first 26, a second 27 keys, a first self-propelled pulse distributor 28 / SRI /, a second SRI 29, respectively [4, p.269, 274], the first ADC 30 and the second ADC 31 sound signals performed identically to the ADC of the sound signals in the analogue [5, p.5 of Fig.7]. ADCs 30, 31 convert 3v1 and 3v2 analog audio signals into 16-bit codes with a frequency of 75 kHz. The channels for processing the sound codes are identical, the first channel 3in1 includes ADC 30 connected in series, a high-order signal separation block 32 in codes, and an encoder 33, re-encoding the selected high-order signal with a five-digit binary code from 00001 to 10000, which is received in parallel to the third information input of the block 24. The second channel 3v2 includes an ADC 31, a high-order signal extracting unit 34 in codes, and an encoder 35, re-encoding the extracted signal into a five-digit binary code from 00001 to 10000, received in parallel form on the fourth information input of block 24. SRI 28 gives a five-unit code 11111, which indicates the horizontal sync pulse of the SSI coming to the fifth information input of block 24, SRI 29 gives the code of the frame sync pulse of five units 11111 to the sixth information input of block 24. The transmitting side includes the second FEP 36 from the third lens 37 and the array of PZI 38, the photosensitive side of which is located in the focal plane of the lens 37, the first or third outputs of the matrix through the diodes D4-D6 are connected to the inputs of 4, 5, 6 pre-amplifiers, respectively d and contains a transmitter 39 of radio signals from a serially connected carrier frequency amplifier 40, amplitude modulator 41 and output amplifier 42. The amplitude modulator includes a ring modulator and a band-pass filter [6, p.224], filtering the upper side frequency of the carrier 7800 MHz in the amplitude-modulated spectrum carrier / Fig.6/, and the ring modulator suppresses the carrier itself 7200 MHz, the lower side frequency of 6600 MHz with the video information of the codes enters the output amplifier 42 and is broadcast. The stability of the carrier is not worse than 10 ^-7 , so the occupied band in the air is ± 660 Hz or 1320 Hz. A synthesizer of 25 frequencies produces: from the first output pulses of 25 Hz of the frequency of stereo pairs, from the second output - pulses of 25 Hz of the sampling frequency of video codes, from the third - pulses of 75 kHz of the sampling frequency of sound codes, from the fourth - sinusoidal oscillations of the clock frequency of 600 MHz, from the fifth output - pulses of 25 kHz line frequency, from the sixth - sinusoidal oscillations of the carrier 7200 MHz, from the seventh output - pulses U _vyd frequency of 200 MHz in register 43/3 /, from the eighth output pulses of 400 MHz U _vyd signals from bits of the register 45 / Fig .four/. Blocks 18-23 are identical, each includes a key 44 and eight-bit register 43, the first to eighth of which are the outputs of block 18-23, and includes eight diodes D1-D8, the input of each diode is connected to the output of its discharge, and the outputs of the diodes are combined and connected to the second control U _{in the} input of the key 44, the first control U _{from the} input of which is connected to the output of 2/25 MHz / frequency synthesizer 25, the input of the key 44 is connected to the seventh output of the 200 MHz block 25. With the ADC 12-17, the binary code in parallel is received into register 43 of block 18-23. The first 25 MHz pulse after entering the code in register 43 opens the key 44, which passes 200 MHz issuing pulses to the register 43, which sequentially give pulses from the first to eighth bits of register 43 to the output, starting from the first / senior / bit: the first pulse issued is the high-order signal in the video signal code, the same pulse through its diode closes the key 44, and it enters the information input of the generator 24 code stream.

/. Получение информации о яркости трех цветов В, G, R только по сигналам одних старших разрядов в кодах не приводит к искажению цветов при воспроизведении цветового изображения на экране ввиду синхронного мгновенного получения кодов трех цветов /дискретизация кодов 25 МГц/, не использование сигналов в младших разрядах кодов не скажется и на уровнях яркостей цветов, так как их вес в коде к весу старшего разряда в коде в разы меньше, следовательно, предлагаемый процесс передачи цифровой видео- и звуковой информации ради снижения энергопотребления и уменьшения загрузки эфира энергией электромагнитных волн желателен быть к применению. Блоки 32 и 34 выделения сигнала старшего разряда в кодах идентичны, каждый включает /фиг.4/ последовательно соединенные ключ 46 и шестнадцатиразрядный регистр 45. Код звука в параллельном виде поступает в разряды регистра 45. Первый же импульс 25 МГц после поступления кода звука в регистр 45 открывает ключ 46, который в открытом состоянии пропускает импульсы 400 МГц в регистр 45, которые последовательно выдают сигналы из разрядов регистра: первый выданный импульс, начиная со старшего разряда регистра является сигналом старшего разряда кода звука, закрывает ключ 46, а сам поступает на соответствующий вход шифратора 33 /35/. В результате на вход шифратора в параллельном виде поступает шестнадцатиразрядный код звука только с одним старшим сигналом в коде, в котором и содержится вся информация кода, в остальных разрядах кода нули. В шифраторе 33 /35/ сигнал старшего разряда кода повторно кодируется двоичным кодом, поступая на один вход шифратора [7 с, 207], с выхода шифратора 33 /35/ выдается пятиразрядный код, представляющий номер размещения сигнала старшего разряда кода звука в последовательности разрядов в 16-разрядном коде звука (примеры в таблице 1). As a result, the eight-bit code of the video signal with only one signal in one of the eight bits of the code, which is the selected signal of the highest bit of the code, is transmitted to the information input of the shaper 24 of the code stream, in the remaining bits of the code there will be zeros: the signal of the highest bit in the code is the only information signal to transmit it to the receiving side, instead of eight signals, only the senior level signal in each code is transmitted to the receiving side, the load of electro ether is reduced agnitnoy radio wave energy is eight times /

/. Obtaining information on the brightness of the three colors B, G, R only from the signals of the most significant bits in the codes does not lead to color distortion when reproducing the color image on the screen due to the synchronous instantaneous receipt of the three color codes / discretization of codes 25 MHz /, not using signals in the lower digits codes will not affect the brightness levels of the colors, since their weight in the code to the weight of the highest digit in the code is several times less, therefore, the proposed process of transmitting digital video and audio information in order to reduce energy consumption I and reducing the ether load by the energy of electromagnetic waves is desirable to be used. Blocks 32 and 34 for extracting the signal of the highest order in the codes are identical, each includes / Fig. 4/ serial-connected key 46 and sixteen-bit register 45. The sound code in parallel form enters the bits of register 45. The first pulse is 25 MHz after the sound code enters the register 45 opens the key 46, which in the open state passes 400 MHz pulses to the register 45, which sequentially output signals from the bits of the register: the first pulse issued, starting with the highest bit of the register, is the signal of the highest bit of the sound code, breaks the key 46, and he goes to the corresponding input of the encoder 33/35 /. As a result, the sixteen-bit sound code with only one high signal in the code, which contains all the code information, is in the remaining bits of the code in the code bits in the remaining bits of the code. In the encoder 33/35 / the signal of the highest bit of the code is re-encoded with a binary code, arriving at one input of the encoder [7 s, 207], from the output of the encoder 33/35 / a five-bit code is presented representing the number of the signal of the highest bit of the sound code in the sequence of bits in 16-bit sound code (examples in table 1).

Table 1 Codes from block 32/34 / Codes from the encoder 33, 35 0000000000000001 00001/1 / 0000000000000010 00010/2 /

0100000000000000 01111/15 / 1000000000000000 10000/16 /

Codes from the encoder 33, 35 in parallel form respectively arrive at the third and fourth information inputs of the shaper 24 code stream (Figure 1). Shaper code stream 34 is made according to the scheme in FIG. 5 identically to the code stream generator in the prototype [1, p. 11 of FIG. 3], includes three channels, the first and second channels are identical. The first channel includes series-connected the first block of 47 AND elements of 24 AND elements, the first 48 and second 49 OR elements, the first output key 50 and the first SRI 51, the second channel includes the second block 52 of AND elements of 24 AND elements, the third 53 and fourth 54 OR elements and a second output key 55 and a second SRI 56. The third channel includes two blocks 57, 58 of AND elements, each of the five AND elements, the fifth 59 and sixth 60 OR elements, the third SRI 61 and the fourth SRI 62, block 24 includes the first 63 , second 64 and third 65 keys, and 10-bit counter 66 connected in series and decoder 67. The information inputs of block 24 are: the first are the first inputs of the elements AND block 47, the second are the first inputs of the elements AND block 52/24 the inputs /, the third are the first inputs of the elements AND block 57 / five inputs /, the fourth are the first inputs of the elements And block 58 / five inputs /, fifth - the signal input of the third key 65, sixth - the third input of the fourth element OR 54, connected to the output of the SRI 29. The first output of block 24 are the combined outputs of the output keys 50, 55: the sequence of the discharge of bits of the codes of video signals and the sound comes from an older / first / p rank to the least eighth digit. The second output of block 24 is the third output of the decoder 67 connected to the input U _p SRI 28. The control inputs are: the first is the combined inputs of the keys 63, 64 and the counting input of the pulse counter 66, the second is the combined signal inputs / 600 MHz / output keys 50, 55, the third is the control input U _o / 25 kHz / counter 66 pulses, the fourth is the control input U _s / 25 Hz / key 65. The first output of the decoder 67 is connected to the first control input U _{from the} key 63, the second output is connected to the second control input U _of the second switch 63 and to a first control _from U entry 64, the third switch is connected to the output of the second control input U _of the key 64 and a second output 24. The second inputs of the AND units 47, 52 are connected to the outputs of the HRE 51, 56, and the AND closures 57, 58 are connected to the outputs of the HRE 61 , 62, and in SRI 61, 62, outputs from the first to fifth are connected to the second inputs of the AND elements, the remaining outputs from the sixth to the 24th are not used.

поступают на соответствующие входы матриц в экранах 81, 91. Плоскопанельные экраны идентичны, каждый включает матрицу из элементов по числу отсчетов в строке и числу строк в кадре 10⁶ /1000×1000/. Элемент матрицы формирует три пиксела тремя последовательно идущими и продолжительностью в 13 мс каждый излучениями трех цветов P, C, В. Общий вид одного элемента матрицы на Фиг.13 и включает непрозрачный корпус 121 соответствующей формы, в котором расположены во входном торце со стороны облучения микролинза 122, выполняющая роль микрообъектива, между микролинзой и выходным торцом расположены друг за другом семь нейтральных микросветофильтров 123_2-8, обслуживающие второй-восьмой разряды каждого кода, и группа из трех цветных микросветофильтров 124_R, 124_G, 124_B, обслуживающие первый /старший/ разряд в каждом коде. Нейтральный микросветофильтр 123 прикреплен к свободному второму концу своего микропьезоэлемента 125_2-8, первые концы которых с двумя управляющими входами жестко закреплены в корпусе 121 элемента матрицы. Нейтральные микросветофильтры 123_2-8 имеют коэффициенты поглощения излучения соответственно веса обслуживаемого им разряда представлены в таблице 2. Коэффициенты поглощения цветных светофильтров должны быть минимальными и для исключения разбаланса общего цвета должны быть почти одинаковы по величине. За период кадра 40 мс микропьезоэлементы 125 срабатывают три раза, каждый раз по длительности 13 мс. При частоте 13 мс наш глаз обладает свойством сохранять изображение в красном, зеленом и синем цветах, которые, накладываясь в сетчатке глаза одно на другое, создают суммарное изображение в натуральных цветах [8, с.79], что позволяет при частоте повтора изображений /13 мс/ 75 Гц /25 Гц×3/ получить на экране 81, 91 цветное изображение кадра из пикселов, получаемых тройным последовательным излучением трех цветов R, G, B, налагаемых на сетчатку глаза в периоде кадра 40 мс. Все элементы матрицы экрана делают за 40 мс тройное излучение: в первые 13 мс идет излучение изображения кадра только в красном R цвете с яркостью кода R, во вторые 13 мс идет излучение изображения кадра в зеленом цвете G с яркостью кода G, в третьи 13 мс идет излучение изображения кадра в синем цвете B с яркостью кода B.The receiving side of the system (Fig. 8/) contains an antenna, a control unit 68 / selection of TV channels /, a channel for receiving and processing video signal codes, a channel for generating control signals, first and second flat-panel screens, glasses of separate fields of view, and two sound reproduction channels. The path for receiving and processing video signal codes performs the reception of video codes for a stereo channel or two mono channels and includes serially connected radio signal receiving unit 69, a radio frequency amplifier 70, and a bipolar amplitude detector 71, first and second channels for processing video signal codes. The first channel for processing video signal codes includes a first pulse shaper 72 connected in series, the input of which is connected to the first output of a bipolar amplitude detector 71, a first key 73, a first receiving register 74 of twenty-four bits / 8 bits × 3 / and three color signal channels: a signal channel R. signal channel G. signal channel B. The sequence of receipt of bits of codes in the reception register 74 is shown in Fig.2. The signal channel R includes a series-connected drive 75 of the frame codes and a block of pulse amplifiers 76, in which the pulse amplifiers are 8 × 10 ⁶ : by the number of samples in a row, by the number of bits in a code, and the number of lines in a frame 1000 × 8 × 1000. The signal channel G includes a series-connected drive 77 frame codes and a block of 78 pulse amplifiers from 8 × 10 ⁶ pulse amplifiers. The signal channel B also includes a drive 79 frame codes and a block of 80 pulse amplifiers from 8 × 10 ⁶ pulse amplifiers. The outputs of blocks 76, 78, 80 are connected to the corresponding 24 × 10 ⁶ inputs of the first flat panel screen 81. The second channel for processing video signal codes includes a second pulse shaper 82 connected in series, the input of which is connected to the second output of the bipolar amplitude detector 71, the second key 83, and the second receiving register 84 of 24 bits / 8 bits × 3 / and three color signal channels: a signal channel R ₂ , including a code 85 frame store and a block of 86 pulse amplifiers of 8 × 10 ⁶ pulse amplifiers, a signal channel G ₂ , including a drive l 87 frame codes and a block of 88 pulse amplifiers of 8 × 10 ⁶ pulse amplifiers, a signal channel B ₂ including a drive of 89 frame codes and a block of 90 pulse amplifiers of 8 × 10 ⁶ pulse amplifiers. The outputs of blocks 86, 88, 90 are connected to the corresponding 24 × 10 ⁶ inputs of the second flat panel screen 91. The operating side of the receiving side is determined by the control signal generation channel, which includes a series-connected horizontal sync pulses allocation unit / SSI /, frequency synthesizer 93, first key 94, ten-digit counter 95 pulses and a decoder 96, block 97 allocation of frame sync pulses / KSI /, the second key 98 and the distributor 99 pulses having the first and second outputs. Images of the right and left frames of the stereo pair are reproduced synchronously on the screens 81, 91. The viewer of the image from the screens perceives through a pair of glasses 100 separate fields of view, which represent a frame with ear arches, the glasses without glasses, are vertically connected to each other vertically, to separate the fields The view of each window of the glasses has a removable hood with a conical shape, at the end under the shape of the screen. Two-part hood: the first part is screwed into the glasses window, the second part is movable: it extends and retracts into the first, changing the length of the hood. To view a stereo program, the viewer by turning the glasses windows and changing the lengths of the hood adjusts the field of view of the eyes so that each eye sees its own screen. The first and second sound reproduction channels are identical. The first sound reproducing channel includes a serially connected key 101 connected to the output of the first pulse generator 72, a register unit 102, a decoder 103, a DAC 104, a power amplifier 105 and a loudspeaker 106, the second sound reproducing channel includes a serially connected key 107, a register unit 108, a decoder 109, DAC 110, power amplifier 111 and loudspeaker 112. The frame codes 75, 77, 79, 85, 87, 89 are identical to the frame codes in the prototype [1, p. 8 of Fig. 8], each of which includes /Fig.9 / 113 _1-1000 units by the number of registers with rock in the frame data inputs are combined bitwise 1-8 units 113 registers _1-1000 inputs, outputs are parallel outputs of registers 113 of all the blocks, all outputs 8 × ¹⁰ June. Control inputs are as follows: first - the first control input 25 Hz of the first unit 113 ₁ registers connected to the output selection unit 97 KSI, the second - the combined second control inputs U _vyd 25kHz blocks 113 registers connected to the output selection unit 92 SSI, the third - the combined third control inputs U _d / 25 MHz / register blocks connected to the first output of the synthesizer 93 frequencies. The control output of each previous block of registers 113 is the first control input for each subsequent block of registers 113 / Fig.9/, the control output of the last block 113 of ₁₀₀₀ registers is connected in parallel to the fourth control inputs of all blocks of 113 registers. The blocks 113 of the registers are identical (Fig. 10, 11), each contains the first 114 and second 115 keys, a pulse distributor 116 and eight registers 117 _1-8 , each of 1000 bits according to the number of samples in a row. The information inputs of block 113 of the registers are the bitwise combined third inputs of the bits of the registers 117. The second to eighth information inputs /Fig.10/ are connected via the D2-D8 diodes and connected to the first information input: a signal from any of 2-8 bits performs the input of a color filter 124 _R , 124 _G , 124 _{B (} Fig. 13/) into the radiation flux in the emitting cell in the absence of a signal in the first bit entering the code register block 113. Outputs of the register block 113 are parallel outputs of all 1000 bits in total output 8000. Control inputs are as follows: first - the first control input U _{from the} first switch 114, second - the signal input of the second switch 115, third - U signal input _d of the first switch 114, the fourth - first control input U _{from the} key switch 115. output 114 is connected to the input of the pulse distributor 116, which successively outputs the first through 1000 are connected to the first clock, the eight parallel bits inputs of registers 117, the last output / 1000th / control is Exit next unit 113 registers ₂ and connected to the U _of the second control input key 114. The output of the second switch 115 is connected in parallel to the control inputs of the second eight bits _1-8 registers 117 and to the second control input U _of its key 115: extending one pulse U _{comes out} and closes the key 115. From the frame code drives, the codes are sent in parallel to the inputs 1-8 × 10 ^{6 of} blocks 76, 78, 80, 86, 88, 90 of pulse amplifiers. Of the eight bits in the codes of information bits, there are always only two: the first is always a signal in the first bit of the code representing RG B color information, the second is a signal in one of bits 2 ... 8 of the code that carries information about the amount of color brightness. The signal of the first discharge of the code introduces a color filter into the stream for coloring the radiation. From the outputs of the blocks of pulse amplifiers, two pulses in each code of the corresponding amplitude and a duration of 13 ms

supplied to respective inputs of matrices in the screens 81, 91. Flat screens are identical, each including a matrix of elements by the number of samples per line and the number of rows in the frame 10 ^6/1000 × 1000 /. The matrix element forms three pixels by three consecutively extending and 13 ms each radiations of three colors P, C, B. The general view of one matrix element in Fig. 13 and includes an opaque case 121 of a corresponding shape in which the microlens is located in the input end face 122, serving as the microlens between the microlens and the output end are arranged one behind the other seven neutral mikrosvetofiltrov _2-8 123 serving the second to eighth bits of each code and a group of three color mikrosvetofiltro 124 _R, 124 _G, 124 _B, serving the first / major / discharge in each code. The neutral microfilter 123 is attached to the free second end of its micropiezoelectric element 125 _2-8 , the first ends of which with two control inputs are rigidly fixed in the housing 121 of the matrix element. Neutral micro-light filters 123 _2-8 have radiation absorption coefficients, respectively, the weight of the discharge served by them is presented in Table 2. The absorption coefficients of color filters should be minimal and to avoid imbalance in the overall color should be almost the same in value. During the 40 ms frame period, the micropiezoelectric elements 125 are triggered three times, each time for a duration of 13 ms. At a frequency of 13 ms, our eye has the ability to save the image in red, green and blue colors, which, superimposing one on the other in the retina of the eye, create a total image in natural colors [8, p. 79], which allows for an image repetition rate of / 13 ms / 75 Hz / 25 Hz × 3 / obtain on the screen 81, 91 a color image of the frame from the pixels obtained by triple sequential radiation of three colors R, G, B, superimposed on the retina in the frame period of 40 ms. All elements of the screen matrix make triple radiation in 40 ms: in the first 13 ms, the image of the frame is radiated only in red R with a code brightness of R, in the second 13 ms there is radiation of the image in green G with a code of G, in the third 13 ms the image of the frame is in blue B with the brightness of code B.

table 2 Light filter 123 ₂ 123 ₃ 123 ₄ 123 ₅ 123 ₆ 123 ₇ 123 ₈ Multiplicity of the filter 2 ^x 4 ^x 8 ^x 16 ^x 32 ^x 64 ^x 128 ^x Absorption coefficient 0.5 0.75 0.875 0.937 0.968 0.984 0,992 % radiation pass fifty% 25% 12.5% 6.25% 3,125% 1.56% 0.78%

The principle of operation of the emitting cell in Fig. 14: a color filter 124 _{R is} introduced into the radiation stream coming from the micro-lens 122, which colors the stream in red, and a neutral microfilter 123 ₆ , which transmits 3.125% of the radiation, then the color stream enters the neutral screen glass 126 screen 81/91 /. In the absence of control pulses from the block of pulse amplifiers, the micropiezoelectric elements 125 (Fig. 13/) are in an unstressed state, all neutral microfilter 123 _2-8 are outside the dimensions of the radiation flux, and the maximum 100% radiation from the color of the introduced color filter is transmitted from the matrix element. When a control pulse arrives at one of the micropiezoelectric elements 125 _{2-8, the} free end of this micropiezoelectric element will bend and introduce the corresponding neutral microfilter into the radiation flux for 13 ms: the degree of radiation brightness is set by the transmittance of radiation by a neutral microfilter, and the color is specified by the introduced color microfilter. The emitting cells work synchronously, are made as miniature as possible with transverse dimensions of 1 × 1 mm or 0.5 × 0.5 mm using micro-technologies: in this case, the screen will fit into the dimensions 1 × 1 m or 0.5 × 0.5 m. radiating cells separately, and the screen of them is typed. The microlenses 122 are irradiated with superbright white-emitting diodes located in the corresponding quantity and in the corresponding order inside the screen case on its back side. Sequential radiation of 13 ms of emitting cells allows you to combine three emitters of colors R, G, B in one housing and in one emitter, which will increase the screen resolution by half against the prototype with the same screen sizes. Reading pixel signals from the matrices PZI 3 and PZI 8 is performed by pulses of 25 MHz from the key 27/1 / horizontal and pulses of 25 kHz from the key 26 vertically [2, p. 832]. Analog video signals from the PZI 3 through the diodes D1-D3 are fed to the inputs of the pre-amplifiers 4, 5, 6, from which the video signals are fed to the coding in the ADC 12, 13, 14, and from the PZI 8, to the inputs of the pre-amplifiers 9-11, from which the video signals are sent for encoding in the ADC 15, 16, 17. From the outputs of the ADC 12-17, the binary codes in parallel form enter the blocks 18-23 of the high-order signal selection in the code, the first and eighth outputs of which are connected to the inputs of the first and second information inputs of the shaper 24 code stream in which parallel conversion codes uyutsya into serial representation and a pulse units are replaced by the positive or negative half-sine monochastoty 60 MHz clock. The third and fourth information inputs of block 24 receive five-bit sound codes 3v1, 3v2. The fifth and sixth inputs receive five-digit codes SSI and CSI. Units in the codes of the right frame are represented at the output of block 24 by positive half-sine waves of a frequency of 600 MHz, units in the codes of the left frame are represented by negative half-sines of the same frequency.

The operation of the shaper 24 code stream, Figure 5

. Выходной ключ 50 в открытом состоянии пропускает одну положительную полусинусоиду, выходной ключ 55 пропускает на выход одну отрицательную полусинусоиду частоты 600 МГц. Выходной сигнал с первого выхода блока 24 является полным и неполным синусоидами 600 МГц и является модулирующим сигналом для несущей частоты 7200 МГц в амплитудном модуляторе 41. Порядок следования кодов КСИ /ССИ/, кодов строки и коды звука /Фиг.2/ задается сигналами с дешифратора 67 /Фиг.5/. Счетчик 66 импульсов 10-разрядный, ведет счет импульсов строки с первого по 1000-й. При коде 0000000001 импульс с первого выхода дешифратора 67 открывает ключ 63, пропускающий импульсы 25 МГц, являющиеся сигналами U_п запуска для СРИ 51, 56, и идет формирование кодов строки с №2 по №997 /Фиг.2/. С приходом в счетчик 997-го импульса строки со второго выхода дешифратора 67 импульс U_з закрывает ключ 63 и открывает ключ 64: формируются три кода 3в1, 3в2, это 998, 999 и 1000 отсчеты строки. Импульсы кода 3в1 с элемента ИЛИ 59 поступают на второй вход элемента ИЛИ 49 и открывают на время своей длительности 1,66 нс выходной ключ 50. Импульсы кода 3в2 с элемента ИЛИ 60 поступают на второй вход элемента ИЛИ 54 и открывают выходной ключ 55: формируются по три кода 3в1, 3в2. С приходом в счетчик 66 1000-го импульса строки с третьего выхода дешифратора 67 закрывается ключ 64, и как сигнал пуска U_п, запускается СРИ 28, выдающий код из пяти импульсов подряд 11111 - код ССИ, который проходит открытый ключ 65 и поступает на третий вход элемента ИЛИ 49. По окончании периода кадра передний фронт импульса следующего кадра 25 Гц закрывает ключ 65 на длительность пяти разрядов кода КСИ 8,3 нс /1,66 нс ×5/ и передним же фронтом запускается СРИ 29, который выдает код КСИ 11111, сигналы КСИ поступают через элемент ИЛИ 54 на вход выходного ключа 55, с выхода которого следуют подряд пять отрицательных полусинусоид. Когда идет код КСИ, не идут импульсы ССИ, закрыт ключ 65. Полные и неполные синусоиды тактовой частоты 600 МГц поступают с выхода блока 24 на второй вход блока 41, являясь модулирующими сигналами для несущей 7200 МГц.Three eight-bit codes from the high-order code signal blocks 18-20 are received at the first inputs of the 24 elements And block 47, three 8-bit codes from the high-order signal blocks 21-23 are received at the first inputs of the 24 elements And block 47 discharge code. 24 pulses are sequentially fed to the second inputs of the And elements of these blocks from the outputs of the SRI 51, 56. From the outputs of the blocks 47, 52, the pulses of the codes are sequentially sent through the OR elements 48, 49 and 53, 54 to the control inputs of the output keys 50, 55 and open them for the duration of its duration 1.66 ns

. The output key 50 in the open state passes one positive half-sine wave, the output key 55 passes one negative half-sine wave of 600 MHz output. The output signal from the first output of block 24 is a complete and incomplete sinusoid of 600 MHz and is a modulating signal for a carrier frequency of 7200 MHz in the amplitude modulator 41. The order of the CSI / SSI / codes, line codes and sound codes /Fig.2/ is set by the signals from the decoder 67 / Fig. 5/. The counter 66 pulses 10-bit, counts the pulses of the line from the first to the 1000th. When code 0000000001 pulse from the first output of the decoder 67 opens switch 63, which transmits pulses of 25 MHz, which are the signals U _n HRE run for 51, 56 and is forming a string of codes №2 №997 /Fig.2/. With the advent of the counter 997-th row from the second output pulse decoder 67 U _of pulse closes the switch 63 and opens switch 64: formed three code 3in1, 3B2, is 998, 999, and 1000 lines samples. Pulses of the 3v1 code from the OR element 59 go to the second input of the OR element 49 and open the output key 50 for the duration of their duration 1.66 ns. Pulses of the 3v1 code from the OR element 60 go to the second input of the OR element 54 and open the output key 55: they are formed by three codes 3v1, 3v2. When the 1000th pulse of the line arrives at counter 66 from the third output of the decoder 67, the key 64 closes, and as the start signal U _p , SRI 28 is started, issuing a code of five pulses in a row 11111 - the SSI code, which passes the public key 65 and goes to the third input of OR element 49. At the end of the frame period, the leading edge of the pulse of the next 25 Hz frame closes the key 65 for five bits of the CSI code 8.3 ns / 1.66 ns × 5 / and the leading edge starts the SRI 29, which issues the CSI code 11111 , the CSI signals come through the OR element 54 to the input of the output key 55, with you the course of which is followed by five consecutive negative sine waves. When the CSI code goes, the SSI pulses do not go, the key 65 is closed. The complete and incomplete sinusoids of the 600 MHz clock frequency come from the output of block 24 to the second input of block 41, being modulating signals for a carrier of 7200 MHz.

On the receiving side, the radio signals are received by block 69 / Fig. 8/, which is an electronically tuned channel selector and contains an input circuit, a radio frequency amplifier and a mixer, the second input of which from the synthesizer 93 receives a frequency equal to the carrier frequency of 7200 MHz of the transmitter 39 at input 3 necessary for detecting a single-band signal [9, p.146]. The signal from the mixer is the output signal of block 69, fed to an amplifier 70 of the radio frequency, amplified to the required value, and fed to the input of a bipolar amplitude detector 71, made according to the circuit of FIG. 7. Diode D1 selects the positive envelope of the modulating signal, Fig. 9 Fig. 17, the diode D2 from the modulating selects the envelopes of the positive half-sinusoids / symbols of units of codes of the right frame /, Fig. 10 Fig. 17, the diode D3 from the modulating selects the envelopes of the negative half-sinusoid / symbols of the units of codes left frame / diag.11, Fig.17. From the first output of block 71, the detected half-sine waves of 600 MHz are fed to the input of the first pulse generator 72, and from the second output of block 71, the detected negative half-sine waves are fed to the input of the second pulse generator 82. Shapers 72, 82 are made according to the scheme of an asymmetric trigger with emitter coupling [10, p.209], which form rectangular pulses from harmonically changing signals. Pulses of the same polarity and duration equal to the duration on the transmitting side, units in the codes are again represented by pulses, zeros - by their absence. When you turn on the power of the receiving side, the key 94 / Fig.8/ in the closed state. The order of operation of the receiving side is set by the signals of the channel for generating control signals, the initial role belongs to the block of the SSI allocation, each time the SSI code block 92 arrives at the input, a lower-case SSI clock frequency of 25 kHz appears, which opens the key 94. The exact signal is also sent by the SSI frequency tuning in the frequency synthesizer 93, whose own frequency stability is not worse than 10 ^-6 . Block 92 allocation of SSI and block 97 selection of CSI are identical, each includes / Fig.12/ three-digit counter 118 pulses, decoder 119, element HE 120 and two diodes D1 and D2. Counter 118 counts the five consecutive pulses of the SSI / 11111 /, CSI code. The information input is the counting input of the counter 118, connected to the output of the driver 72/82 / pulses, the control input is the input D1, connected to the output of the driver 82 for block 92 or to the output 72 for block 97. The first and third outputs of the counter 118 are connected to the inputs of the decoder 119, the output of which is the output of block 92/97 / and is connected through the diode D2 to the input of the element NOT 120, and together they are connected after the diode D1 to the control input U _{о of the} counter 118. The SSI / KSI code / from five units in a row goes to the counting input counter 118, at the outputs of which th code appears 101/5 /, which is decoded the decoder 119, the output unit 92/97 / there is a pulse which is pulse DIU 25 kHz / or CSI frequency of 25 Hz /. Starting from the second code of the line, from the block 72 to the counting input are the codes of video signals, and since there is one information pulse in the codes of video signals and the remaining zeros, the element NOT 120 will give a pulse to the control input U _o , which will reset counter 118. On the D1 input also receives codes from the pulse shaper 82, and each such pulse also resets the counter 118, five pulses are also not dialed in the sound codes in a row, the maximum sound code is 10000, and only with the arrival of the SSI / KSI / 11111 code does the counter 118 form on its output code 101, according to which the output of block 92/97 / receives a pulse, the same pulse through the diode D2 and to the input U _{o of the} counter 118 and resets it. The circuits of blocks 92, 97 exclude the appearance of false pulses of SSI, CSI at the output. The second inputs of the 95 frequency synthesizer are connected to the second group of outputs of the channel selection block 68, the signal from which determines the output frequency to the third input of the block 69. The frequency synthesizer 93 generates: from the first output 25 MHz sampling pulses of the video signal codes, from the second output - 600 MHz clock pulses , from the third - pulses of 75 kHz sampling frequencies of sound codes, from the fourth - sinusoidal oscillations of the carrier frequency to the third input of block 69, from the fifth output - pulses of 75 Hz to switch 98, and from it to the distributor 99 pulses. From the first pulse driver 72, the video signal codes of the right frame go to the input of the first key 73, which is closed in the initial state and opened by the SSI pulse through the first diode D1 / Fig.8/, and at the beginning of each frame, the CSI pulse from block 97 through the D2 diode opens keys 73 and 83, the keys are opened synchronously and the first code of each line SSI /Fig.2/. The codes of the right frame sequentially bitwise with the open key 73 enter the bits from the first to the 24th first receiving register 74, the codes of the video signals of the left frame in the same order are received with the open key 83 into the bits from the first to the 24th second receiving register 84. B the first receiving register 74, the signal code R fills 1-8 bits, the signal code G fills 9-16 bits, the signal code B fills 17-24 bits, the same order of filling the bits in the second receiving register 84. From both receiving registers 74, 84 codes of both frames are synchronously issued in p in parallel form in their drives 75, 77, 79 and 85, 87, 89 frame codes. The focusing of the codes of the first stereo pair occurs during the first frame 40 ms after the receiving side is turned on. At the end of the period of the first frame, the codes are issued in parallel to their blocks 76, 78, 80 and 86, 88, 90 of pulse amplifiers, the order of issuance is as follows: the first are issued in parallel to the color codes R, R ₂ from drives 75 and 85 of the frame codes in blocks 76 and 86 pulse amplifiers, from which codes amplified to an appropriate size and duration of 13 ms are fed to the control inputs of the matrix elements of screens 81, 91, in which frame images are displayed in red for 13 ms, the color codes G and G ₂ from the drives are output second 77 and 87 into blocks 78, 88 pulse preamplifier, from which pulses codes corresponding to the amplitude and duration of the same 13 ms provided to control the same elements of the matrices screens 81, 91, the image frame is displayed 13 msec in green, the third issued color codes and B ₂ drives 79 and 89 in blocks 80 and 90 pulse amplifiers, from which the pulses of codes of the corresponding amplitude and duration of 13 ms are fed to the inputs of the matrix elements of the screens 81, 91, on which the frame images in blue are displayed for 13 ms. As a result of overlaying the image of the same frame in three colors of 13 ms each on the retina, the viewer sees the image of the frame in natural colors.

The operation of the drive codes of the frame, Fig.9, 10, 11

The code signals in the drive 75 frame codes are fed to the third inputs of the bits of the registers 117 _1-8 , the filling of which with the codes of the first line begins with the opening of the key 114/10 / with a signal of 25 Hz. The key 114 passes the pulses U _d 25 MHz to the input of the distributor 116 pulses, which are sequentially fed to the first, clock, bit inputs in parallel with eight registers 117 _1-8 . Upon filling in the registers 117, the signal from the last 1000th output of block 116 closes the key 114 and opens the key 114 in the next block of registers 113 ₂ , the registers of which are filled with the codes of the second line. For the period of the first frame of 40 ms, row codes are filled in registers 117 in all blocks 113 _1-1000 registers. With the last block 113 ₁₀₀₀ /fig.9/ output control signal is supplied in parallel to the fourth control inputs of all the blocks of registers 113 and opens them in a second key /fig.11/ transmissive one signal U _vyd synchronously issuing from all the storage registers 117 codes 75 and 85/77 and 87, 79 and 89 / codes of video signals in series with colors R, R ₂ ; G and G ₂ ; B and B ₂ in their blocks of pulse amplifiers. Each frame code storage has 8 × 10 ⁶ outputs. The sequence of issuing color codes R and R ₂ ; G and G ₂ ; In and B ₂ after 13 ms block 97 / issue codes R and R ₂ / and the distributor 99 pulses with a key 98 in pair. The issuance of codes R and R ₂ from drives 75 and 85 is performed by a signal from block 97, the issuance of codes G and G ₂ from blocks 77 and 87 is performed after 13 ms by the signal from the first output of the distributor 99 pulses, the issuance of codes B and B ₂ is performed after 13 ms a signal from the second output of block 99. Pulses of frequency 75 Hz from the fifth output of synthesizer 93 frequencies are sent to the input of the distributor 99 pulses, the key 98 is opened by a pulse of 25 Hz from the output of block 97, the signal comes from 75 Hz, after two pulses the key 98 is closed by a pulse from the second output of the distributor 99 pulses, then the processes are repeated until the power of the receiving side is turned off.

The operation of sound reproduction channels, Fig. 8

The work begins with opening the key 94, which is opened by the SSI signal from block 92. The key transmits 25 MHz pulses to the counter 95, which, with the arrival of the 997th pulse, generates code 1111100101, which is decoded by the decoder 96 and gives out the pulse U _{from the} first output _from opening the keys 101, 107 and closing keys 73, 83. Keys 101, 107 pass three sound codes into register blocks 102, 108, which are executed identically, each of which includes / FIG. 15/15-bit register 127 and three keys 128 _1-3 serving it. The information input of block 102, 108 is also the information input of register 127, connected to the output of key 101, 107, the first control inputs U _{t of} blocks 102, 108 are combined and connected to the second output 600 MHz of the synthesizer 93 frequencies, the second control inputs U _{output are} also combined and connected to the third output of 75 kHz block 93. Three five-bit sound codes through public keys 101, 107 sequentially fill 15 bits in register 127: the first code fills 1-5 bits, the second fills 6-10 bits, the third code fills 11-15 bits. Signal inputs 128 keys _1-3 are combined and a second control unit input register 102, 108. The second input register 127 is the first control input of unit 102, 108. The third, fourth, fifth inputs U _vyd register 127 are connected respectively to the outputs of the keys 128 ₁ 128 ₂ , 128 ₃ . Yield first switch 128 ₁ is connected in parallel to the third control input U _vyd register 127, to its control U _of entry to both the first control U input _from the second switch 128 _2, the output of which is connected to a fourth control U _vyd entry register 127, to its second control U _of entry and to the first control input U _of the third switch ₃ 128, whose output is connected to the fifth input U _vyd register 127, to its second control input U _s and U _{from the} first control input of the first switch 128 _1. Codes are issued from register 127 at a frequency of 75 kHz: the first is given a code from 1-5 digits, the second from 6-10 digits, and the third from 11-15 digits. The codes are sent to decoders 103, 109, each of which, respectively, a combination of a five-digit code generates a pulse at 16 outputs on one DAC 104, 110, from the output of which analog sound signals are amplified in power amplifiers 105, 111 and reproduced by loudspeakers 106, 112. The DAC 104, 110 are identical, each one includes (Fig. 16) a block 129 of pulse amplifiers, of which there are 16 pieces by the number of bits in the sound code, a matrix of 130 pulse LEDs of 16 pulse white LEDs, each of which has a neutral filter with radiation absorption oeffitsientom respectively its discharge weight are shown in Table 3.

Table 3

Discharge number one 2 3 four 5 6 7 8 … 16 Traffic light multiplicity 0 ^x 2 ^x 4 ^x 8 ^x 16 ^x 32 ^x 64 ^x 128 ^x 32768 ^x Absorption coefficient 0 0.50 0.75 0.875 0.937 0.968 0.984 0.982 ... 0.977 % radiation pass one hundred fifty 25 12.5 6.25 3,125 1,56 0.78 ... 0.003

The DAC includes a lens 131, the optical axis of which coincides with the optical axis of the matrix 130, the corresponding photodetector 132 in the focal plane of the lens, the output of the photodetector 132 is connected to the input of the operational amplifier 133, the output of which is connected to the input of the amplifier 105/111 / power. The galvanic isolation between the digital part of the DAC and analog eliminates the influence of noise on the operational amplifier 133. The lens 131 summarizes the radiation of the LEDs of the array 130 in the input window of the photodetector 132, the signal from which enters the operational amplifier 133 and from it to the input of the power amplifier 105/111 /.

The operation of the system, figure 1, 8

In stereo broadcasting mode, on the transmitting side of the matrix, FDI 3 and 8 provide analog video signals to the ADCs 12-17, converting the video signals into 8-bit codes, which enter the high-order signals block 18-23 in the codes that are sent to the corresponding information inputs of the forming unit 24 a stream of codes, the third, fourth inputs of which receive 3v1, 3v2 sound codes. Block 24 generates a sequence of codes of video signals, sound codes, and sync codes of a line and a frame of the SSI, CSI, which are modulating carrier frequency signals in the transmitter 39 of the radio signals. At the receiving side, the radio signals are received by block 69 (Fig. 8/), detection is performed by block 71, blocks 92, 97 extract sync pulses of the SSI lines and the CSI frame, codes of the right frame go to the first receive register 74, codes of the left frame of the stereo pair go to the second receive register 84 from which the codes are distributed over their channels for processing color code codes. For the first period of 40 ms, the codes of the frame codes of six channels 75, 77, 79, 85, 87, 89 concentrate the codes of the right and left frames of the stereo pair. Starting from the second period of the frame, codes are issued from the drive codes of the frame to the blocks of pulse amplifiers 76, 78, 80 and 86, 88, 90 in the following order: the first synchronously issued a signal U _output color codes R and R ₂ from blocks 75, 85 to blocks 76 86, and with them into elements of matrix screens 81, 91 on which are displayed image frames 13 ms only in red color, and brightness, respectively, values of high order bits in codes R, and R _2, the second without interruption U signal _vyd from the first output distributor 99 pulses are issued color codes G ₂ and G with blocks 77, 87 in the blocks 78, 88 in pulsed iliteley, and with them the same element screens matrices: they displayed the same video frame for 13 milliseconds in green with the brightness accordingly quantities significant bits in the codes G and G _2, the third issued U signal _vyd from the second output of the distributor 99 pulses codes B and B ₂ from blocks 79, 89 to blocks 80 and 90 of pulse amplifiers, and from them the codes go to the same elements of the matrix of screens 81, 91, on which the same images are displayed for 13 ms in blue. That is, each frame on the screen is displayed three times in 13 ms sequentially in three colors: red, green and blue.

Sound reproduction channels conduct stereo sound accompaniment of the image. When two mono-TV channels are operating, images on the transmitting side are issued by the FDI 8 and FDI 38 matrices.

электромагнитную загрузку эфира и снизить энергопотребление передатчиком радиосигналов, усиление производится только одного сигнала вместо восьми, и получить натуральную цветовую окраску изображения на экранах воспроизведением в периоде кадра 40 мс последовательно трех цветовых изображений по 13 мс красного, зеленого и синего цветов, позволяющее сократить число элементов в матрицах экранов без снижения разрешения изображения.The claimed television system proposes the transmission of digital video information with one high-order code signal in eight-bit codes and five signals in 16-bit sound codes, which allows reducing eight times

electromagnetic load of the ether and reduce the power consumption of the radio signal transmitter, amplification is performed only for one signal instead of eight, and get the natural color of the image on the screens by reproducing in the frame period 40 ms three consecutive three color images of 13 ms red, green and blue, which reduces the number of elements in matrixes of screens without reducing the resolution of the image.

Used sources

1. RF patent No. 2410346 C1, cl. Н04N 7/00, bull. 3 from 01/27/11, prototype, p. 8 fig. 8, p. 11 fig. 3.

2. Kolesnichenko OV, Shishigin I.V. PC hardware. 5th ed., St. Petersburg., 2004, p. 832-834.

3. RF patent №82356179 C1, cl. H04N 15/00, bull.14 from 05.20.09, p.5 of figure 3, analogue.

4. Ilyin R.I. Remote control and telemetry. M., 1982, p. 269, 274 fig. 9.7.

5. RF patent No. 2298297 C1, cl. H04N 5/00, bull. 12 from 04/27/07, analogue, p.5, Fig.7.

6. Radio transmitting devices. M.S. Shumilin et al. 1981, M., p. 234, 235.

7. Tutevich V.N. Telemechanics. M., 2nd ed., 1985, p. 202 fig. 8.1, p. 207, fig. 8.7.

8. Ashkenazi G.I. Color in nature and technology. 4th ed., M., Energoatomizdat, 1985, p. 79, 3rd paragraph from above.

9. Radio communications, broadcasting and television. / Ed. A.L. Fortushenko, 1981, p. 146.

10. V.F. Barkan, V.K. Zhdanov. Amplification and impulse technology. M., 1981, p. 209.

Claims (1)

A universal television system comprising transmitting and receiving sides, the transmitting side comprises a first photoelectric converter (PEC) including a first lens and a first PZI matrix (charge injection device), the photosensitive side of which is located in the focal plane of the first lens, the first and third outputs of the first matrix PZI through the first - third diodes are connected to the inputs of the first - third pre-amplifiers, the first photomultiplier includes a second lens and a second matrix of PZI identical to the first, first - the third outputs of which are connected to the inputs of the fourth to sixth pre-amplifiers, the outputs of the first to sixth pre-amplifiers are the outputs of the first photomultiplier, the transmitting side includes the second photomultiplier from the third lens and the third PZI matrix, the photosensitive side of which is located in the focal plane of the third lens, the first the third outputs of the third PZI matrix through the fourth to sixth diodes are connected respectively to the inputs of the first to third pre-amplifiers, transmitting the sides includes six identical channels for processing video signals, each of which contains an ADC of a video signal, includes a code stream shaper, a frequency synthesizer, first and second keys, first and second self-propelled pulse distributors (SRI), the first and second ADCs of audio signals, the audio information inputs of which are fed signals, and contains a transmitter of radio signals from a series-connected carrier frequency amplifier, amplitude modulator and output amplifier, the control inputs of the first and second keys are combined and connected They are connected to the first output of the frequency synthesizer, the signal input of the first key is connected to the fifth (25 kHz) output of the frequency synthesizer, and its output is connected in parallel to the first inputs of the first, second, and third FDI matrices, the output of the second key is connected in parallel to the second inputs of the first, second, and the third matrix of FDI, the code stream generator has the first to sixth information inputs, the combined first to fifth outputs of the first SRI are connected to the fifth information input, the combined first to fifth outputs are connected to the sixth information input of the second SRI, the second output of the code stream former is connected to the control input of the first SRI, the second control input of the code stream former is connected to the fourth output of the frequency synthesizer, the third control input of which (25 kHz) is connected to the fifth output of the frequency synthesizer, the first output (25 Hz) which is connected in parallel to the fourth control input of the code stream former and to the control input of the second SRI, the second control inputs of the first and second ADCs of the sound signals are combined and connected to the fifth synth output frequency mash, to the third output of which the combined outputs of the first and second ADC sound signals are connected, the second input of the amplitude modulator is connected to the first output of the code stream former, the receiving side contains a control unit (TV channel selection), an antenna connected in series, a path for receiving and processing video signal codes from serially connected radio signal receiving unit, radio frequency amplifier and bipolar amplitude detector, the first and second identical channels for processing video signal codes, The first channel for processing video signal codes includes a first pulse shaper connected in series, the input of which is connected to the first output of a bipolar amplitude detector, a first receiving register of twenty-four bits and three color signal channels: signal channel R, signal channel G, signal channel B, each of which contains a series-connected drive frame codes and a block of pulse amplifiers, in which pulse amplifiers 8 × 10 ⁶ / 1000 × 1000 /, the first - eighth inputs of the drive of the channel code frame codes of the signal R are connected to the outputs of the first to eighth bits of the first receiving register, the first - the eighth inputs of the drive of the code codes of the channel channel signal frame are connected to the outputs of the ninth to sixteenth bits of the first receiving register, the first the eighth inputs of the drive of the code frame of signal B are connected to the outputs of 17 to 24 bits of the first receiving register, the outputs of the blocks of pulse amplifiers of the channels of color signals R, G, B are connected to the corresponding inputs from the first to 24 × 10 ⁶ the first flat-panel screen, the second channel for processing video signal codes includes a second pulse shaper connected in series, the input of which is connected to the second output of a bipolar amplitude detector, a second receiving register of twenty-four bits and three color signal channels: signal channel R ₂ signal channel G ₂ and signal channel B ₂ , each of which contains a series-connected drive of frame codes and a block of pulse amplifiers of 8 × 10 ⁶ pulse amplifiers, the first - eighth inputs of the R channel frame code store ₂ connected to the outputs of the first to eighth bits of the second receiving register, the first to the eighth inputs of the code channel frame code channel G ₂ connected to the outputs of the ninth to sixteenth bits of the second receiving register, the first to the eighth inputs of the drive codes of the frame channel signal channel ₂ connected to the outputs of 17 to 24 bits of the second receiving register, the outputs of the blocks of pulse amplifiers of color signal channels R ₂ , G ₂ , AT ₂ connected to the corresponding inputs from the first to 24 × 10 ⁶ of the second flat-panel screen, the flat-panel screens are identical, each contains a matrix of elements according to the number of samples in a row and the number of lines in a frame (1000 × 1000), the matrix elements are identical, each includes an opaque case of a corresponding shape, with a microlens in the input end, between the microlens and an output end face of the housing are arranged sequentially one after another a group of neutral microfilter filters, each of which is attached accordingly to the free end of its micropiezoelectric element, whose ends with two control inputs are rigidly fixed in the housing of the matrix element, each neutral microfilter has an absorption coefficient corresponding to the weight of the discharge of the code served by it, the microlenses of the matrix elements are irradiated with superbright white LEDs located in the corresponding quantity and in the corresponding order inside the screen housing on to its back, glasses of separate fields of view represent a frame with earbands, windows of glasses without glasses and between each other connected by a vertical axis, each window of the glasses has a removable cone-shaped hood at the end under the screen shape, a two-part hood: the first part is screwed into the glasses window, the second part is movable, extends and retracts into the first, changing the hood length, the frame code drives are identical, each includes register blocks according to the number of lines in the frame, information inputs are the first and eighth inputs of register blocks bitwise combined, the outputs are parallel outputs of all register blocks, total outputs are 8 × 10 ⁶ , the control inputs are the first - the first control input (25 Hz) of the first block of registers, the second - the combined second control inputs of the register blocks, the third - the combined third control inputs of the register blocks, each control output of the previous block of registers is the first control input for each subsequent block of registers , the control output of the last block of registers is connected in parallel to the fourth control inputs of the register blocks, the register blocks are identical, each contains the first and second keys, pulse distributor and eight registers, each of a thousand bits according to the number of samples in a row, the information inputs are the bitwise combined third inputs of the bits of eight registers, the outputs are the parallel outputs of all 1000 bits of eight registers, the control inputs are: the first is the first control input of the first key, the second - signal input of the second key, the third - signal input U _d , of the first key, fourth - the first control input of the second key, the output of the first key is connected to the input of the pulse distributor, the outputs of which are sequentially connected to the first, clock, bit inputs in parallel with eight registers, the last output is the control output to the next block of registers and connected to the first control the input of the first key, the output of the second key is connected in parallel to the second inputs of the bits of eight registers and to the second control U ₃ the input of its key, the channel for generating control signals includes serially connected block allocation of horizontal sync pulses (SSI), a frequency synthesizer, a first key, a pulse counter and a decoder, and a block selection of frame synchronization pulses (CSI), a block of allocation SSI and a block selection CSI are identical, each includes the pulse counter and the decoder connected in series, the output of which is the output of the unit, include the element NOT, the first and second diodes, the information input is the counter input of the pulse counter, controlling their input is the input of the first diode, the output of which is connected to the control input U ₀ pulse counter, the decoder output through the second diode is connected to the output of the element NOT, and together they are connected after the first diode to the control input of the pulse counter, the information input of the SSI allocation unit is connected to the output of the first pulse shaper, the control input is connected to the output of the second pulse shaper, to which the information input of the CSI selection block is connected, the control input of which is connected to the output of the first pulse shaper, the output of the SSI selection block is connected to the first input of the synthesizer frequencies to the first control input U _from the first key of the channel for generating control signals and to the combined second control inputs (25 kHz) of the frame code drives, the output of the CSI allocation unit is connected to the combined first control inputs (25 Hz) of the corresponding two frame code drives, the second control input of the first key and the control input U _about the pulse counter of the channel for generating control signals are combined and connected to the second output of the decoder of its channel, the second control inputs of the frequency synthesizer are connected respectively to the second outputs of the control unit (select TV channels) of the receiving side, the frequency synthesizer of which generates clock pulses from the second output, and pulses from the third output the sampling frequency of sound codes, characterized in that on the transmitting side, a signal extraction unit is introduced in every first to sixth channel for processing video signals la high-order code of the video signal, the first and eighth inputs of which are connected to the first and eighth ADC outputs of the video signal of its channel, the first control inputs of the ADC of video signals, signal high-order signal allocation blocks and the signal input of the second key are combined and connected to the second output (25 MHz) of the synthesizer frequencies, the second control inputs of the high-order code signal allocation blocks are combined and connected to the seventh output of the frequency synthesizer, the first - the eighth outputs of the high-order code signal allocation blocks the first, second and third channels of video signal processing are connected to the first information input of the code stream generator, the first and eighth information of which are connected to the first and eighth outputs of the high-order code signal allocation blocks of the fourth and sixth video signal processing channels, the first control input of the code stream generator is connected to the second output frequency synthesizer, to which the first control inputs of the first and second ADCs of the sound signals are connected, the input of the carrier frequency amplifier of the transmitter for the signals are connected to the sixth output of the frequency synthesizer, the blocks for extracting the signal of the highest category of the video signal code are identical, each includes a series-connected key and an eight-bit register, the first and eighth inputs of which are the information inputs of the block and are connected respectively to the first and eighth outputs of the ADC video signals of its channel, the outputs of the block are the outputs of the first to eighth bits of the register, which are connected to the corresponding information input of the shaper code stream, block allocation Tarsch discharge video code comprises first to eighth diodes, each diode input connected to the output of its discharge into the register and the outputs of the diodes are combined and connected to the second control U _s the key input, the first control input of which is connected to the second output (25 MHz) of the frequency synthesizer, the key signal input is the control input of the signal allocation block of the high-order code and connected to the seventh output (200 MHz) of the frequency synthesizer, identical first and second are introduced into the transmitting side channels for processing sound codes, each channel includes serially connected ADCs of the sound signal, a high-order signal extraction unit for the sound code, and an encoder, the first and fifth outputs of which are connected respectively to the third to the fourth information inputs of the code stream generator, the signal separation blocks of the high order code of the sound code are identical, each contains a series-connected key and a sixteen-bit register, the first to sixteenth of which are the information inputs of the block and are connected respectively to 1-16 ADC outputs of the sound signal of the channel, block outputs are the outputs of the first to sixteenth bits of the register and are connected respectively to the first to sixteenth inputs of the encoder of their channel, the signal allocation unit and the high-order bit of the sound code includes sixteen diodes, the input of each diode is connected to the output of its bit in the register, and their outputs are combined and connected to the second control U _s key input, first control input U _from which is connected to the second output of the frequency synthesizer, the key signal input is the control input of the high-order code signal isolation block and is connected to the eighth output (400 MHz) of the frequency synthesizer, the first and fifth outputs of the encoder of the first channel for processing audio codes are connected to the third information input of the code stream generator , to the fourth information input of which the first to fifth outputs of the encoder of the second channel for processing sound codes are connected, in the shaper of the stream of codes the first and second blocks of AND elements twenty-four And elements are swept, the first and second SRIs have twenty-four outputs each, the third and fourth SRIs also have 24 outputs each, in the third channel the blocks of AND elements contain five And elements, and the pulse counter is ten-digit, on the receiving side the first the channel for processing video signal codes, the first key is inserted, the signal input of which is connected to the output of the first pulse shaper, the output of the first key is connected to the information input of the first receiving register of twenty-four bits, the second channel is processed the video key codes are entered the second key, the signal input of the second key is connected to the output of the second pulse shaper, the output of the second key is connected to the information input of the second receiving register of twenty-four bits, the first control inputs of the first and second keys are combined and connected through the first diode to the output of the allocation unit SSI, and through the second diode are connected to the output of the CSI allocation unit, the second control inputs of the same keys are combined and connected to the first output of the decoder in the control channel signal, in which the pulse counter is ten-digit, a second key and a pulse distributor are connected in series to the control signal generation channel, the signal input of the key is connected to the fifth output of the frequency synthesizer (75 Hz), the first control input is connected to the output of the CSI isolation unit, the first output of the distributor pulses connected in parallel to the first control inputs of the drive codes of the frame frame of the color signal channels G and G ₂ , the second output of the pulse distributor is connected in parallel to the first control inputs of the drive codes of the frame in the channels of color signals B and B ₂ , the second output is also connected to the second control U _s to the input of the second key, the frequency synthesizer gives out pulses of frequency 25 MHz of sampling the codes of the video signals from the first output, from the fourth output sinusoidal vibrations of the corresponding carrier frequency to the third input of the radio signal receiving unit, from the fifth output - 75 Hz pulses to the signal input of the second key input into the channel control signals, in each drive of frame codes in all register blocks of the second to eighth bits of the information input through diodes are combined and connected to the input of the first code bit, each the matrix element during the frame period gives three monochromatic radiations of R, G, B colors, each of which lasts one third of the frame duration, in each matrix element between the microlens and the group of neutral microfilter filters, a group of three color microfilter colors of R, G, B, each of which serves the first bit of its color code, a color micro-filter is attached to the free end of its micro-piezoelectric element, the first end of which with two control inputs is rigidly fixed in the housing of the element, the radiation flux after the microlens is colored with a color microfilter and, accordingly, a code is supplied to one corresponding neutral microfilter, the absorption coefficient of which determines the brightness of the output color radiation from the matrix element to the glass screen, the sound reproduction channels are identical, each includes a series-connected key, register block, decoder, digital-to-analog converter (DAC), power amplifier and loudspeaker, signal input of the first key anal connected to the output of the first pulse generator, a second channel key signal input connected to the output of the second pulse generator, the first control inputs U _from keys are combined and connected to the first output of the decoder channel forming control signals, the second control U _s the key inputs are combined and connected to the second output of the decoder, the register block in the channels is identical, each contains a fifteen-bit register and three keys serving it, the information input of the register block is also the information input of the register connected to the key output of its channel, the first control inputs of the register blocks of both channels combined, connected to the second output (U _t ) frequency synthesizer, second control U _out their inputs are combined and connected to the third output (75 kHz) of the frequency synthesizer, the signal inputs of the three keys are combined, connected to the second control input of the register block, the second input of the register is the first control input of the register block, the output of the first key is connected to the third control U _out register input to its second manager U ₃ entrance and to the first manager U _from the input of the second key, the output of which is connected to the fourth control U _out input to its second control input U _s and to the first manager U _from the input of the third key, the output of which is connected to the fifth control U _out register input, to its second control input and to the first control U _from the first key input, 1-5, 6-10 and 11-15, the register outputs are bitwise combined, and the first - fifth outputs of the register block are connected to the first to fifth inputs of the decoder of their channel, 1-16 outputs of the decoder of each channel are connected to 1-16 inputs each DAC, which are identical, each includes a block of pulse amplifiers, the number of bits in the code is sixteen pulse amplifiers, the inputs of which are DAC inputs, the emitting matrix of pulse LEDs from sixteen white LEDs, the input of each LED is connected to its pulse amplifier, each pulse LED has a neutral light filter with a radiation absorption coefficient according to the binary code principle of the corresponding discharge of the code, includes a lens whose optical axis coincides with the optical axis of the LED emitting matrix, in the focal plane of the lens there is a corresponding photodetector, the output of which is connected to the input of the operating amplifier, the output of which is the output of the DAC and is connected to the input of the power amplifier of the sound reproduction channel.

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