RU2452100C1 - METHOD AND DEVICE FOR MESSAGE TRANSFER USING FIBONACCI p-CODES - Google Patents

Abstract

FIELD: electricity.

SUBSTANCE: device for message transfer using Fibonacci p-codes contains a processor (via a bi-directional control bus connected to the general-purpose register to the serial input whereof a receiver is connected) as well as a transmitter and a clock frequency generator and (serially connected) a pseudorandom sequence builder and the transmitter Module 2 addition circuit, the pseudorandom sequence register. The method describes this device work.

EFFECT: enhanced reliability of the transmitted and the received signals synchronisation; enhanced security of information transfer.

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Description

The invention relates to the field of telecommunications and can be used to create noise-immune systems for radar, radio navigation and information transfer.

Known methods for digital messaging, for example, according to the patent of the Russian Federation No. 2233007, "A method of transmitting information with Fibonacci p-codes on multipath channels with scattering", described in the book of V. Zhuravlev. Search and synchronization in broadband systems. M .: Radio and communication, 1986. 240 p.

The possibility of multipath propagation leads to the possibility of structural interference, leading to a failure of synchronization. This leads to the loss of transmitted information, the complexity of the reception equipment, a decrease in the speed of information transfer through communication channels.

Closest to the proposed one is the method described in RF patent No. 2233007, “Method for transmitting information with Fibonacci p-codes on multipath channels with scattering”, G08C 19/24, H03M 7/28, adopted as a prototype.

In the prototype method, information is transmitted over multipath channels with scattering using the Fibonacci p-code, in which the parameter p represents the integer part of the product of the maximum propagation delay time of the signal by the channel bandwidth.

The disadvantage of the prototype method is the complexity of synchronization between transmitted and received information.

The objective of the proposed method is to increase the reliability of synchronization in the delivery of information via multipath channels with scattering.

To solve the problem in the method of transmitting messages with Fibonacci p-codes, where the parameter p is the integer part of the product of the maximum propagation delay time of the signal by the channel bandwidth, according to the invention, on the transmitting side, the message source code is converted into a serial Fibonacci p-code generated a pseudo-random sequence (PSP) is added modulo 2 with the Fibonacci p-code of the message source and transmitted to the communication channel; on the receiving side, the received signal is sequentially shifted in accordance with the clock frequency signals, summed modulo 2 bitwise with a memory bandwidth similar to that generated on the transmitting side, the received signals are summed in binary code and compared with the set threshold, in the case when the total signal is lower than the threshold, a signal is generated by which the Fibonacci p-code is extracted from the message source.

The proposed method is as follows. On the transmitting side, the source code of the message is converted into a serial Fibonacci p-code, is folded synchronously modulo 2 with a generated pseudo-random sequence (PSP) and transmitted to the communication line. At the receiving side, the received signal is sequentially shifted in accordance with the clock signals, is added modulo 2 bitwise from the SRP, similar to that generated on the transmitting side. The received signals are summed in binary code and compared with the set threshold. In the case when the total signal is lower than the set threshold, a signal is generated by which the Fibonacci p-code is extracted from the message source.

Known messaging systems, for example, according to RF patents No. 2376703, “Broadband signal search device”, No. 2190299, “Reception device with a two-stage noise-like signal search” are based on the use of broadband signals (SHPS) as an information carrier. A complex signal is formed in the transmitter having such a structure that allows the receiver to select the main correlation peak, according to which synchronization is performed at the receiving end. The presence of a complex structure makes it possible to provide noise immunity and the ability to separate individual beams during multipath signal propagation in communication channels, however, the main obstacles when using these systems are the complexity of the equipment for searching and synchronizing ShPS receivers. In known systems, the solution to the synchronization problem is associated with determining the parameters of the received signals (delay, frequency, phase) and the formation of reference signals, the parameters of which are uniquely associated with the parameters of the transmitted BSS.

The disadvantages of the known devices is the loss of transmitted information, the complexity of the reception equipment.

The closest in technical essence to the proposed one is the device presented in RF patent No. 2233007, “Method for transmitting information with Fibonacci p-codes on multipath channels with scattering”, G08C 19/24, H03M 7/28, adopted as a prototype.

The scheme of the prototype device is shown in figure 1, where it is indicated:

1 - processor; 2 - universal register; 3, 12 - bidirectional tires; 5 - clock generator; 13 - the element And; 7 - transmitter; 8 - receiver.

The prototype device contains a processor 1 connected by bidirectional buses 3 and 12 with a universal register 2, a unidirectional bus with an element And 13, the second input of which is connected to the output of the clock generator 5, the serial output of the universal register 2 is connected to the input of the transmitter 7, and the serial input is with the output of the receiver 8, in addition, the output of the element And 6 is connected to the clock input of the universal register 2.

The prototype device operates as follows. A Fibonacci p-code is generated in the processor 1 of the counting-decisive block, which is written through the bi-directional data bus 12 to the universal register 2. At the same time, a low potential is set at the second input of the And 13 element, which prohibits the passage of pulses of the clock generator 5 to the clock input of the universal register 2. After writing the Fibonacci p-code in the universal register 2, the potential at the second input of the element 13 becomes high, and at the input of the element 13 there are pulses connected to the clock input of the universal register 2. In After the end of the transmission of the Fibonacci p-code, a low potential is established at the second input of element 13, and universal register 2 stops shifting recorded information.

The disadvantage of the prototype device is the loss of transmitted information due to unreliable synchronization of transmitted and received signals.

The objective of the proposed device is to increase the reliability of synchronization between transmitted and received signals.

To solve the problem, a Fibonacci p-code message transmission device containing a processor coupled to a bi-directional control bus with a universal register, to a serial input of which a receiver is connected, as well as a transmitter and a clock generator, are introduced in series with the PSP driver and the addition circuit transmitter module 2, the output of which is connected to the transmitter, the output of the sequential Fibonacci p-code generator is connected to the second input of the addition circuit module 2 of the transmitter, as well as the SRP register, the parallel outputs of which are connected to the second inputs of the corresponding N addition circuits modulo 2 receivers, the first inputs of which are connected to the corresponding parallel outputs of the universal register, the outputs of N addition circuits modulo 2 receivers are connected to the corresponding inputs of the processor, moreover, the output of the clock generator is connected to the clock inputs of the PSP shaper, the Fibonacci p-code shaper, the universal register, the PSP register and the processor.

The scheme of the proposed device is presented in figure 2, where it is indicated: 1 - processor; 2 - universal register; 3 - bidirectional control bus; 4 - shaper pseudo-random sequence (PSP); 5 - clock generator; 6 is a diagram of addition modulo 2 transmitters; 7 - transmitter (PRD); 8 - receiver (PFP); 9 - shaper sequential p-Fibonacci code; 10 - register PSP; 11.1 ÷ 11.N - adders modulo 2 receivers.

The proposed device contains a source and a receiver of messages, a processor 1 connected by a bi-directional control bus 3 with a universal register 2, as well as a pseudo-random sequence generator 4, the output of which is connected to the first input of the addition circuit 6 modulo 2 of the transmitter, the output of which is connected to transmitter 7. In addition Moreover, the output of the clock generator 5 is connected to the clock inputs of the former PSP 4, the sequential Fibonacci p-code generator 9, the SRP register 10, the processor 1 and the universal register 2, followed by the main input of which is connected to the receiver 8. In this case, the parallel output (data bus in FIG. 2 is not shown) of the universal register 2 is connected to the first inputs of the respective adders 11 modulo 2 receivers, the second inputs of which are connected to the corresponding parallel outputs (data bus in FIG. .2 not shown) of the SRP register 10. The outputs of N adders 11 modulo 2 receivers (the data bus is not shown in FIG. 2) are connected to the corresponding inputs of the processor 1.

The inventive device operates as follows.

On the transmitting side, the selected pseudo-random code is set in the PSP 10 register, and a similar pseudo-random binary sequence is generated in the PSP 4 generator, the duration of an individual bit of which is determined by the frequency of the clock 5. In the synchronizer with the pseudo-random sequence, the message source code is converted to the Fibonacci serial p-code in the shaper 9. At the output of circuit 6, a sum is generated modulo 2 of the pseudo-random sequence and the Fibonacci p-code of the message source I, which using transmitter 7 is transmitted to the communication line.

On the receiving side, the signal is received by receiver 8 and fed to the serial input of universal register 2. When binary pulses are continuously fed to the serial input of universal register 2 according to the clock pulses of generator 5, the cascades of universal register 2 are sequentially filled by them. In the case of a received signal from circuits 6 through the threshold value in the processor 1, a command is generated for storing the code generated by the circuits 11, and converting it into a received signal issued by message receiver.

Here is an example of using the proposed method and device for transmitting messages with p-Fibonacci codes.

Let the pseudo-random sequence 31 bits long of the following form be used as a carrier (shaper 4):

00001001011001111100011011010100001001 ...

To transmit the information, we use the Fibonacci p-code with p = 7, which is represented by table 1. We will transmit the decimal number 23 from the message source, which in table 1 is the Fibonacci p-code: 000000000010000000000100000000.

The summation of these two numbers modulo 2 gives:

0000100101000111110000010100001.

This sequence will be transmitted to the communication channel, and the same sequence will be received by the receiver 8. Suppose that the threshold is set at 3 units. For any combination except synchronous, when summing with the code 000010010110011111000110110101, the number of “units” in the sum will be significantly greater than the threshold value. In these cases, the absence of a clock will be considered. And only with synchronous coincidence, the sum of “units” will be equal to 2 (or slightly more if there is distortion during transmission over the communication channel). This corresponds to the acceptance of the transmitted Fibonacci p-code of the number 23: 00000000001000000000010000.

Since “units” are quite rare in the Fibonacci p-code, it will be easy to identify distorted combinations of the received code and possibly correct it.

Thus, the proposed method and device can improve the reliability of synchronization in the delivery of information in multipath conditions during the propagation of a useful signal.

In addition, the proposed method provides secrecy in the transmission of information, since a relatively rare number of units in the transmitted code can be perceived as natural distortions in the transmission of a pseudorandom sequence that is widely used in communication systems.

Claims (2)

1. The method of transmitting messages with Fibonacci p-codes, where the parameter p represents the integer part of the product of the maximum propagation delay time of the signal by the channel bandwidth, characterized in that on the transmitting side, the message source code is converted into a pseudo-random Fibonacci p-code the sequence (PSP) is added modulo 2 with the Fibonacci p-code of the message source and transmitted to the communication channel; on the receiving side, the received signal is sequentially shifted in accordance with the clock signals, summed modulo 2 bit by bit with the SRP similar to that generated on the transmitting side, the received signals are summed in binary code and compared with the set threshold, in the case when the total signal is lower than the threshold, form the signal by which the Fibonacci p-code is extracted from the message source. 2. A device for transmitting messages with Fibonacci p-codes, comprising a processor connected by a bi-directional control bus with a universal register, to the serial input of which a receiver is connected, as well as a transmitter and a clock generator, characterized in that the PSP driver and the modulation addition circuit are introduced in series 2 transmitters, the output of which is connected to the transmitter, the output of the sequential Fibonacci p-code generator is connected to the second input of the addition circuit modulo 2 of the transmitter, as well as PSP Ist, the parallel outputs of which are connected to the second inputs of the respective N addition circuits modulo 2 receivers, the first inputs of which are connected to the corresponding parallel outputs of the universal register, the outputs of N addition circuits modulo 2 receivers are connected to the corresponding inputs of the processor, and the output of the clock generator is connected with clock inputs of the PSP shaper, the Fibonacci r-code shaper, the universal register, the PSP register and the processor.

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