JP2823341B2 - Spread spectrum communication system and apparatus - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a spread spectrum communication system and apparatus suitable for communication using a power line as an information transmission path.

[Conventional technology]

Since power lines are found in all households, they are economical and scalable and are very effective information transmission media when viewed as home information transmission media. , Air conditioners, TVs, etc., are connected, so the transmission characteristics of the power line change moment by moment due to the use and immortal use (N / FF of power supply, etc.) of these electric devices. For example, in the case of a device using a TV or a switching power supply, the transmission characteristics change rapidly in synchronization with the power supply frequency.

As described above, the transmission characteristics of the power line are not flat and unstable, so that there is a problem that high-quality data transmission is difficult.

As countermeasures, for example, the literature "Power Line Communication (Data Transmission)", IEICE Technical Report SSTA89-7 (1989), and the literature "High Performance SS Power Line Modem" NEC Technical Report Vol.42 No.9 pp.98 −106 (1
As described in 989), the introduction of a spread spectrum communication system (hereinafter referred to as an SS communication system), which is considered to be resistant to fluctuations in the transmission path, is being studied.

In this SS communication method, data to be transmitted is 1 to 0
Each time a transition from 0 to 1 occurs, the PN (Pseudo Noi
s) A code transformation method for inverting the sequence is used. In order to demodulate the received signal, it is necessary to generate the same sequence synchronized with the PN sequence used on the transmission side on the receiver side. For this reason,
The correlation between the received signal and the received PN sequence generated in the receiver is monitored, and if the correlation value exceeds a certain threshold, synchronization is supplemented (synchronization detection), and synchronization is maintained after synchronization acquisition. Hold synchronization (synchronization tracking). After the synchronization is established, if the correlation value is on the + side with respect to the threshold value, it is demodulated to logic "1", and if it is on the one side, it is demodulated to logic "0".

A sliding correlator (Sliding corr)
elator), the correlator shifts the generation timing of the PN sequence generated on the reception side by a minute frequency with respect to the generation timing of the PN sequence on the transmission side,
Since the correlation between both PN sequences is obtained, there is an advantage that the circuit configuration is simple.However, since the difference between the two PN sequence generation frequencies cannot be made so large, the sliding speed cannot be increased, and it takes time to establish synchronization. However, there is a disadvantage that the effective transmission speed is significantly reduced.

When a digital DLL is used to maintain synchronization, when the above-mentioned transmission characteristics fluctuate at high speed, the shape of the correlation function is disturbed and changes suddenly, making it impossible to follow up. There is a problem that it is easy and the reliability is low.

Furthermore, on the transmitting side, two types of independent PN sequences are prepared,
An SS communication method in which a PN sequence is switched and transmitted each time a transition from 1 to 0 or from 0 to 1 occurs in data to be transmitted has been proposed, but a band-limited transmission path such as a power line (for example, In the case of a power line, the band is limited to 10 to 450 KHz by the Radio Law.) In order to obtain a sufficient spreading factor, the transmission speed must be limited.

The present invention has been made to solve the above problems,
Compared with the conventional method, synchronization can be established in a short time, it can sufficiently follow sudden changes in transmission characteristics, and highly reliable transmission can be performed even if the data transmission speed is high. It is an object to provide a spread spectrum communication system and apparatus.

[Means for solving the problem]

In order to achieve the above object, the present invention employs a standard
A PN sequence and n-1 PN sequences sequentially shifted by a predetermined phase from this reference PN sequence are generated, and log ₂ n
= M bits (M is an integer of 2 or more) of binary digital data are transmitted in correspondence with each other.
Generates the same PN sequence as the sequence, finds the correlation between these PN sequences and the received signal, detects the peak value and the peak position from these correlation values, and tracks the peak position to perform synchronization control And demodulates M-bit binary digital data allocated to the PN sequence from which the peak value is maximum.
The series are configured to be out of phase with each other by at least ± 1 chip of the shift register.

Claim 3 relates to the invention of the device, wherein the reference PN sequence and the reference
N-1 based on the PN sequence (= 2 ^M -1,3 <n <the code length) PN sequence generator the number of PN sequence generated by shifting by a predetermined phase with each other, each PN sequence, log ₂ n = M-bit 2
A transmission unit having a selector for transmitting the data in correspondence with the binary digital data, n correlators for obtaining the correlation values between the n PN sequences and the received signal, and inputting the outputs of the correlators and Different M for the correlator
A comparator for allocating binary data of bits and outputting the allocated M-bit binary data in response to an input from the correlator having the largest output value; a latch circuit for latching the output of the comparator; A selector for inputting the output of the correlator and selecting a signal having the maximum output value, a peak detector for inputting the output of the selector and detecting a peak value and a peak position,
A configuration is provided that includes a receiving unit including a synchronization control unit that sends a latch signal synchronized with the peak position to the latch circuit and controls a clock phase supplied to each of the correlators to track the peak position.

According to a fourth aspect of the present invention, the PN sequence generation circuit includes a reference PN sequence generator and a shift register with a plurality of taps that receives an output of the reference PN sequence generator.

According to a fifth aspect, the PN sequence generating circuit has a configuration in which the shift register has n-1 tap outputs and feeds back the final stage output to the first stage.

In the sixth aspect, the correlator is a matched filter.

[Action]

According to the present invention, on the transmitting side, a first PN sequence, a second PN sequence,...
..The n-th PN sequence is assigned and transmitted, and the receiving side detects the PN sequence having the maximum correlation output from the comparison of the correlation output between the received signal and the n PN sequences generated by the receiving unit. A peak appearing in the maximum correlation output is detected, and in synchronization with this peak, M-bit data allocated to the PN sequence having the maximum correlation output is demodulated.

In the present invention, since a plurality of bits are assigned to one PN code, the transmission speed can be increased as compared with the case where one bit is assigned.

In the present invention, since the magnitude of all correlation outputs is compared to determine which PN sequence is the received PN sequence, this determination can be made accurately and reliably, and the magnitude relationship between the correlation output and the threshold is determined. Since the demodulation is not based on, even if the shape of the correlation output changes suddenly due to a sudden change in the transmission characteristics,
It suffices if only the peak of the correlation output (peak value and peak position) can be detected, and stable synchronization acquisition, synchronization holding, and data demodulation can be performed.

〔Example〕

 Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 shows the transmission section in a block configuration, and FIG. 2 shows the reception section in a block configuration.

In FIG. 1, 1 is a 5-stage shift register, and 2 is an EXOR.
Gates, both of which constitute a reference PN sequence generator 3. The output of a specific stage of the shift register 1 is input to the EXOR gate 2, and the output of the EXOR gate 2 is fed back to the input of the shift register 1. In this embodiment, a value other than “00000” is set as an initial value in the shift register 1 to obtain an M-sequence code having a code length L = 31. The output of the PN sequence generator 3 is defined as PN. It is assumed that the clock speed of the clock c applied to the PN sequence generator 3 is much higher than the data transmission speed. Reference numeral 4 denotes a delay unit. In this embodiment, the delay unit includes a 23-stage shift register having taps 4A and 4B at the seventh and fifteenth stages, and receives the output of the PN sequence generator 3 to generate the PN sequence. Driven by the same clock c as the clock c given to the
PN sequence PN1 delayed by 7 chips from each of taps 4A and 4B, PN sequence PN2 delayed by 15 chips
PN sequence PN delayed 23 chips from the last stage
Outputs 3. Reference numeral 5 denotes a timing signal generator, which is composed of an AND gate. The AND gate 5 takes the AND of the outputs of all the stages of the shift register 1. And a timing signal for synchronizing with the PN sequence. Reference numeral 6 denotes a selector, which is "0" for M = 2 bits of the transmission data D.
When `` 0 '', select PN, and when `` 11 '', select PN1 and SS
When the signal is "10", PN2 is selected. When the signal is "01", PN3 is selected and the SS signal is transmitted. This SS signal is band-limited by the low-pass filter LPF7 (for power line data transmission). Is amplified to a predetermined level by a transmission amplifier (not shown), and then sent out to the transmission line 10 via a coupler (not shown).

FIG. 5 shows the relationship among PN, PN1, PN2, PN3, and PT.

FIG. 6 shows an example of the SS signal when the transmission data D is “0001111011”.

In the receiving section of FIG. 2, 11A is a PN correlator (PN.
CORR, matching filter), the received signal and the PN sequence PN
The correlation value COR with is output. 11B is a PN1 correlator (PN1.C
ORR, matching filter), and outputs a correlation value COR1 between the received signal and the PN sequence PN1. 11C is a PN2 correlator (PN2.COR
R, a matching filter), and outputs a correlation value COR2 between the received signal and the PN sequence PN2. 11D is a PN3 correlator (PN3.CORR,
And outputs a correlation value COR3 between the received signal and the PN sequence PN3. As shown in FIG. 4, the correlators 11A to 11D multiply the value of each stage of the shift register 21 to which the A / D converted received signal is input by the value of each stage of the PN code pattern generator 22. , The multiplied value is added by an adder 23.

Reference numeral 12 denotes a comparator, which receives the correlation values COR to COR3 and compares the magnitudes.
Outputs `` 0 '', outputs a logic `` 11 '' if COR1 is maximum, outputs a logic `` 10 '' if COR2 is maximum, outputs a logic `` 01 '' if COR3 is maximum . . These outputs are supplied to the latch circuit 13. Reference numeral 14 denotes a selector for selecting the maximum value output, and the four correlation values (signals) COR described above.
CCOR 3 and the signal having the highest level is supplied to the peak detector 15.

Peak value V _P between the peak detector 15 is of one cycle of the PN sequence _{PN~PN3 (V po, V P1,} V p2, V P3) and the peak position (synchronization _{point) T P (T P0, T} P1, T _P2 , T _P3 ) is detected and the synchronization control unit
Send to 16. Synchronization control unit 16, the pre-synchronization acquisition, provide a selection signal S _S to the selector 14, synchronization after acquisition, the latch a latch signal S _L synchronized to the peak position _{(T P0, T P1, T} P2, T P3) Supply to the circuit 13 and the peak position T _P0 ,
Correlators 11A, 11 so that T _P1 , T _P2 and T _P3 are not lost.
B, 11C, and controls the clock C _S given to 11D to track the peak position T _P.

Next, the operation of this embodiment will be described with reference to FIGS. 7 (a) to 7 (d). FIG. 7 (a) shows the transmission data "PN, PN
, PN "(000000) when receiving PN correlator 11A
7 (b) shows the transmission data "PN1, PN, P
The correlation output of the PN1 correlator 11B when receiving "N1" (110011) is shown in FIG. 7C. The transmission data "PN2, PN, PN2" (10
0010) when the correlation output of the PN2 correlator 11C is received,
FIG. 6D shows the correlation output of the PN3 correlator 11D when the transmission data "PN3, PN, PN3" (010001) is received.

(1) Synchronization Acquisition When performing SS communication, first, the transmission unit continuously transmits "11" as a synchronization signal. At the stage are not synchronized, the synchronization control unit 16 to the selector 14 by sending a selection signal S _S, to select the output of PN1 correlator 11B. Peak detector 15 is input to the synchronization control unit 16 of the peak information by detecting a peak P ₁ of each PN sequence one cycle of the output COR1 correlator 11B for PN1, the synchronization control unit 16, this peak P ₁ When the same peak position _TP1 occurs continuously over a plurality of cycles, it is determined that communication has started. At this time, since the peak position T _P0 output COR of PN correlator 11A comes into a position delayed about seven clock against T _P1, it is also this use of the peak position T _P0 to confirm the synchronization acquisition.

(2) Synchronization tracking When the synchronization acquisition is completed, the selector 14 sets the correlation output COR
最大 COR3 is selected and given to the peak detector 15. At the outputs of the correlators 11A to 11D, a secondary peak P 'appears between the peaks P whose peak positions must be tracked. Peak P 'is ignored, and the synchronously acquired peak position
_{T P0, T P1, T P2} , and controls the clock C _S so as not to lose T _P3. Since this secondary peak P 'is generated at a position shifted by 7 chips or more from the peak position that requires tracking, it can be easily identified, and the synchronization control unit 16 synchronizes with the peak position of the peak P. latching a latch signal S _L circuit 13
Sent to, the latch circuit 13 latches the output of the comparator 12 for each receiving a latch signal _{S L, COR, COR1, COR2} , C
OR3 is demodulated as logic "00", "11", "10", "01", respectively.

As described above, in this embodiment, a peak that appears in each cycle of the received PN sequence is detected, and this peak is detected by the correlators 11A and 11A.
When appearing on the output of B, 11C, 11D, the logic "0
0, 11, 11, 10 and 01, and if it is possible to determine which correlator the peak appears in, it is possible to demodulate the data, and for one PN sequence, instead of 1 bit, log ₂
Since n = M = 2 bits are allocated, the transmission speed can be increased as compared with the conventional case where “1” and “0” are allocated.

In this embodiment, the correlation outputs COR, COR1, COR2, COR
Comparator 12, which compares the size of OR3 and selects the largest one,
Since it is sufficient that the selector 14 and the peak detector 15 determine the received PN sequence and detect only the peak value and peak position of the correlation output, this determination can be made accurately and reliably, and the magnitude of the correlation output and the threshold value can be determined. Since the signal is not demodulated based on the relationship, even if the transmission characteristics change suddenly and the waveform of the correlation output changes suddenly, stable synchronization acquisition and synchronization can be performed. Can be done.

Further, in the present embodiment, since the matched filters are used as the correlators 11A to 11D, it is possible to perform the synchronization acquisition at high speed.

Note that the number n of PN sequences is n = 4 in this embodiment, and 2
Although the bit number M of binary digital data is M = 2 bits, the transmission speed can be further increased by increasing the number of PN sequences to n and the number of bits further. PN1, PN2, PN3 are P
Although the phases are shifted from N by 7, 15, and 23 chips, respectively, the n PN sequences are 1
It suffices if it is shifted by more than a chip.

Further, since PN1, PN2 and PN3 are obtained through the delay unit 4 with tap, there is an advantage that only one reference PN sequence generator 3 is required as the communication-side PN sequence generator. , One shift register (in this example, 31
(Stage shift register) 40.

Of course, n independent PN sequence generators (where each PN sequence is out of phase with each other by one chip or more) may be prepared.

Further, in the present embodiment, as described above, instead of specifying and limiting the combination of codes in the PN sequence, the shift register 1
It is only necessary to shift by more than a chip, so the SS of a certain system
If SS signals are present on the transmission path from another system during communication between the motems, even if a collision occurs using a different PN sequence with a small cross-correlation between the two systems,
Demodulation can be performed with high probability.

Also, when a plurality of communication terminals are present in one system, it is possible to allocate a different PN sequence having a small mutual relation to each communication terminal so that demodulation can be substantially performed even if a collision occurs. Further, each PN sequence can be used as an address of each communication terminal. In this case, each communication terminal can be identified by the PN sequence. Of course, instead of different PN sequences having a small cross-correlation, it is also possible to use the same PN sequence in which the phases are shifted, and in this case, it is necessary that the phase shift amounts do not overlap each other.

In the above embodiment, the clock C _S for synchronization tracking
The peak position information described above is observed, and as shown in FIG. 2, feedback is provided from the synchronization control unit 16 to the peak detector 15 to control the timing of the observation. You may.

Further, a circuit for detecting the maximum value of the correlation outputs COR, COR1, COR2, COR3 may be shared by the comparator 12 and the selector 14.

Further, an adder can be used in place of the selector 14 in FIG.

〔The invention's effect〕

As described above, the present invention prepares n PN sequences whose phases are shifted from each other on the transmitting side, and sets each of them to Mbit (M ≧ M).
Since the digital data of 2) is made to correspond, the receiving side detects the correlation between the received signal and the n PN sequences generated on the receiving side, and the peak value of the correlation output appears in any of the correlation outputs. , Because the logic is demodulated by judging the received PN sequence, the transmission speed can be improved as compared with the conventional case, and the demodulation is performed based on the magnitude relationship between the correlation output and the threshold value. In comparison, even when the transmission characteristics change rapidly, stable communication can be performed.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a transmitting unit in an embodiment of the present invention, FIG. 2 is a block diagram showing a receiving unit in the above embodiment, FIG. 3 is a block diagram showing another example of the transmitting unit, FIG. Is a block diagram showing a correlator in the above embodiment, FIG. 5 is a timing diagram showing a relationship between a PN sequence and a timing signal PT in the above embodiment, and FIG. 6 shows an example of an SS signal transmitted by a transmission unit. FIGS. 7A to 7D are diagrams showing examples of the correlation output of the correlator in the above embodiment. 1 ... shift register, 2 ... EXOR gate, 3 ... reference
PN sequence generator, 4 ... delay unit, 4A, 4B ... tap, 5 ...
... Timing signal generator, 6, 13 ... Selector, 7 ...
LPF, 10: power line as a transmission line, 11A to 11D: correlator, 12: comparator, 14: latch circuit, 15: peak detector, 16: synchronization control unit. 40 ... Shift register.

Claims (7)

(57) [Claims] In a spread spectrum communication in which transmission data is subjected to code transformation with a PN sequence and communicated, on the transmission side, a reference PN sequence having a predetermined code length and n-phase signals sequentially shifted by a predetermined phase with respect to the reference PN sequence. 1 (n = ^2M , 3 <n <the above code length) PN sequences are generated, and log ₂ n =
The M-bit binary digital data is transmitted in correspondence with each other, and the receiving side generates the same PN sequence as each of the above PN sequences, calculates the correlation values between these PN sequences and the received signal, and calculates the correlation values of these correlation values. Detect peak values and peak positions from among them, track these peak positions, perform synchronization control, and demodulate M-bit binary digital data assigned to the PN sequence from which the largest peak value was obtained. A spread spectrum communication system characterized by the following. 2. Each of the n PN sequences is connected to a shift register ±
2. The spread spectrum communication system according to claim 1, wherein the phase is shifted by one chip or more. 3. A reference PN sequence and n-1 based on the reference PN sequence.
A PN sequence generating circuit for generating (= 2 ^M -1, 3 <n <the above code length) PN sequences by shifting them by a predetermined phase,
A transmitting unit having a selector for transmitting a sequence in correspondence with log ₂ n = M bits of binary digital data; n correlators for obtaining a correlation value between each of the n PN sequences and a received signal; , The different M-bit binary data is assigned to each correlator, and the assigned M-bit binary is assigned to the input from the correlator having the largest output value. A comparator for outputting data, a latch circuit for latching the output of the comparator, a selector for inputting the output of all the correlators and selecting a signal having the maximum output value, and a peak value for inputting the output of the selector And a peak detector for detecting a peak position, sending a latch signal synchronized with the peak position to the latch circuit and controlling a clock phase supplied to each of the correlators to track the peak position. Spread spectrum communication system characterized by having a receiving unit with a control unit. 4. A PN sequence generator, comprising: a reference PN sequence generator;
4. The spread spectrum communication apparatus according to claim 3, further comprising a shift register with a plurality of taps for receiving an output of said reference PN sequence generator. 5. The spread spectrum communication apparatus according to claim 3, wherein the n PN sequences are obtained from a shift register having n−1 tap outputs and feeding back the final stage output to the first stage. . 6. The spread spectrum communication apparatus according to claim 3, wherein the correlator is a matched filter. 7. Each of the n PN sequences is connected to a shift register ±
7. The spread spectrum communication apparatus according to claim 3, wherein the phase is shifted by one chip or more.