RU2421884C1 - Differential operational amplifier with low zero offset voltage - Google Patents

Abstract

FIELD: electricity.

SUBSTANCE: differential operational amplifier includes the first (1) and the second (2) input transistors (T) the emitters of which are connected to collector of the first (3) auxiliary T, the first (4) and the second (5) output T the bases of which are connected to offset voltage source (6), and emitters are connected through the first (7) and the second (8) current-stabilising bipoles to the first (9) power source; emitter of the first (4) output T is connected to collector of the first (1) input transistor, and emitter of the second (5) output T is connected to collector of the second (2) input T; current mirror (10) the input of which is connected to collector of the first (4) output transistor; output is connected to collector of the second (5) output T and base of input T (11) of output emitter repeater (ER); the second (12) and the third (13) auxiliary T the bases of which are connected to base of the first (3) auxiliary T; collector of the second (12) auxiliary T is connected through the third (14) current-stabilising bipole to the first (9) power source; collector of the third (13) auxiliary T is connected to output of device (15) and emitter of input T (11) of output ER the collector of which is connected to the first (9) power source; at that, emitters of the first (3), the second (12) and the third (13) auxiliary T are connected to the second (16) power source and common output of current mirror (10) through the fourth (17), the fifth (18) and the sixth (19) current-stabilising bipoles respectively. To the diagram there introduced is the first (20), the second (21) and the third (22) additional T the emitters of which are connected to bases of the first (3), the second (12) and the third (13) auxiliary T; bases are connected to collector of the second (12) auxiliary T; collector of the first (20) additional T is connected to emitter of the first (4) output T, and collectors of the second (21) and the third (22) additional T are connected to the first (9) power source.

EFFECT: reducing systematic component of zero offset voltage U_offset, its temperature and radiation drift.

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Description

The invention relates to the field of radio engineering and communication and can be used as a device for amplifying analog signals in the structure of analog microcircuits for various functional purposes (for example, in decision amplifiers with small values of zero bias voltage under the influence of radiation or temperature).

The cascode architecture of operational amplifiers (op amps) is among the most broadband and therefore is often used in microelectronic devices [1-11].

The closest in technical essence to the claimed circuit solution is the architecture of the op amp of FIG. 1, presented in US patent 5627495, FIG. 1. It is also present in other patents and literature.

A significant drawback of the known op-amp of FIG. 1 is that it has an increased value of the systematic component of the zero bias voltage (U _cm ), which depends on the properties of its architecture.

The main objective of the invention is to reduce the systematic component of the bias voltage zero (U _cm ), its temperature and radiation drift.

This goal is achieved in that in the differential operational amplifier of figure 1, containing the first 1 and second 2 input transistors, the emitters of which are connected to the collector of the first 3 auxiliary transistors, the first 4 and second 5 output transistors, the bases of which are connected to a bias voltage source 6, and emitters through the first 7 and second 8 current-stabilizing two-terminal devices are connected to the first 9 power source, the emitter of the first 4 output transistor is connected to the collector of the first 1 input transistor, and the emitter of the second 5 of the output transistor is connected to the collector of the second 2 input transistor, a current mirror 10, the input of which is connected to the collector of the first 4 output transistor, the output is connected to the collector of the second 5 output transistor and the base of the input transistor 11 of the output emitter follower, the second 12 and third 13 auxiliary transistors, the base of which is connected to the base of the first 3 auxiliary transistor, the collector of the second 12 auxiliary transistor through the third 14 current-stabilizing two-terminal connected to the first 9 source the collector of the third 13 auxiliary transistor is connected to the output of the device 15 and the emitter of the input transistor 11 of the output emitter follower, the collector of which is connected to the first 9 power source, and the emitters of the first 3, second 12 and third 13 auxiliary transistors are connected to the second 16 power source and a common the output of the current mirror 10 through the fourth 17th, fifth 18th and sixth 19 current-stabilizing two-terminal networks, respectively, new elements and connections are provided - the first 20, second 21 and third 22 are introduced into the circuit additional transistors whose emitters are connected to the bases of the first 3, second 12 and third 13 auxiliary transistors, the bases are connected to the collector of the second 12 auxiliary transistor, the collector of the first 20 additional transistor is connected to the emitter of the first 4 output transistor, and the collectors of the second 21 and third 22 additional transistors connected to the first 9 power source.

The scheme of the op-amp prototype is shown in the drawing of figure 1. The drawing of figure 2 presents a diagram of the inventive device in accordance with claim 1 of the claims. The drawing of figure 3 shows a diagram of the op-amp according to claim 2 of the claims.

The drawing of Fig. 4 shows a diagram of an operational amplifier - a prototype, and in the drawing of Fig. 5 - of the claimed op-amp of Fig. 3 in the Cadence computer simulation environment on models of integrated transistors of Zarlink company.

The drawing of Fig.6 shows the temperature dependence of the zero bias voltage of the compared circuits of Fig.5, Fig.4. The amplitude-frequency characteristics of the opamp 5 and opamp 4 are shown in the drawing of Fig.7.

The differential operational amplifier with a low bias voltage of Fig. 2 contains the first 1 and second 2 input transistors whose emitters are connected to the collector of the first 3 auxiliary transistors, the first 4 and second 5 output transistors, the bases of which are connected to a bias voltage source of 6, and the emitters through the first 7 and second 8 current-stabilizing two-terminal devices are connected to the first 9 power supply, the emitter of the first 4 output transistor is connected to the collector of the first 1 input transistor, and the emitter of the second 5 is output about the transistor is connected to the collector of the second 2 input transistor, the current mirror 10, the input of which is connected to the collector of the first 4 output transistor, the output is connected to the collector of the second 5 output transistor and the base of the input transistor 11 of the output emitter follower, the second 12 and third 13 auxiliary transistors, base which are connected to the base of the first 3 auxiliary transistors, the collector of the second 12 auxiliary transistor through the third 14 current-stabilizing two-terminal is connected to the first 9 power source, the collector of the third 13 auxiliary transistor is connected to the output of the device 15 and the emitter of the input transistor 11 of the output emitter follower, the collector of which is connected to the first 9 power supply, and the emitters of the first 3, second 12 and third 13 auxiliary transistors are connected to the second 16 power source and a common current output mirrors 10 through the fourth 17th, fifth 18th and sixth 19 current-stabilizing bipolar, respectively. The first 20, second 21 and third 22 additional transistors are introduced into the circuit, the emitters of which are connected to the bases of the first 3, second 12 and third 13 auxiliary transistors, the bases are connected to the collector of the second 12 auxiliary transistor, the collector of the first 20 additional transistor is connected to the emitter of the first 4 output transistors, and the collectors of the second 21 and third 22 additional transistors are connected to the first 9 power source.

In the drawing of FIG. 3, in accordance with claim 2, a thermo-radiation compensation transistor 23 is inserted into the circuit, the emitter and the base of which are connected to the second 16 power source, and the collector is connected to the emitter of the second 5 output transistor.

In the drawing of Fig. 4, a diagram of an op-amp prototype of Fig. 1 is shown, and in the drawing of Fig. 5, the inventive op-amp of Fig. 3 is used in a Cadence computer simulation environment on models of integrated transistors of the Federal State Unitary Enterprise NPP Pulsar.

The graphs of Fig.6 characterize the temperature dependence of the zero bias voltage of the compared circuits.

The drawing of Fig.7 shows the amplitude-frequency characteristic of the op-amp of Fig.4 and Fig.5.

Consider the operation of the inventive device of figure 2.

The static mode of the auxiliary transistors 3, 12 and 13 is set by the third 14 current-stabilizing two-terminal, as well as two-terminal 17, 18 and 19 (for example, resistors). If the resistances of the last two-terminal circuits are the same, then the emitter currents of the transistors 3, 12 and 13 are equal to a certain value of I ₀ , and the base currents of these transistors are the same and correspond to the value of I _bp , where I _bp = I ₀ / β _p (β _p - current gain of the base of transistors 3, 12 and 13). As a result, the collector currents of additional transistors 20, 21 and 22:

and the collector current of the first 4 output transistor will differ by I _bp from the collector current of the second 5 output transistor:

where I ₀ ^* - collector currents of transistors 4 and 5 in the circuit of the op-amp prototype (figure 1).

Thus, the differential current I _p for the high-impedance node "A" of the circuit of figure 2 when it is shorted to the equipotential common bus:

where I _{output 10} = K _i12 I _{input 10} = I ₀ ^* -I _bp is the output current of the current mirror 10;

I _b.11 = I _bp = I ₀ / β _p - base current of transistor 11;

K _i12 = 1 is the current gain of the current mirror 10.

Thus, in the inventive device, when condition (4) is satisfied, the systematic component U _cm decreases due to the final value β _{p of the} transistors and its radiation (or temperature) dependence. As a result, this reduces U _cm , since the differential current I _p in the node “A” creates U _cm , which depends on the steepness S of the conversion of the input differential voltage (u _in ) of the op-amp into the output current of the node “A”. In the particular case of figure 2:

where r _e1 = r _e2 are the resistance of the emitter junctions of the input transistors 1 and 2.

Therefore, for the circuit of FIG. 2:

where φ _t = 26 mV is the temperature potential.

In the OA prototype I _p ≠ 0, therefore, here the systematic component U _{cm is} obtained several orders of magnitude more (U _cm = -712 μV) than in the claimed circuit (U _cm = -15.2 nV).

To minimize U _cm at elevated temperatures (t °> 80 ° C), a thermo-radiation compensation transistor 23 is provided in the circuit of FIG. 3, which is in the closed state. However, the current through its pn junction to the substrate, which increases significantly at high temperatures (or due to radiation), compensates for the corresponding current through the pn junction to the substrate of transistor 20. This reduces the derivative dU _cm / dT and the absolute values of U _cm at t °> 80 ° C.

Computer simulation of the circuits of Fig. 4, Fig. 5 confirms (Fig. 6) these theoretical conclusions. In this case, the voltage gain has a value of about 100 dB (Fig.7).

Thus, the claimed device has significant advantages in comparison with the prototype in terms of the value of the static error of amplification of DC signals.

BIBLIOGRAPHIC LIST

1. US patent No. 5.627.495.

2. US patent No. 4.274.061.

3. US patent No. 5.374.897.

4. US Patent No. 6,710.654.

5. Patent application US 2003/0090321, Fig. 8.

6. US patent No. 5.734.296, Fig.3.

7. US patent application No. 2008/0016091, Fig.4.

8. US patent No. 4.463.319.

9. US patent No. 6.483.382, figure 2.

10. US patent application 2007/0069815.

11. US patent No. 6.483.382, figure 1.

Claims (2)

1. A differential operational amplifier with a low zero bias voltage, containing the first (1) and second (2) input transistors whose emitters are connected to the collector of the first (3) auxiliary transistor, the first (4) and second (5) output transistors, the bases of which connected to a bias voltage source (6), and emitters through the first (7) and second (8) current-stabilizing two-terminal devices connected to the first (9) power source, the emitter of the first (4) output transistor is connected to the collector of the first (1) input transistor, and emitter second o (5) of the output transistor is connected to the collector of the second (2) input transistor, a current mirror (10), the input of which is connected to the collector of the first (4) output transistor, the output is connected to the collector of the second (5) output transistor and the base of the input transistor (11 ) of the output emitter follower, the second (12) and third (13) auxiliary transistors, the bases of which are connected to the base of the first (3) auxiliary transistor, the collector of the second (12) auxiliary transistor through the third (14) current-stabilizing two-terminal device is connected to the first m (9) by a power source, the collector of the third (13) auxiliary transistor is connected to the output of the device (15) and the emitter of the input transistor (11) of the output emitter follower, the collector of which is connected to the first (9) power source, and the emitters of the first (3), the second (12) and third (13) auxiliary transistors are connected to the second (16) power source and the common output of the current mirror (10) through the fourth (17), fifth (18) and sixth (19) current-stabilizing two-terminal circuits, respectively, characterized in that the first (20), the second (21) and the third (22) additional transistors, the emitters of which are connected to the bases of the first (3), second (12) and third (13) auxiliary transistors, the bases are connected to the collector of the second (12) auxiliary transistor, the collector of the first (20) additional the transistor is connected to the emitter of the first (4) output transistor, and the collectors of the second (21) and third (22) additional transistors are connected to the first (9) power source. 2. A differential operational amplifier with a low zero bias voltage according to claim 1, characterized in that a thermo-radiation compensation transistor (23) is introduced into the circuit, the emitter and the base of which are connected to the second (16) power source, and the collector is connected to the emitter of the second (5 ) output transistor.

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