RU2384938C1 - Complementary differential amplifier with controlled gain - Google Patents

Abstract

FIELD: physics, radio.

SUBSTANCE: invention relates to radio engineering and communication and can be used in automatic gain devices, phase detectors and modulators, in phase-locked loop and frequency multiplication systems or as an amplifier whose voltage transfer ratio depends on the control signal level. The controlled amplifier is the basic block of modern systems for receiving and processing high-frequency and microwave signals, and analogue computer and measurement equipment. The complementary differential amplifier (CDA) has a first (1) differential stage (DS) having first (2) and second (3) potential inputs, a current output (4) connected to the first (5) input of an output current adder (6), first (7) reference current source (RCS) connected to the common emitter circuit (8) of the first (1) DS, a second DS (9) having first (10) and second (11) potential inputs connected to corresponding first (2) and second (3) potential inputs of the fist DS (1) and first (12) and second (13) inputs of the CDA, as well as a current output (14) connected to the second (15) input of the output current adder (6), a second (16) RCS connected to the common emitter circuit (17) of the second DS (9). The circuit includes a first additional transistor (T) (18) whose emitter is connected through a first additional resistor (19) to the common emitter circuit (17) of the second DS (9) and the first additional (20) RCS, the base is connected to the first control input (21) of the CDA and the collector is connected to the common emitter circuit (8) of the first DS (1).

EFFECT: lower power supply voltage and electronic voltage gain control.

2 cl, 14 dwg

Description

The present invention relates to the field of radio engineering and communication and can be used in devices for automatic gain control, phase detectors and modulators, in systems of phase locked loop and frequency multiplication, or as an amplifier, the voltage transfer coefficient of which depends on the level of the control signal. The controlled amplifier is the base unit of modern systems for receiving and processing signals of the high and microwave ranges, analog computing and measuring equipment.

Currently, in analog microcircuit technology as part of electronic control systems for amplifying, mixing, or multiplying signals, circuits of controlled amplifiers based on differential stages with variable static mode are widely used. Such a structure has become the basis for the construction of almost all currently known precision controlled amplifiers and analog signal multipliers. In this regard, the task of improving the parameters of this functional unit of REA of the new generation is one of the rather urgent tasks of modern microelectronics.

Known schemes for complementary differential amplifiers (CDDs), implemented on the basis of two parallel-connected differential stages (DC) with sources of reference current in the emitter circuits of input transistors (the so-called "dual input stage") [1-20]. According to this architecture, the modification of which issued more than 50 patents of various countries, microcircuits of leading microelectronic companies (NA5190, NA2539, etc. [16, 18]) were made. All options for building differential amplifiers “dual input stage” can be divided into two large classes. In amplifiers of the first class, the signal from the differential stages connected in parallel at the input to the output is transmitted through the output current adders, realized in the form of two current mirrors [1-13]. In amplifiers of the second class, the signal from the input differential stages is transmitted to the output of the differential amplifier through the output current adder, implemented as transistor stages in accordance with a common base circuit [14–20].

The closest prototype (figure 1) of the claimed device is a complementary differential amplifier (CDA) described in US patent No. 4,600.893 (Toshiba) of figure 3, containing the first 1 differential stage having first 2 and second 3 potential inputs, current output 4, connected to the first 5 input of the output current adder 6, the first 7 is a reference current source connected to a common emitter circuit 8 of the first 1 differential stage, the second differential stage 9, having the first 10 and second 11 potential inputs associated with the corresponding the first 2 and second 3 potential inputs of the first differential stage 1 and the first 12 and second 13 inputs of a complementary differential amplifier, as well as the current output 14 connected to the second 15 input of the output current adder 6, the second 16 is a reference current source connected to a common emitter circuit 17 second differential cascade 9.

A significant drawback of the known KDU is that it does not have a special input “U” for electronic control of the voltage gain, “tied” to the common bus of the power sources. This significantly narrows the scope of its use, does not allow implementing adaptive functional units of systems on a chip, for example, microwave operational amplifiers, in which the loop gain varies according to a given algorithm depending on the properties of the signal sources and feedback circuits (see, for example, patent RF №2307393 "Method of controlling the gain of a decisive amplifier with deep negative feedback").

The main objective of the invention is to create conditions for electronic control of the gain of voltage KDU. In this case, the control voltage U _y must be supplied relative to the common bus of the power sources. The implementation of this goal allows you to perform on the basis of the claimed device not only broadband RF and microwave amplifiers with adjustable parameters, but create on its basis more complex functional units, for example, analog multipliers of broadband signals.

The first additional goal is the creation of a KDU architecture with a low supply voltage and electronic control of its voltage gain, as well as the possibility of practical implementation of the device using SG25H2 technology (operating voltage for npn transistors U _p = 1.9 V, for pnp transistors U _p = 2 , 8B).

The second additional goal is the implementation on the basis of the well-known KDU functions of an analog mixer of two voltages.

This goal is achieved in that in the differential amplifier of figure 1, containing the first 1 differential stage having a first 2 and a second 3 potential inputs, a current output 4 connected to the first 5 input of the output current adder 6, the first 7 is a reference current source connected to a common emitter circuit 8 of the first 1 differential stage, the second differential stage 9, having the first 10 and second 11 potential inputs associated with the corresponding first 2 and second 3 potential inputs of the first differential stage 1 and first 12 and the second 13 inputs of the complementary differential amplifier, as well as the current output 14 connected to the second 15 input of the output current adder 6, the second 16 is a reference current source connected to the common emitter circuit 17 of the second differential stage 9, new elements and communications are provided - in the circuit the first additional transistor 18 is introduced, the emitter of which is connected through the first additional resistor 19 to the common emitter circuit 17 of the second 9 differential cascade and the first additional 20 reference current source, the base is connected with the first control input 21 of the complementary differential amplifier, and the collector is connected to a common emitter circuit 8 of the first differential stage 1.

The amplifier circuit of the prototype is presented in figure 1. Figure 2 shows the inventive device in accordance with claim 1 of the claims.

Figure 3 shows a diagram of the CDA corresponding to paragraph 2. claims

Figure 4 presents a diagram of the CDA, in which the output adder currents 6 is implemented on the basis of current mirrors 38 and 39.

Figure 5 shows a diagram of the inventive device in a computer simulation environment PSpice on models of integrated transistors of FSUE NPP Pulsar.

Figure 6 - figure 10 shows the results of computer simulation of the circuit of figure 5:

- the dependence of the gain in the voltage K _u from the control voltage U _y (in the frequency range of Fig.6);

- the dependence of the amplification factors for the voltage K _u from the control voltage U _y when the resistance of the resistor R ₃ = 100 Ohms (Fig.7);

- the dependence of the amplification factors for the voltage K _u from the control voltage U _y when the resistance of the resistor R ₃ = 500 Ohms (Fig);

- the dependence of the suppression coefficient of the control signal K _u on the frequency at various values of the constant component of the control signal with the resistance of the resistor R ₃ = 500 Ohms (Fig.9);

- the dependence of the suppression coefficient of the control signal K _p from the frequency for various values of the constant component of the control signal U _y with the resistance of the resistor R ₃ = 100 Ohms (figure 10).

11 shows a diagram of the inventive device in accordance with claim 2 in a computer simulation environment PSpice on models of integrated transistors of FSUE NPP Pulsar.

On Fig - Fig shows the results of computer simulation of the circuit of Fig.11:

- the dependence of the gain K _u from the control voltage U _y (in the frequency range of Fig.12);

- the dependence of the gain K _u from the control voltage U _y when the resistance of the resistor R ₃ = 100 Ohms (Fig.13);

- the dependence of the gain K _u from the control voltage U _y when the resistance of the resistor R ₃ = 500 Ohms (Fig.14).

The differential amplifier of figure 2 contains a first 1 differential stage having first 2 and second 3 potential inputs, a current output 4 connected to the first 5 input of the output current adder 6, a first 7 reference current source connected to a common emitter circuit 8 of the first 1 differential stage , the second differential stage 9, having the first 10 and second 11 potential inputs associated with the corresponding first 2 and second 3 potential inputs of the first differential stage 1 and the first 12 and second 13 inputs of the complementary diff of the differential amplifier, as well as the current output 14 connected to the second 15 input of the output current adder 6, the second 16 is a reference current source connected to the common emitter circuit 17 of the second differential stage 9. The first additional transistor 18 is introduced into the circuit, the emitter of which is through the first additional resistor 19 is connected to a common emitter circuit 17 of the second 9 differential stage and the first additional 20 reference current source, the base is connected to the first control input 21 of the complementary differential amplifier, and the number the lecturer is connected to a common emitter circuit 8 of the first differential stage 1.

In the circuit of Fig. 2, the output current adder 6 contains output transistors 22 and 23 with combined collectors, the emitters of which are connected to current-stabilizing two-terminal networks 24 and 25, and are also connected to bias voltage sources 26 (+ Ec ₁ ) and 27 (-Ec ₂ ). The collectors of transistors 22 and 23 are connected to the output 28 of the complementary differential amplifier and the load element 29. The first 1 and second 9 differential stages in the circuit of figure 2 are made on pnp transistors 30 and 31 and npn transistors 32 and 33.

In the circuit of FIG. 3, in accordance with claim 2, a second additional transistor 34 is introduced, the emitter of which through the second 35 additional resistor is connected to a common emitter circuit 8 of the first differential stage 1 and the second 36 additional reference current source, the base is connected to the second 37 by the control input of a complementary differential amplifier, and the collector is connected to a common emitter circuit 17 of the second differential stage 9.

In the particular case in the circuit of Fig. 4, the current output adder 6 is implemented on the basis of inverting current mirrors 38 and 39, the outputs of which are connected to the output 28 of the complementary differential amplifier.

Consider the operation of the claimed device in the mode of a controlled voltage amplifier supplied to the input 12 "X" (u _x ) (figure 2). In static mode at zero control voltage (u _y = 0), the current through the resistor 19 is close to zero.

The voltage gain K _u for output 28 is determined by the formula

where R ₂₉ is the resistance of the load resistor 29;

S _∑ - the total steepness of the conversion of voltage u _x into the output current i _o .

Moreover

where φ _t ≈26 mV is the temperature potential;

I ₈ , I ₁₆ - statistical currents of the emitter circuits of the first (1) second (9) cascades

(I ₈ = I ₁₆ = I ₀ );

r _ei = φ _t / I _ei is the resistance of the emitter junction of the i-th transistor of the circuit at a statistical current of the emitter I _ei .

Thus, when u _y - 0 for the circuit of figure 2

приращение, то это приводит к изменению токаIf the control voltage U _y at the first control input 21 receives a positive

increment, then this leads to a change in current

i _R through resistor 19:

where R ₁₉ is the resistance of the resistor 19 (R ₁₉ >> r _e32 = r _e33 )

This current causes a decrease in the current in the total emitter circuit of the transistors 32, 33 and 30, 31 by the value of i _R , which leads to a decrease in the voltage gain from input 12 (“X”) to output 28:

With another phase of the voltage u _{y, the} coefficient K _u increases in proportion to the value of U _y .

A remarkable feature of the circuit of figure 2 is the suppression of the transmission of the control signal u _y to the output 28, which is very important for constructing a signal mixer. Indeed, the current in the load 29

where i _K22, i _K23 collector currents of transistors 22 and 23.

As a result, the suppression ratio of the control signal is quite small

This conclusion is confirmed by the results of computer simulation of Fig.9 - Fig.10

Thus, the current in the load 29 is independent of the control signal U _y . This is a necessary condition for suppressing the signal at input 21 (U _y) ) in the voltage mixers U _x and U _y .

The analytical relationships obtained above are confirmed by the results of computer modeling of the proposed schemes of the CDA (Fig. 6, Fig. 7, Fig. 8, Fig. 9, Fig. 10, Fig. 12, Fig. 13, Fig. 14).

Thus, the claimed complementary differential amplifier has electronic gain control. Moreover, the control signal u _y , as well as the input signal U _x are supplied to the corresponding inputs relative to the common bus (without isolation capacitors). In addition, when using resistors as bipolar 7, 16, 24, 20, 25 circuits of figure 2 - figure 4 can have a supply voltage of ± 1.5 V, which allows us to recommend them for use in RF and microwave integrated circuits.

BIBLIOGRAPHIC LIST

1. - US Patent No. 3,786.362.

2. - US Patent No. 4.030.044.

3. - US Patent No. 4.059.808, Fig.5.

4. - US Patent No. 4.286.227.

5. - Autosvid. USSR No. 375754, H03f 3/38.

6. - Autosvid. USSR No. 843164, H03f 3/30.

7. - US Patent No. 3,660.773.

8. - US Patent No. 4,560.948.

9. - RF patent No. 2930041, H03f 1/32.

10. - Japan Patent No. 57-5364, H03f 3/343.

11. - Czechoslovak Patent No. 134845, cl. 21a ² 18/08.

12. - Czechoslovak Patent No. 134849, cl. 21a ² 18/08.

13. - Patent of Czechoslovakia No. 13 5326, cl. 21 a ² 18/08.

14. - US Patent No. 4,389.579.

15. - England Patent No. 1543361, H3T.

16. - US Patent No. 5.521.552 (figa).

17. - US Patent No. 4.059.808.

18. - US Patent No. 5,789.949.

19. - US Patent No. 4,453.134.

20. - US Patent No. 4,760.286.

21. - Autosvid. USSR No. 1283946.

22. - RF patent No.20101019.

23. - US Patent No. 4,389.579.

24. - US Patent No. 4,453.092.

25. - US Patent No. 3,566.289.

26. - US Patent No. 4.059.808 (figure 2).

27. - US Patent No. 3,649,926.

28. - US Patent No. 4,714.894 (figure 1).

29. Matavkin V.V. High-speed operational amplifiers. - M.: Radio and Communications, 1989.

30. M. Herpy. Analog integrated circuits. - M.: Radio and Communications, 1983, p. 174, Fig. 5.52.

Claims (2)

1. A complementary differential amplifier with controlled amplification, comprising a first (1) differential stage having first (2) and second (3) potential inputs, a current output (4) connected to the first (5) input of the output current adder (6), the first (7) reference current source connected to the common emitter circuit (8) of the first (1) differential stage, the second differential stage (9) having the first (10) and second (11) potential inputs associated with the corresponding first (2) and second (3) potential inputs of the first differential helmet hell (1) and the first (12) and second (13) inputs of a complementary differential amplifier, as well as the current output (14) connected to the second (15) input of the output current adder (6), the second (16) reference current source connected with a common emitter circuit (17) of the second differential stage (9), characterized in that the first additional transistor (18) is introduced into the circuit, the emitter of which is connected through the first additional resistor (19) to the common emitter circuit (17) of the second (9) differential cascade and the first additional (20) reference current source, base connected to the first control input (21) of the complementary differential amplifier, and the collector is connected to a common emitter circuit (8) of the first differential stage (1). 2. The device according to claim 1, characterized in that the second additional transistor (34) is introduced into the circuit, the emitter of which through the second (35) additional resistor is connected to a common emitter circuit (8) of the first differential stage (1) and the second (36) an additional reference current source, the base is connected to the second (37) control input of a complementary differential amplifier, and the collector is connected to a common emitter circuit (17) of the second differential stage (9).

Images