RU2252489C2 - Start-stop communication system - Google Patents

Abstract

FIELD: wire, radio-relay, and space communication lines.

SUBSTANCE: proposed start-stop communication system has on sending end data source, shift register, multiplexer, relative phase keyer, transmitter, first clock generator, pseudorandom sequence generator, switching unit, multiplier, carrier generator, switch, decoder, and RS flip-flop with relevant connections; on receiving end it has receiver, matched filter, amplitude detector, accumulator, sync unit, second clock generator, memory unit, delay line, demodulator, squarer, pulse adder-accumulator, threshold device, pulse shaper, switch, and third clock generator with relevant connections.

EFFECT: enhanced reliability in handling great amount of data transferred.

1 cl, 2 dwg

Description

The invention relates to electrical and radio communications and can be used in wired, radio, radio relay and space communication systems.

A well-known start-stop communication system (Z.M. Kanevsky, V.I. Ledovskikh “Transfer of discrete messages on channels with feedback with interrupts”, “Electrosvyaz”, 1970, No. 8, p.6-8), in which before sending a message a “probe key” is transmitted, which is an amplitude-manipulated signal consisting of several elements. However, this system is designed specifically for channels with interruptions (freezing channels), has low noise immunity in the general case, and a high level of probability of false alarm.

The closest in technical essence to the proposed one is the start-stop communication system, given in [1].

Functional diagram of such a communication system is shown in figure 1.

It contains on the transmitting side a series-connected information source 1, a shift register 2, a multiplexer 3, a relative phase manipulator 4 and a transmitter 5. In addition, a first clock generator 6, a pseudo-random sequence generator 7, a multiplier 8 and a binary counter 9 are connected in series; serially connected carrier frequency generator 10 and key 11, the output of which is connected to the signal input relative to the phase manipulator 4. The input of the clock pulse generator 6 is connected to the clock output of the information source 1, the second output of the generator 6 is connected to the clock input of the shift register 2, and the third output of the generator 6 - with the second inputs of the pseudo-random sequence generator 7 and the multiplier 8, the output of which is simultaneously connected to the control inputs of block 4 and key 11. Moreover, the first output of the generator 6 is connected to tanovochnym input binary counter 9 which outputs are connected to bus control inputs of multiplexer 3.

On the receiving side, it contains a receiver 12 connected in series, a matched filter 13, an amplitude detector 14, a drive 15, a threshold block 16, a differentiating chain 17, a chopper 18, a pulse shaper 19, a second clock 20 and a memory block 21, the output of which is the output of the device . Moreover, the output of the pulse shaper 19 is simultaneously connected to the control inputs of the chopper 18 and the demodulator 22. The second output of the second clock pulse generator 20 is simultaneously connected to the corresponding inputs of the demodulator 22 and the storage unit 21, the third input of which is connected to the output of the demodulator. In addition, the output of the matched filter 13 through the delay line 23 is connected to the third input of the demodulator 22.

The transmitting and receiving sides are connected via a communication line 24.

Start-stop communication system operates as follows.

At a random moment of time, at the output of information source 1, n information symbols (“0” or “1”) of duration τ are created (for example, n = 3, Fig. 3a — see [1]).

At t = 0, n clock pulses are generated at the second output of the clock generator 6 (Fig.3b), which record information symbols in the shift register 2, a short pulse is created at its first output (Fig.3c), on the leading edge of which the initial setting is made a pseudo-random sequence generator 7 and setting all the bits of the binary counter 9 to a single state, and at the third output, a meander consisting of (n + 1 + S) pulses of duration τ / 2 (Fig. 3d, S = 1), which is in block 8 multiplied with a pseudo-random sequence NOSTA the same length as coming from the generator 7 outputs (3E).

The positive part of the resulting signal coming from the output of block 8 (Fig. 3f) is used to control the operation of blocks 9, 4 and key 11. At the moment of the leading edge of its first pulse, block 9 is set to zero, a key 11 is opened, which transmits oscillations carrier frequency in block 4, and from the output of the multiplexer 3 to the input of block 4 receives a zero signal. As a result of this, oscillations of the carrier frequency with an arbitrary initial phase during the time interval τ / 2 are formed at the output of block 4. Upon receipt of the second positive edge of the signal (Fig.3E) in the counter 9, a binary number equal to one is set, and the multiplexer 3 reads from the shift register 2 the value of the first information symbol. In this case, the initial phase of the carrier frequency at the output of block 4 remains the same if the first character has a value of unity and changes to the opposite - otherwise. Thus, at the output of block 4, a relatively phase-shifted signal is generated (Fig. 3g), in which the first radio pulse does not carry information, but serves as a reference for the second radio information pulse.

On the receiving side, a relatively phase-shifted signal after common filtering in the receiver 12 and matched in the filter 13 for a single radio pulse of duration τ / 2 is fed to an amplitude detector 14 with an output separation capacitance. Its output bipolar signal of the form (Fig.3e), but with triangular pulses, is optimally accumulated in block 15 and a signal is generated at its output, which has the form of an autocorrelation oscillation function at the output of the amplitude detector 14 with a maximum value of time T (Fig.3i). The signal that exceeds the threshold V in block 16 is then differentiated. At the moment the differentiation result passes through zero, a short pulse is formed in the pulse shaper 19, which, acting on the chopper 18, prohibits the signal from entering its input during the time interval Tc. In block 22, demodulation of the filter 13 coming from the output and delayed in the delay line 23 by the time T of the signal is carried out. If neighboring radio pulses have the same initial phases, then the symbol “1” is generated at its output, otherwise it is “0”, the start of operation of block 22 determines the pulse coming from the pulse former 19, and the moments of phase comparison of neighboring radio pulses determine the leading edges of the pulses, coming from the second output of the generator 20 (Fig.3K). On the trailing edges of these pulses, a decision is made on the reception of characters and their fixation in the storage unit 21. Reading information from the unit 21 to the system output is carried out by pulses from the second output of the generator 20 (Fig. 3l).

The length of the SRP in the communication system (n + 1 + S) or greater is determined by the total number of transmitted information symbols and one reference signal and the number of transitions of its level from positive to negative S.

The value of S does not exceed 30% of the total length of the transmitted signal (see, for example, Barker and Neumann-Hoffman codes in Table 14.4 of D. Spilker’s book “Digital Satellite Communication”, M .: Communication, 1979).

The invention is aimed at reducing the technical complexity of a start-stop communication system and increasing its reliability with large amounts of transmitted information.

To do this, in a start-stop communication system containing on the transmitting side a series-connected information source (AI), a shift register (PC), a multiplexer, a relatively phase manipulator (OFM) and a transmitter, a first clock generator (GTI) and a pseudo-random sequence generator (series) ( GPSSP), a series-connected multiplier and a binary counter (DS), a series-connected carrier frequency generator (LFO) and a key whose output is connected to the OFM signal input, the input being GTI is connected to the sync output of the AI, the second output of the first GTI is connected to the clock input of the shift register (PC), and the third output is connected to the second inputs of the GPS and the multiplier, the output of the multiplier is connected to the control inputs of the OFM and the key, the first output of the first GTI is connected to the installation input DS, the outputs of which are connected by a bus to the control inputs of the multiplexer, and on the receiving side containing a series-connected receiver, a matched filter (SF), an amplitude detector (HELL), a drive, a sync block, a second GTI and a storage unit, pos edovatelno coupled delay line (LZ), whose input is connected to SF output, and a demodulator, the output of the sync block is also connected to the control input of the demodulator, the second output of the second GTI connected to respective inputs of the demodulator and the storage unit, third input of the storage unit connected to the output of the demodulator; the transmitting and receiving sides are connected via a communication line, an additional decryptor, RS-flip-flop and a switch are additionally connected in series on the transmitting side, the decoder inputs being connected by a bus to the DS outputs, the second RS-trigger input is connected to the first output of the first GTI, the third switch input is connected to the output of the GPSP, and its output with the first input of the multiplier, and on the receiving side are introduced a series-connected quadrator connected to the AD output by the input, an adder-storage device, a threshold device (PU), a form pulse generator (FI) and a key, the second input of which is connected to the output of the storage unit, and the output is the output of the device, and the third GTI, the input of which is combined with the second input of the accumulator-accumulator and connected to the output of the sync block, the first output is connected to the clock input of the control unit, and the second - to the third input of the adder-drive. (Here, a threshold block, a differentiating circuit, a chopper, and a pulse shaper of the prototype device are included in the synchro block).

Functional diagram of the proposed start-stop system is shown in figure 2.

It contains on the transmitting side serially connected AI 1, PC 2, multiplexer 3, OFM 4 and transmitter 5, serially connected to the first GTI 6, GPS 7, switch 14, multiplier 8 and DS 9, as well as serially connected LFO 10 and key 11 and decryptor 12 and RS-trigger 13 connected in series, the first and second outputs of which are connected to the control inputs of the switch 14, the input of the first GTI 6 being connected to the clock output AI 1, its second output connected to the clock input PC 2, and the third output to the second inputs GPSSP 7 and multiplier 8, out One multiplier 8 is connected to the control inputs of the OFM 4 and key 11, the output of the key 11 is connected to the signal input of the OFM 4, the first output of the first GTI 6 is connected to the installation inputs of the RS flip-flop 13 and DS 9, the outputs of the DS 9 are connected to the control inputs of the multiplexer via a bus 3 and a decoder 12, and on the receiving side it contains a receiver 15, SF 16, HELL 17, a drive 18, a synchroblock 19, a second GTI 20 and a storage unit 21 connected in series with the LZ 22, the input of which is connected to the output of the SF 16, and a demodulator 23 series connected square adrator 24, the input of which is connected to the output of HELL 17, the adder-drive 25, PU 26, FI 27 and key 28, the output of which is the output of the device, and the second input is connected to the output of the storage unit 21; and the third GTI 29, the output of the synchro block being also connected to the control input of the demodulator 23, the second input of the adder-accumulator 25 and the input of the third GTI 29, the second output of the GTI 20 is connected to the corresponding inputs of the demodulator 23 and the storage unit 21, the third input of the storage unit 21 is connected to the output of the demodulator 23, the first output of the third GTI 29 is connected to the clock input of the PU 26, and the second to the third input of the adder-drive 25; the transmitting and receiving sides are connected via a communication line 30.

Start-stop communication system operates as follows.

On the transmitting side, the GPSP 7 pseudo-random sequence generator is designed to generate a bipolar seven-segment Barker code - a clock signal with the element duration τ (+, +, +, -, -, +, -).

At a random time, at the output of information source 1, n> 5 information symbols (“0” or “1”) of duration τ are created. At t = 0, n clock pulses are generated at the second output of clock generator 6, which record information symbols in shift register 2, a short pulse is created at its first output, on the leading edge of which initial installation of GPS 7 is performed, and all bits of DS 9 are set to single state and RS-trigger 13 to a single state, and at the third output - a meander, consisting of 2 (n + 2) pulses of positive and negative polarity of duration τ / 2, which in block 8 is multiplied with a pseudo-random sequence, arriving through the open switch 14.

The positive part of the resulting signal coming from the output of block 8 is used to control the operation of blocks 9, 4 and key 11. At the moment of the leading edge of its first pulse, block 9 is set to zero, key 11 is opened, which allows carrier frequency oscillations to block 4 , and from the output of the multiplexer 3 to the input of block 4 receives a zero signal. As a result of this, oscillations of the carrier frequency with an arbitrary initial phase during the time interval τ / 2 are formed at the output of block 4. Upon receipt of the second positive edge of the signal in the counter 9, a binary number equal to one is set, and the multiplexer 3 reads from the shift register 2 the value of the first information symbol. In this case, the initial phase of the carrier frequency at the output of block 4 remains the same if the first character has a value of unity, and changes to the opposite - otherwise. The initial phase of the carrier for the second information symbol is set similarly with respect to the initial phase of the previous signal element.

Upon receipt of the sixth positive edge, the decoder 12 fires and puts the RS flip-flop 13 into the opposite state, as a result of which a negative voltage equal to the level of negative impulses generated by the GPS 7 is transmitted to the output of the switch 14 from its second input (not shown in FIG. 2) and at the output of block 8 are created with a delay of τ / 2 n-5 positive pulses of duration

τ / 2 with a period of succession τ. Thus, at the output of block 4, a relatively phase-shifted signal is generated in which the first radio pulse does not carry information, but serves as a reference for the second radio information pulse; the first five information elements are transmitted together with the clock elements, the rest - at separate time positions.

On the receiving side, a relatively phase-shifted signal after general filtering in the receiver 15 and matched in the filter 16 for a single radio pulse of duration τ / 2 is supplied to the AD 17 with the output separation capacitance. Its output bipolar signal with triangular pulses is optimally accumulated in block 18 and a signal is generated at its output, which has the form of an autocorrelation function of the output oscillation HELL 17 with a maximum value at time T corresponding to the end of the Barker code upon receipt. At the same time, a short pulse is generated at the output of the sync block 19. In block 23, demodulation of the SF 16 coming from the output and delayed in LZ 22 by the time T of the signal is carried out. If neighboring radio pulses have the same initial phases, then the symbol “1” is formed at its output, otherwise “0”. The beginning of the operation of block 23 determines the pulse coming from the output of the synchro block 19, and the moments of comparison of the two phases of adjacent radio pulses determine the leading edges of the pulses coming from the second output of the second GTI 20. The decision is made to receive symbols and fix them in the memory block 21 on the trailing edges of these pulses Reading information from block 21 to the input of key 28 is carried out by pulses from the first output of the GTI 20.

Positive pulses from the output of the quadrator 24 are fed to the accumulator-drive 25, zeroed by the output pulses of block 19, and at the third output of the third GTI 29 a network of n-5 short pulses with a repetition period τ is formed, at the instant of which the output pulse levels of block 24 are sequentially summed .If at the time of the short pulse at the first output of the GTI 29, corresponding in time to the first output pulse from the first output of the GTI 20, the total signal of block 25 will exceed the threshold V _{1 of} block 26, then the output of FI 27 with a duration n · τ, which will open the key 28, and all information pulses will go through it to the output of the device.

Thus, the application of the proposed start-stop communication system can reduce its technical complexity and increase reliability.

It is known that to ensure reliable synchronization in communication systems, the energy of the clock signal must be several times higher than the energy of the signal used to transmit one information symbol (see, for example, p.281 in [2]). Therefore, the length of the SRP is chosen equal to seven. At the same time, 5 information symbols are transmitted together with the PSP elements, and the remaining (n-5) symbols are transmitted after the end of the clock signal. In start-stop systems, the clock signal should provide a low probability of false alarm. For this, its length should be large enough. In the prototype device, it is equal to (n + 1 + S). In this case, the delay line with taps, which is part of the drive 18 (see p. 350 [2]), and LZ 22, and for lengths n of the order of a millisecond, are cumbersome or even impossible to fulfill (see p. 372). -374 [2]). In the proposed device, in addition to comparing the output signal of the drive with a threshold V (in the threshold device included in block 19), a comparison is made with the threshold of the total output signal of block 25. This allows you to get the probability of false alarm the same as in the prototype device.

All blocks included in the proposed system are known. For example, the adder-drive 25 can be performed on a device for sampling and storing the signal (see the book under the editorship of S.V. Yakubovsky “Analog and Digital Integrated Circuits”, 1984, p. 369-370).

Sources of information

1. RF patent No. 2168867, H 04 L 25/00.

2. Varakin L.E. Communication systems with noise-like signals. - M .: Radio and communications, 1985.

Claims (1)

A start-stop communication system comprising, on the transmitting side, a series-connected information source (AI), a shift register (PC), a multiplexer, a relatively phase manipulator (OFM) and a transmitter, a first clock generator (GTI) and a pseudo-random sequence generator (GPS), connected in series a serially connected multiplier and a binary counter (DS), serially connected a carrier frequency generator (LFO) and a key, the output of which is connected to the signal input of the OFM, and the input of the first GTI is connected it is connected with the AI sync output, the second output of the first GTI is connected to the clock input of the shift register (PC), and the third output is connected to the second inputs of the GPS and the multiplier, the output of the multiplier is connected to the control inputs of the OFM and the key, the first output of the first GTI is connected to the installation input of the DS, the outputs of which are connected by a bus to the control inputs of the multiplexer, and on the receiving side there are serially connected receivers, a matched filter (SF), an amplitude detector (HELL), a drive, a sync block, a second GTI and a storage unit, are connected in series a delay line (LZ), the input of which is connected to the output of the SF, and a demodulator, the output of the sync block being also connected to the control input of the demodulator, the second output of the second GTI connected to the corresponding inputs of the demodulator and the storage unit, the third input of the storage unit connected to the output of the demodulator; the transmitting and receiving sides are connected by means of a communication line, characterized in that an additional sequentially connected decoder, RS-trigger and switch are introduced on the transmitting side, the second (control) input of the switch being connected to the second output of the RS-trigger, the outputs of the decoder are connected to the outputs by a bus DS, the second installation input of the RS-flip-flop is connected to the first output of the first GTI, the third input of the switch is connected to the GPS output, and its output is connected to the first input of the multiplier, and on the receiving side but the connected quadrator, connected to the AD output by the input, an adder-drive, a threshold device (PU), a pulse shaper (FI) and a key, the second input of which is connected to the output of the storage unit, and the output is the output of the device, and the third GTI, the input of which is combined with the second input of the accumulator-accumulator and connected to the output of the sync block, the first output of the third GTI is connected to the clock input of the control unit, and the second to the third input of the accumulator-accumulator.

Images