RU2250560C1 - Digital signal synthesizer - Google Patents

Abstract

FIELD: radio engineering; frequency spectrum synthesizing and digital data signal shaping.

SUBSTANCE: proposed digital signal synthesizer has first and second delay circuits, low-pass filter, and three parallel channels, each incorporating pulse counter, memory unit, digital-to-analog converter, analog switch, analog adder, and delay circuit.

EFFECT: enhanced output frequency at same precision of signal shaping.

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Description

The invention relates to radio engineering and can be used in radio transmitting, receiving and radio measuring devices for synthesizing a frequency grid and generating discrete information transmission signals.

The device described in the book Gnatek Yu.R. Handbook of digital-to-analog and analog-to-digital converters. M .: Radio and communication, 1982, p. 259-260, containing a counter connected in series, a memory unit, a digital-to-analog converter (DAC). The disadvantages of the device are reduced output frequency and the accuracy of the formation of the output signals.

Also known device copyright certificate (AC) No. 1501245, N 03 19/00, SU, containing the adder codes, DAC and M channels connected to the corresponding inputs of the adder and to the main input containing series-connected delay elements, counters and memory units . The disadvantages of this device are the reduced output frequency and the accuracy of the formation of signals, which are determined by the speed of the terminal devices: adder codes and DAC. Those. the increase in clock frequency achieved by summing time-shifted channels is limited by the speed of the terminal devices. These terminal devices have a speed (clock frequencies and on-off times) comparable or even less than that of devices in each channel.

The closest analogue is the device according to AS No. 1501245, Н 03 В 19/00, SU.

To increase the output frequency while maintaining the accuracy of signal generation, a digital signal synthesizer is proposed, comprising: a first channel of formation, consisting of a series-connected counter, a memory unit, a digital-to-analog converter, as well as two series-connected delay elements and two channel of formation connected in parallel with the first , each of which consists of a series-connected counter and a memory unit, and the input of the first delay element is connected to the input of the counter of the first channel, and the direct outputs of the first and second delay elements are connected to the inputs of the counters of the second and third parallel channels, respectively, characterized in that a low-pass filter is inserted into it, the first analog key, the input of which is connected to the output of the digital-analog converter, in series connected the first analog adder and the third delay element, the output of which is connected to the control input of the first analog key, and the first input of the analog adder is fed an inverted input signal, and the second input is connected to the inverse output of the first delay element, the digital-to-analog converter and the analog key are connected in series to the second and third channels, the inputs of the digital-to-analog converters connected to the outputs of the memory blocks of the corresponding channels, and the second and third analog adders connected in series and the fourth and fifth delay elements, the outputs of which are connected to the control input of the analog key of the corresponding channel, and the second input of the second analog adder is connected to the inverse output of the first delay element, and the second input to the direct output of the second delay element, the first input of the third analog adder is connected to the inverse output of the second delay element, and the second input to the direct input of the digital signal synthesizer, and the outputs of the analog keys all channels are combined and connected to the input of a low-pass filter, the output of which is the output of the device.

Figure 1 shows a diagram of a device. Figure 2 is a timing chart of his work.

Figure 1 shows:

1, 2, 3 - the first, second and third pulse counters, respectively,

4, 5, 6 - the first, second and third storage units (storage devices), respectively,

7, 8, 9 - the first, second and third DACs, respectively,

10, 11, 12 - the first, second and third analog keys, respectively,

13, 14, 15, 16, 17 - the first, second, third, fourth and fifth delay elements, respectively,

18, 19, 20 - the first, second and third analog adders, respectively,

21 - low-pass filter (low-pass filter).

The digital signal synthesizer contains: three pulse counters 1, 2, 3, three memory blocks 4, 5, 6, three DACs 7, 8, 9, three analog keys 10, 11, 12, five delay elements 13, 14, 15, 16 , 17, and two of them (13 and 14) with direct and inverse outputs, three analog adders 18, 19, 20 and low-pass filter 21.

The signal synthesizer works as follows.

For simplicity, we assume that all digital devices have the same speed (on and off time) and are used at the maximum clock frequency. Therefore, the inputs (direct and inverse) of the signal synthesizer receive signals whose pulse duration is equal to the pause time, i.e. in the form of a meander (diagram a, b in figure 2). The delay elements 13 and 14 delay the input signals by about a third of the period (diagrams c, d, and d, e in Fig. 2), and shortened pulses are formed at the output of the analog adders 18, 19, 20, the duration of which is less than the speed of digital devices. They are supplied through delay elements 15, 16, 17 to analog keys 10, 11, 12, the speed of which is much higher than the speed of digital devices and with their help a step function of the output signal is formed. Counters 1, 2, 3 generate an address code, under the influence of which the amplitude code of the generated signal is read from the memory blocks 4, 5, 6. DACs 7, 8, 9 transfer from the code to the analog value of the signal, and the analog keys 10, 11, 12 pulses are cut from the DAC signals 7, 8, 9 with an amplitude corresponding to the output signal at given points. Since the pulses from the outputs of the analog keys are separated in time, a step function corresponding to the shape of the output signal is formed at the input of the low-pass filter 21, and the signal cleaned from interference is output at the low-pass filter 21. The delay elements 15, 16, 17 serve to compensate for the delays that accumulate in series-connected counters, memory devices and DACs, of each channel.

The synthesizer shown in Fig. 1 allows to obtain three times more points in the period of the generated signal, or to increase the output frequency by three times while maintaining the accuracy of the generated signal.

Thus, with the same speed of digital devices, the claimed device allows three times to increase the output frequency compared to the analogue.

All elements of the device can be made on a standard element base, and do not have any features.

Claims (1)

A digital signal synthesizer containing a first shaping channel, consisting of a first pulse counter, a first memory unit, a first digital-to-analog converter, connected in series, and first and second delay elements and second and third shaping channels connected in parallel to the first one, each of which consists of connected in series to a second pulse counter and a second memory unit, a third pulse counter and a third memory unit, respectively, moreover, the input of the first delay element is connected to the input of the first pulse counter, and the direct outputs of the first and second delay elements are connected to the inputs of the second and third pulse counters, respectively, characterized in that a low-pass filter is inserted into it, and the first analog switch is inserted into the first channel the input of which is connected to the output of the first digital-to-analog converter, as well as the first analog adder and the third delay element connected in series, the output of which is connected to the control input a first analog switch, and the inverted input signal is applied to the first input of the first analog adder, and the second input is connected to the inverse output of the first delay element, the second digital-to-analog converter and the second analog switch, the third digital-to-analog converter and the third analog are connected in series to the second and third channels of formation the key, respectively, with the inputs of the digital-to-analog converters connected to the outputs of the memory blocks of the corresponding channels, and the the second analog adder and the fourth delay element are connected, the third analog adder, the fifth delay element are connected in series, and the outputs of the delay elements are connected to the control inputs of the analog keys of the corresponding channel, the first input of the second analog adder is connected to the inverse output of the first delay element, and the second input to direct output of the second delay element, the first input of the third analog adder is connected to the inverse output of the second delay element, and the second input to Momo input digital synthesizer signal, and analog switches outputs of all channels are combined and connected to the input of a low pass filter whose output is an output device.

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