RU2249246C2 - Method for controlling buffer of reverse clip type video system - Google Patents

Abstract

FIELD: computer science.

SUBSTANCE: method includes transmitting data through buffer between video memory and route for image forming, wherein buffer is separated on two blocks for reading and writing. Recording into blocks is performed by packet, size of which is equal to buffer size, while recording in blocks is performed in one addressing to video memory, and in separate block writing and/or reading is concurrently performed.

EFFECT: decreased recording frequency and possible alternation of time until start of overwriting in broad range.

2 cl

Description

The present invention relates to computer technology and can find application in the development of graphic systems, as well as in the creation of systems in which data is transferred between units working with independent clock signals.

In graphic controllers, information displayed on the monitor screen is stored in the video memory of this controller. Access to the video memory is regulated by the memory arbiter, allowing one of the following devices to work with it: a memory regeneration controller, a store-type reverse buffer, a system bus controller, and a graphics accelerator. The interaction of the above devices with video memory is carried out using a video memory controller operating at the maximum frequency of video memory. Data read from the video memory is transmitted to the image forming path on the screen of a monitor operating at the frequency of the selected video mode. The video memory controller and the imaging path on the monitor screen operate at independent frequencies. To synchronize data transfer between these blocks, a reverse store-type buffer is used.

Currently, a number of methods are known for controlling the process of transmitting data through a buffer of a reverse store type video system. A distinctive feature of these methods is that they do not use the fullness flags obtained by comparing the write and read counters, but the absolute values of these counters to control the data transfer process. The refusal to use the fullness flags is explained by the fact that when two ports of the reverse store-type buffer operate at independent frequencies, there is a high probability of incorrect flag formation and, consequently, errors in data transmission.

In the graphical controller of the CL-GD543X and CL-GD544X families of Cirrus Logic (Alpine Family CL-GD543X / '4X Technical Reference Manual, Cirrus Logic Inc, January 1996, pp 9-21), the data transfer according to this method is constructed as follows: during the time interval when there is no output of the image on the screen (blanking interval) the inverse store-type buffer is completely recorded; while the information is being displayed, the data is being read from the inverse store-type buffer; when the reverse store-type buffer cell located at a specific address (specified by the configuration register) is read, a request is made to overwrite the contents of the reverse store-type buffer, and after receiving a confirmation signal from the memory controller that it is ready to start transmission, the entire store-type reverse buffer is filled with new data . In parallel, the read counter reads the remaining cells and switches to reading cells from the start address; and so on until all the information corresponding to the output of one line to the screen is transferred through a buffer of the inverse store type. This method has the following disadvantages: a) individual settings of the moment the request for dubbing is generated for each video mode; b) a change in time from the moment the request for rewriting is generated to the moment the rewriting begins, possibly within small limits, which leads to a loss of flexibility of the memory access arbitration system.

Another method used to control the inverse store-type buffer of a graphic controller is described in US Pat. No. 5,767,862, Method and Apparatus for Self-Throttling Video FIFO (US patent 5,767,862, Jun.16, 1998). . This method differs from the one described above in that it automatically sets the moment of generating a request to overwrite the inverse store-type buffer for each video mode. The disadvantage of this method is the change in time from the moment the request for dubbing is generated until the moment dubbing begins, possibly within a small range.

Closest to the proposed method is the method proposed in US patent 6,047,339 "Buffering data transmitted between buses operating at different frequencies" (US patent 6,047,339, Apr.4, 2000, "Buffering Data That Flows Between Buses Operating at Different Frequencies") . In this method, the inverse store-type buffer is divided into several blocks. In parallel, there is a process of writing and reading. Only one type of access is allowed to a separate block at the same time: either writing or reading. Permission to write or read each block is determined based on the state of the flags informing that this block has already been read or already written. This method does not require additional settings for each video mode. The disadvantage of this method is that it is necessary to completely record the read block before it starts reading again. This leads to an increase in the minimum frequency of writing to the inverse store-type buffer compared to the methods presented above.

The problem to which this invention was directed was to develop a method for controlling the process of transmitting data through a reverse store type buffer with the following characteristics: a) a lower minimum recording frequency compared to the last of the described methods; b) the ability to change the time from the moment the request for dubbing is generated to the moment the dubbing begins, to a large extent.

This problem is solved due to the fact that in the method of controlling the buffer of the inverse store type of the video system, which consists in transferring data through a buffer between the video memory and the image forming path, the buffer is divided into at least two blocks in which recording and reading are made into each of the blocks of the same size, write in a packet whose size is a multiple of the size of the block, write and read blocks at the same time, while writing to both blocks is done in one memory access, in addition, write s blocks begin no later than the second unit reading the last cell, and by the end of the first reading unit block is already due to be completed.

The inverse store-type buffer is two memory blocks in the address space of the controller, for example, the first block contains memory cells with addresses 0-7, and the second block contains cells with addresses 8-15. This buffer is located between the video system and the imaging path. Both blocks are the same size, and the size of the packet of information written to the buffer is a multiple of the block size.

Data transfer using this method is constructed as follows: during the time interval when there is no output of the image on the screen (blanking interval), the inverse store-type buffer is completely written down; while the image is being displayed on the screen, data is being read from the buffer; after reading the first block, a request is made to the video memory arbiter to overwrite the first block, the second block is reading in parallel, and recording should begin no later than the last cell of the second block, and at least one cell must be written by the time the first block begins to be read.

It should be noted that the started recording will continue until both blocks are written, and the recording time should be less than the reading time of the first block.

Thus, it becomes possible to reduce the minimum recording frequency, in particular with the specified number of addresses, as well as with the number of clock cycles of the recording signal from issuing a request to rewrite the buffer until recording starts in the buffer (5 cycles) and with the maximum possible delay in the arbiter providing memory access to overwrite the buffer (10 clock cycles) and with a read clock period of 40 ns, the decrease will be 25 MHz.

As regards the ability to change the time from the moment of generating the dubbing request to the moment the dubbing starts, this time interval is increased for the above data by 7 clock cycles of the recording clock.

A distinctive feature of the proposed method is that it does not prohibit the simultaneous reading and writing of a block.

Thus, the following situation becomes possible: after issuing a request to overwrite a block, batch writing of new information to this block will begin simultaneously with the end of reading the next block. Therefore, the arbiter may have a lot of time to complete the operations with the memory of the device that works with it before the request for rewriting is issued. This increase in time is equal to

T _W (N _F 0.5-1),

where T _W is the recording clock period;

N _F - the number of cells in the buffer inverse store type.

And this increases the flexibility of the memory access arbitration system compared to the last of the described methods.

In addition, since the recording of the first block began simultaneously with the end of reading the second block, this recording will continue until the second block is recorded. Recording should end before the second block begins to be read. Therefore, both blocks of the inverse store-type buffer can be written in a single memory access. And this leads to a decrease in the minimum frequency of writing to the inverse store-type buffer compared to the last of the described methods. The decrease in the recording clock frequency is calculated as follows:

analyzed inequality

N _W + N _MAX +1> N _F -1

If it is true, then the difference in frequencies is obtained from the following equation:

F _W1 -F _W2 = (N _F -2) / (T _R N _F ).

If the inequality is false, then the difference in frequencies is obtained from the following equation:

F _W1 -F _W2 = 2 (N _W + N _MAX + 1-N _F 0.5) / (T _R N _F ),

where N _W is the number of clock cycles of the recording from issuing a request to overwrite the reverse store-type buffer to the moment the recording starts in the reverse store-type buffer (provided that by the time the request was made, none of the devices was working with video memory);

N _MAX - the maximum possible delay in providing the arbiter with access to memory to overwrite the buffer of the inverse store type;

T _R is the read clock period.

Thus, the proposed method allows to reduce the minimum frequency of writing to the inverse store-type buffer and make the memory access arbitration system more flexible.

Claims (2)

1. A method of controlling a buffer of the inverse store type of a video system, which consists in transferring data through a buffer between the video memory and the image forming path, the buffer being divided into at least two blocks and writing and reading in these blocks, characterized in that the writing to these blocks produce a packet whose size is equal to the size of the buffer, write to the indicated blocks in one call to the video memory, and in a separate block write and / or read at the same time. 2. The method according to claim 1, characterized in that the writing of the blocks begins no later than the reading of the last cell of the next block, and by the time the first block is read, at least one of its cells is written, and the writing of blocks is completed by the time the first block is read.