JPH02222023A - Reproducing device for multi-channel information - Google Patents

Abstract

PURPOSE:To reduce the capacity of a buffer memory by selecting a write address out of an unused area of the buffer memory when the information is written into the buffer memory, then reading the information out of the buffer memory. CONSTITUTION:An information reproducing device has no exclusive area in a buffer memory 3 to store the output information on each channel. That is, the write address of the information read out of a large capacity memory 1 is supplied each time from a write address generating means 6 via an unused area selection address conversion means 8. The means 8 always grasps the unused areas of the memory 3 and selects the proper one of these addresses to supply it to the memory 3 for each writing action. Thus it is just required to prepare a least necessary information store area in the memory 3. As a result, the capacity of the memory 3 is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application 1] The present invention relates to a multi-channel information reproducing device that multiplexes information in a time-division manner and outputs the multiplexed information to a plurality of channels.

[Prior Art] A multi-channel information reproducing device allows multiple users to access information such as audio/video information stored in a mass storage device in a time-sharing manner, and each user can access arbitrary information. can be accessed at the same time.

FIG. 3 shows a block diagram of a conventional multi-channel information reproducing device.

In the figure, this device is composed of a mass storage device 1, a demultiplexing means 2, n buffer memories 3, to 3o, and a multiplexing device 4.

The mass storage device 1 consists of a hard disk device, an optical disk device, etc., and consists of information files storing a large amount of music information and image information. The demultiplexing means 2 is a means for controlling the transfer of audio/video information from the mass storage device 1 to the buffer memories 31 to 31 and writing the information into these n buffer memories. This means is composed of a timing circuit, a gate circuit, and the like.

Each of the buffer memories 31 to 3n is provided as many times as the number of users using the audio/video information, and is a first-in, first-out memory (first-in, first-out memory) for temporarily storing information in order to output the information to a channel assigned to each user.
FIFO), etc.

Here, if the n buffer memories 3I to 3n in the figure are connected to each user through separate and independent communication lines, the information stored in each buffer memory 31 to 3n can be stored in parallel at the same time. Can be provided to users. However, in this circuit, one line 5 is provided with a multiplexing device 4 that reads, multiplexes, and transfers information stored in each of the buffer memories 31 to 3o in a time-division manner.

By the way, in general, with regard to the mass storage device 1, throughput can be improved by sequentially accessing continuously written information all at once, rather than by randomly accessing a small amount of discontinuous information. Therefore,
When writing information from the large-capacity storage device l to the buffer memories 3, to 3o via the demultiplexing means 2, even if the information is read out in a time-sharing manner, a certain amount of data is read out at once. Transferring results in higher throughput.

On the other hand, the information read out from the buffer memories 31 to 3n and output for each channel is a small amount of data because each user's terminal selectively takes out only a specific channel from the line 5. It is easier to reduce the burden on user terminals connected to each channel by transmitting frequently and lowering the peak transfer rate.

For this reason, the demultiplexer 2 is usually set to have a long time slot allocated to each channel, and the multiplexer 4 is set to shorten the time slot allocated to each channel.

FIG. 4 is a block diagram of the main parts of a conventional device embodying such an operation.

Here, a large capacity storage device 1, a buffer memory 3 for storing information transferred therefrom, a write address generation means 6 for outputting an address for writing information to this buffer memory 3, and an address for reading information from the buffer memory 3 are provided. A read address generating means 7 is shown. Here, to simplify the explanation, all channels set in this device are referred to as A.

Assume that there are 5 channels: B, C, D, and E.

First, from the mass storage device 1, 5 units of information of one channel are taken out for output to each channel (one time slot for writing), and this is stored in the buffer memory 3. be done. Then, information is read out from the buffer memory 3 in a time-division manner one unit at a time for each channel. That is, the amount of information transferred in the time slot assigned to each channel during information reading is set to one-fifth of that during writing.

The write address generation means 6 is composed of a user address counter 6a and an information address counter 6b.

The user address counter 6a is a counter that supplies an upper address for writing to the buffer memory 3. With this counter, for example, the information writing area 31 for the A channel provided in the buffer memory 3 in the figure.
is specified. Also, the information address counter 6b determines that this area 3. A write address in word units is specified for the inside.

Similarly to the user address counter 7a of the read address generation means 7, the user address counter 7a supplies the upper address for reading to the buffer memory 3, for example, for the A channel in the buffer memory 3. Specify area 31. The information address counter 7b is, for example, in the area 3. An address signal for reading out information word by word from the address signal is supplied.

In this example, the read information address counter 7
b controls the reading of one unit of information, but the writing information address counter 6b outputs a write address of five units of information.

[Problems to be Solved by the Invention] By the way, in the information reproducing device as described above, when trying to improve the sound quality of music information or the image quality of video information, for example, it is necessary to The transfer density increases, and the amount of information to be stored in the buffer memory 3 also increases.

However, as shown in Figure 4, in general, the buffer memory 3 is set up in advance with a dedicated information writing area for each channel, so as the amount of information increases, the buffer memory becomes large in capacity. This increases the size of the device and increases the cost of the device.

The present invention has been made with attention to the above points, and an object of the present invention is to provide a multi-channel information reproducing apparatus in which the capacity of the buffer memory is reduced.

[Means for Solving the Problems] A multi-channel information reproducing device of the present invention includes a large-capacity storage device that stores information, and a buffer memory that temporarily stores the information in order to output information corresponding to a large number of channels. and, according to each channel, 2. Transfer multiple units of information from the mass storage device to the buffer memory at a time, and output a write address for writing the information to the buffer memory. a read address generating means for generating a read address for reading and outputting the information one unit at a time from the buffer memory for each channel in a time-sharing manner; and the write address generating means for generating a read address for each channel. The present invention is characterized in that unused area selection address converting means is provided for converting the write address of the information to be selected from an unused area of the buffer memory each time the writing operation of the means is performed.

[Operation] The device of the present invention described above does not provide a dedicated area in the buffer memory for storing output information for each channel. That is, when information is read from the mass storage device, the write address of the information is supplied each time by the write address generation means via the unused area selection address conversion means. This unused area selection address conversion means always grasps the unused area of the buffer memory, selects an appropriate address from among the addresses of the unused area, and supplies it to the buffer memory during a write operation. Make it. Therefore, the buffer memory only needs to be provided with the minimum necessary information storage area, and the capacity of the buffer memory can be reduced compared to the prior art.

[Example] Hereinafter, the present invention will be explained in detail using embodiments shown in the drawings.

FIG. 1 is a block diagram of an embodiment of a multi-channel information reproducing apparatus according to the present invention.

The device shown in the figure is composed of a mass storage device 1, a buffer memory 3, a write address generation means 6, a read address generation means 7, and an unused area selection address conversion means 8.

The mass storage device 1 is a device consisting of an optical disk or the like that stores audio/video information.

The buffer memory 3 is composed of a first-in, first-out memory, etc., and is configured so that writing and reading operations are performed alternately.

Write address generation means 6 and read address generation means 7
is composed of a user address counter and an information address counter (not shown), which are exactly the same as those shown in FIG.

The unused area selection address conversion means 8 is composed of a table memory or the like that receives the outputs of the write address generation means 6 and the read address generation means 7 and outputs a write address or a read address.

In this embodiment, as in the case shown in FIG. 4, five units of information for each channel are collectively written from the mass storage device 1 to the buffer memory 3 in one time slot. , while buffer memory 3
From then on, the information is output in a time-divisional manner, one unit for each channel, for a total of five units at the same time.

A more specific operation of the apparatus shown in FIG. 1 will be explained using FIG. 2.

FIGS. 2(a) to (f) show the unused area selection address conversion means shown in FIG. 8
The read addresses output from the computer are entered and displayed in order to show the passage of time.

First, at the start of the operation of the apparatus, five units of information are written into the buffer memory 3 in order to output the information to channel A, as shown in FIG. 2(a). The write addresses are sequentially selected as "1°2.3, 4.5". At the timing shown in the next diagram (b), first, one unit of data written to address
read out for output. As a result, four units of information for channel A are left in the buffer memory 3. These pieces of information remain written at the address "2°3.4.5". Then, at the next timing, five units of information to be output to channel B are written into the buffer memory 3. As the write address, in addition to the address "1" which was previously unused by reading, the addresses "6, 7, 8.9" are selected.

Next, in FIG. 2(C), information is again read from address "2" for channel A, and information is read from address "°1°" for channel B.

Then, at the next timing, 5 units of information for channel C are written into the buffer memory. The write address is the address “10, 11°12” in addition to the address “2.1” which was unused by the previous read.
is selected.

Similarly, as shown in FIG. 2(d), next, for channels A, B, and C, one unit of address each is "3".
, 6, 2" is output, and further information for 5 units for channel D is output to addresses "3, 6, 2, 1".
3.14". Then, as shown in the same figure (e), one unit of information each for channels A, B, C, and D is read from addresses "4, 7, 1.3". The address “4,7” of the buffer memory is set for channel E.
, 1.3.15°' are selected, and information for 5 units is written.

Next, in FIG. 2(f), 5 units of information for channel A are written again.

In this case, the addresses for the 5 units that were read immediately before are ``5, 8, 10, 6, 4...''. ” is selected as the write address.

Although subsequent operations are not shown, the read address is directly selected as the write address. Also, as shown in Figure 2, the selection of read addresses has a certain regularity, so this can be checked by looking.
It is sufficient to create an up-table and store it in the unused area selection address conversion means 8.

In addition, in the above explanation, '1' is used for each unit of information.
, 2.3°°, etc.
Needless to say, this one unit of information is composed of a plurality of words.

Further, the address conversion look-up table in the unused area selection address conversion means 8 may be a fixed one that outputs an appropriate address signal in all states, or a control (not shown) table may be used. The information may be periodically rewritten at a predetermined timing by means or the like. This rewriting does not require very high speed, so
Control by an ordinary microprocessor is also possible.

[Effects of the Invention] According to the multi-channel information reproducing apparatus of the present invention described above, when writing information to the buffer memory and reading information from the buffer memory, a write address is selected from an unused area of the buffer memory. As a result, the capacity of the buffer memory can be reduced compared to the case where a dedicated write area is provided for each channel in advance in the buffer memory.

For example, according to the embodiment shown in FIG. 1 above, the maximum required memory capacity is 15 units, which is a significant reduction in memory capacity compared to the conventional method, which required 5 x 5, that is, 25 units. There is. As a result, it is possible to reduce the size and cost of the entire device.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the multi-channel information reproducing device of the present invention, FIG. 2 is an explanatory diagram of its operation, FIG. 3 is a block diagram of a conventional device, and FIG. 4 is a more specific example of the conventional device. FIG. 2 is a block diagram illustrating the operation. 1... Mass storage device, 3... Buffer memory, 6
...Write address generation means, 7.Read address generation means, 8.Unused area selection address conversion means. Figure Figure Figure

Claims (1)

[Scope of Claims] A large-capacity storage device that stores information; a buffer memory that temporarily stores the information in order to output information corresponding to a large number of channels; write address generation means for outputting a write address for transferring unit information from the mass storage device to the buffer memory and writing the information to the buffer memory; and for each of the channels; read address generation means for generating a read address for reading and outputting the information one unit at a time from the buffer memory in a time-divisional manner; A multi-channel information reproducing apparatus characterized in that an unused area selection address conversion means is provided for converting so as to select from an unused area of the buffer memory.