JPH09218749A - Data buffer device and data server system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a data buffer device having same buffering ability with small capacity memory by specifying the storage capacity of a buffer means and inputting a block by means of an input means in a specified period. SOLUTION: A disk device 101 consists of a hard disk device and an optical disk device, etc., so as to store video information being information of plural images. The data buffer device 102 is functioned as a buffer memory corresponding to multiple channels which store the data blocks of multiple users. At this time, when a block size is adopted as L, time required for inputting the block by the input means is Ti, a cycle is To, the quanty of data which is not read out after written in the buffer means is (d) and a positive integer is (m), the storage capacity D of the buffer means is adopte as a value being more than (m+Ti/To) and less than (m+1)L. Then, the input means inputs the block in the period when Ti<To is satisfied and also d is more than TiL/To.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data buffer device and a data server system for distributing data such as video information to a plurality of users.

[0002]

2. Description of the Related Art A distribution system for video information such as moving images is
A demand type service that distributes video information to a large number of users in response to requests from each user is provided. In such a system, a large capacity storage device is used as a large scale database. As for the video information stored in the mass storage device, the portion corresponding to the request of each user is read and the video information is distributed through the channels. Here, the channel refers to a logical or physical resource of the system that is not common to each user but is individually assigned to each user, and is an input / output device for distributing data to each user. , Communication path, transmission time, etc.

The data transfer in such a distribution system has the following features. First, in reading data such as video information from a large-capacity storage device, it is necessary to continuously read data blocks of a large size at a high data transfer rate. Here, the block is read as a unit because it is more efficient to read continuous data from a hard disk device or an optical disk device used as a mass storage device, and the average data transfer rate can be increased. The data transfer rate is a value indicating the amount of data transferred per unit time.

Second, the data transfer rate of user-side channel output is lower than the data transfer rate that can be output from the mass storage device for one user. This is because, for example, the compressed and stored video information such as MPEG is expanded and reproduced, and the information is evenly provided to a large number of users, so that the output to each user is evenly distributed. Because there is. In particular,
If there is data according to the MPEG1 standard, the data transfer rate is 1.5 Mbps (= 0.1875 MB / s), and a large-capacity storage device compatible with this is, for example,
Fast SCSI capable of data transfer of about 5 MB / s
A hard disk device with a standard interface is conceivable.

By utilizing the above characteristics, while one block of data that has been read from the mass storage device is output to the user-side channel over time, another user's data can be mass-stored. It can be read out from the device, and the video information can be distributed from one mass storage device to a plurality of users. In such a distribution system that distributes data from a large-scale storage device to a large number of users, a buffer memory is provided between the large-capacity storage device and the distribution to the users to absorb the difference between the above two types of data transfer rates. ing. For example, even if 5 units of data are continuously written to one channel of the buffer memory in a short time, when outputting, one unit is output to each user with a time interval.

As a conventional data buffer device for adjusting the input / output time of data by reading data from a large-scale storage device, temporarily storing the data in a buffer, and then distributing the data, for example, Japanese Patent Laid-Open Publication No. 2-2220
22 are disclosed. In this example, video data to be sent to each channel of each user is stored in the buffer memory, and data reading from the buffer memory is executed by designating an address of the memory for each user. Such a buffer memory configuration is generally a double buffer system in terms of data to each user.

FIG. 28 (a) is a diagram showing a buffer memory area for one user in the double buffer system. The buffer memory is composed of two buffers B1 and B2, each of which has the same block size L for one access to the mass storage device.
That is, by using the buffer memory having a capacity twice as large as L, the data storage in one buffer memory and the data reading from the other buffer memory are executed in parallel.

FIG. 28B is a diagram showing the timing of data storage and read in the double buffer system. T shown in the figure is the time required to output the data of size L from the channel, and is a cycle for managing the buffer. First, in the first cycle, the buffer memory B1 is written to the buffer memory B1 in a short time (Tw), and then in the second cycle, the written contents of the buffer memory B1 are stored for the time Tr = T according to the data transfer rate to the user. It is read and transmitted during the period. During this time, the buffer memory B2 is also used in parallel, and is read from the buffer memory B2 while writing to the buffer memory B1 and written to the buffer memory B2 while reading from the buffer memory B1. The buffer memories B1 and B2 are
As soon as the transmission of the buffer memory B1 is completed, it is switched to the transmission of the buffer memory B2. Here, as shown by the arrow Tw in FIG. 28B, writing to the buffer memory is performed on the buffer memory that is not being read, but since the writing time Tw is short, writing is being performed. It may be executed at any time.

As described above, according to the conventional double buffer method, the video information can be output to the user without interruption by outputting while switching the buffer memories B1 and B2.

[0010]

However, the conventional double buffer system has the following problems. First
Moreover, in order to guarantee the transmission of data to each user, a buffer memory having a capacity twice as large as the block size for one data read is required for each user. Therefore, when the number of channels is increased or the block size of data is increased, there is a problem that a buffer memory having an extremely large capacity is required as a whole.

Secondly, in the double buffer system, two areas are used for reading and writing, but there is a problem that it is difficult to deal with the case where the bit rate temporarily changes. For example, normally, as shown in FIG. 29A, a channel is output at a constant transfer rate as time advances. However, in the case where the data transfer on the output side is congested or the bit rate of the data partially changes, when there is no data to be output or when data is input even though the output is delayed, FIG.
As shown in (b), there is a possibility that data underflow or overflow may occur. In such a state, the reproduction of the video information is interrupted, which is a serious problem.

Thirdly, there is a problem that the response time for requests for different data is long. FIG. 30 shows that different video information A ′ requests (Re
FIG. 9 is a diagram showing the timing of data storage and read in the double buffer method when qA ′) occurs. The cycle in which ReqA 'occurs is the acceptance cycle, and the next cycle is the new video information A'.
Is the cycle of writing to the buffer memory, and the sending of the video information A ′ to the user starts from the beginning of the next cycle (AckA ′). At this time, a cycle for accepting the request (maximum T) and a cycle T for reading data from the mass storage device and writing to the buffer memory are required from the user's request to the start of output to the user. Yes, i.e., a maximum of 2T is required from request to response.

Since this 2T time means twice the management cycle time T of the buffer memory, it means that the larger the block size L, the longer the response time. Therefore, if the block size is increased in order to increase the transfer rate from the mass storage device, the responsiveness deteriorates accordingly. Therefore, in order to solve the above problems, the present invention does not require a large amount of buffers and does not increase the amount of hardware, while efficiently accessing an external storage device while providing a highly responsive data buffer. An object is to provide a device and a data server system.

[0014]

To achieve the above object, a data buffer device according to the present invention comprises a buffer means for temporarily storing data and a data storage device based on a request from a terminal. Input means for reading out data in block units and cyclically writing the data to the buffer means and for inputting a block, and cyclically reading and writing the data written in the buffer means for one block during a cycle of a constant cycle. The output means repeats the cycle of outputting to the terminal at the ratio of the data amount of L, the block size is L, the time required for the input means to perform block input is Ti, the cycle is To, and the buffer means is written. If the amount of data that has not been read out later is d and a positive integer is m, the storage capacity D of the buffer means is (m + Ti The To) L or more and (m + 1) is a value less than L, the input means satisfies Ti <the To, and, d
It is characterized in that block input is performed in a period in which is equal to or more than TiL / To.

As a result, a data buffer device having the same buffering ability can be realized with a memory having a smaller capacity as compared with the conventional double buffer system which requires a storage capacity of (m + 1) L. In addition, the response time from the terminal issuing a data request until receiving the first data is shortened.

[0016]

BEST MODE FOR CARRYING OUT THE INVENTION A data buffer device according to the present invention is a device interposed between a mass storage device and a terminal that uses data stored therein, and is for temporarily storing data. Buffer means, input means for reading data in block units from the mass storage device in response to a request from the terminal in a block unit and writing the data in the buffer means, and for circulating the data written in the buffer means. And an output means for repeating the cycle of reading and outputting the data to the terminal at a rate of the data amount of one block during a cycle of a constant cycle.

Here, the block input by the input unit and the data output by the output unit are operated in parallel by time division or the like, but the time required for the block input is set to be shorter than the output cycle. Also, the storage size of the buffer means is set to a value obtained by adding 1 block to “the amount of data that can be output in parallel while 1 block of data is input”, and the input means has a free space of 1 in the buffer means. A new block input is made when the number of blocks is exceeded.

As a result, the access to the buffer means is not made in fixedly divided block units, but a block input is made when the total free capacity exceeds one block without depending on the address on the buffer means. Is done. That is, although the storage size of the buffer means is less than 2 blocks, data is continuously supplied to the terminal at a rate of 1 block in a constant cycle.

Further, the storage size of the buffer means is set to "1.
The amount of data that can be output in parallel while the data of the block is input is added by m blocks, and the input unit has an average value of the amount of data left in the buffer unit that is half the storage size of the buffer unit. It is also possible to perform block input at a timing such that As a result, even when the transfer rate of the data output from the buffer means changes, a change amount corresponding to half the storage size of the buffer means is absorbed. That is, the speed ratio of the data input to the buffer means and the data output from the buffer means is
Underflow or overflow of data does not occur as long as it is within a certain range with respect to the speed ratio used as a reference for determining the storage size of the buffer means.

By combining a plurality of such data buffer devices and a mass storage device, a data server system for continuously supplying data to a plurality of users is constructed. Here, it is preferable to control each input means and each output means such that the timing of starting the block input and output cycle is deviated by a certain time between the data buffer devices.

As a result, the input means and the output means do not need to operate at the same time, and it is sufficient if they operate sequentially in a time division manner. Therefore, it becomes easy to share the hardware that realizes the input means and the output means in each data buffer device, and the data server system can be constructed with simple hardware. Furthermore, each data buffer device is assigned to one of a plurality of groups,
It is also possible to control each input means so that the block inputs in all the data buffer devices belonging to the same group are performed within the time allotted to the group.

As a result, in a system for performing scheduling for improving the efficiency of block input access, the number of times of scheduling to be performed in one cycle always matches the number of groups without depending on the number of users. Therefore, the processing for improving the efficiency of the block input access is simplified. Further, when a terminal receiving data is requested for a block of a completely different type from the block so far, it is preferable to newly assign a group to the terminal. .

As a result, even when the type of data to be supplied is changed, efficient access for block input can be ensured and a large number of users can input blocks in a short time. Become. Although unnecessary prefetch data may remain in the buffer unit due to such reassignment of groups, newly input block data can be overwritten on the unnecessary prefetch data.

This avoids wasting the area of the buffer means due to wasted data.

[0025]

Embodiments of the present invention will be described below in detail with reference to the drawings. (First Embodiment) (Configuration) FIG. 1 is a configuration diagram of a video server system according to a first embodiment of the present invention. In the video server system, as shown in the figure, a disk device 101, a data buffer device 102, a control processor 103, and a distribution switch 1
04. The disk device 101 includes a hard disk device, an optical disk device, and the like, and stores video information, which is a plurality of video information.

The data buffer device 102 functions as a buffer memory corresponding to a large number of channels which store a large number of data blocks of users. The specific configuration will be described later. The control processor 103 is composed of a ROM storing a control program, a RAM as a work area, a CPU, etc., and includes a disk device 101 and a data buffer device 1.
02 and the distribution switch 104 are controlled. The distribution switch 104 is composed of a network control circuit, an amplifier, etc., and distributes a data block to a large number of users through a plurality of output channels.

FIG. 2 is a diagram showing a specific configuration of the data buffer device 102. Data buffer device 102
Is roughly divided into a data transfer device 210 and a memory 22.
0. The memory 220 is composed of a DRAM or the like, and temporarily stores the data read from the disk device 101. Data transfer device 210
Is composed of a write address generation circuit 214W, a read address generation circuit 214R, a parameter register 213, a data input / output circuit 212, and an input / output control circuit 211. The read address generation circuit 214R and the write address generation circuit 214W logically generate addresses of a plurality of buffers for distribution to a plurality of channels.

FIG. 3 shows the data transfer device 210 and the memory 2.
20 shows a configuration of a logical buffer realized by 20. The buffer stores the data of each of the n users and functions as n independent buffers U0 to Un-1. The data for each user is stored in the corresponding buffer area Ui, and the data on the memory is sequentially read and distributed to each channel via the distribution switch 104. It should be noted that “logical” means not seeing the actual timing, but seeing the access procedure to the memory 220 from the viewpoint of the low processing speed of the user terminal that uses the data. Therefore, in reality, read or write access is performed only to one address in the address space of the memory 220 at an instant.

The parameter register 213 includes a write address generation circuit 214W and a read address generation circuit 2
14R holds parameters for generating an address. The parameter is, specifically, control information such as a storage capacity for each of the n buffers, a numerical range allowed for the write address and the read address, and a mutual relationship.

The data input / output circuit 212 receives data through the input port 215 connected to the disk device 101, and writes the data in the memory 220 through the data bus 217 based on the write address generated by the write address generation circuit 214W. . Further, based on the read address generated by the read address generation circuit 214R, the data is output from the memory 220 through the data bus 217 through the read output port 216.

The input / output control circuit 211 causes the address generation circuit 214 to output the parameters stored in the parameter register 213, and controls the data input / output data transfer through the data input / output circuit 212. (Operation) Next, the overall operation of the video server system will be described with reference to FIG.

In the system shown in FIG. 1, the disk device 101 stores a plurality of video data,
Different video data is selected for each user, and the data requested by each user is distributed through the distribution switch 104. The data stored in the disk device 101 is read at high speed in block units. In the disk device 101, it is possible to prevent the seek time from becoming an overhead, and by reading data in block units, it is possible to increase the amount of data that can be read per unit time. This is because it becomes possible to supply data to more users.

In order to supply data from the distribution switch 104 to users, it is necessary to maintain a constant data transfer rate for each user. This distributes communication traffic and at the receiving terminal of each user,
This is because the data must be evenly distributed and arrive in order to continuously reproduce the data. Next, the size of the buffer for each user Ui in the data buffer device 102 and the operation of writing to and reading from the buffer will be described.

As described above, one block is read from the disk device 101 at high speed and the data buffer device 102 is read.
To the distribution switch 104 from the data buffer.
Through each user at low speed. It is assumed that the writing speed to the data buffer device 102 is ri, and the reading speed from the data buffer device 102 is ro. This read speed ro is the speed of transmission to the user and is the average output rate.

FIG. 4 shows a buffer 222 for one user Ui.
FIG. The block size is L, and the buffer size per user is L + k. Here, k is a size such that the output from the buffer 222 can be output without interruption during the time required to write the data of the block size L in the empty area of the buffer 222. The relationship between the buffer sizes L and k and the data transfer time and the data transfer rates ri and ro is as follows. If the time for transmitting one block of size L to one user is the cycle time T, then T = L / ro. At this time, for k, the time Tw = L / ri for writing the data of the block size L at the transfer rate of ri may be shorter than the time for outputting the data of k size. Therefore,
Tw <k / ro and k> L * ro / ri.

For example, the block size L = 250 KB,
When ri = 5 MByte / s and ro = 4 Mbit / s, the cycle time T = 0.5 s. Here, B is a unit of data amount of bytes (8 bits). At this time, k> 250KB * 0.5M / 5M = 25KB, and k
Is larger than 25 KB. The total size of the buffer 222 per user is larger than 275 KB.

Next, the state of data on the memory 220, the passage of time, and the state of transfer will be described with reference to FIGS. 5 and 6. Here, the operation of the buffer for one user Ui will be described. Initially, there is no data, and in the next step, the data of the first block of size L is written in the memory 220 as shown in FIG. In FIG. 5, writing to the memory 220 is represented by W, and reading from the memory 220 is represented by R. In the next cycle, as shown in FIG. 5B, output of data on the memory 220 is started. At this time, the data is read from the buffer 222 at the transfer rate of ro. In FIG. 5, a blank area in which no data is stored is represented by a white portion.
When the size of the empty area becomes larger than the block size L, the data from the disk device 101 is written in the memory 220. As shown in FIG. 5C, the write W is continuously written from the last position of the previously written block. This writing is k> L * ro / ri
It takes less time to write the data of size L in the area L than to output it from the buffer 222. This allows
In FIG. 5C, the write W ends before the read R. FIG. 5D shows a state in which all the data of the first block has been output. Buffer 2 in this state
If the same processing is performed in the next cycle for 22 as well, FIG.
Data is sequentially transferred as shown in (e), (f), and (g). In this way, the write W to the buffer 222 is written from the position next to the block written in the previous cycle, folded back with the size L + k of the buffer 222, and returned and written first.

FIG. 6 is a diagram showing the timing of writing and reading to and from the buffer 222. Ta to Tg in the figure
Respectively correspond to FIGS. 5A to 5G and represent the temporal position of the state of each buffer. Tk is the time required to read data of size k, and Tk = k / ro> T
w. In this figure, the data writing time Tw
The reason why the data read time Tr and the data read time Tr overlap is that this figure is for explaining the operation of the "logical" buffer. In practice, both operations are time-divided into small time intervals. . In this way, the output from the buffer 222 can be sequentially transmitted without interruption, which is suitable for reproducing video information and the like.

Next, the operation of each circuit in the data buffer device 102 will be described. FIG. 7 is a flowchart showing a control procedure of writing and reading to and from the memory 220 of the data buffer device 102. This figure describes the operation for one user Ui. First, the write and read addresses Aw and Ar are initialized (step S11). This initialization is performed by the input / output control circuit 211 using the parameter register 213. The address value of the address generation circuit 214 is returned to this initial value when it exceeds the upper limit (L + k) size of the buffer area 222.

In data transfer, writing (input) to the memory 220 and reading (output) from the memory 220 are executed in parallel. This is to activate the data input process by checking the size of the empty area of the buffer 222 as shown in FIG. 7 (steps S12, S).
13) and monitoring the operation status of the process of outputting data from the buffer 222 (steps S14 and S1).
It becomes possible in 5).

Here, the size of the empty area is the address Aw.
It is checked by calculating the magnitude of the difference between the address Ar and the address Ar. However, since the address of the buffer 222 is circular, when Aw-Ar takes a negative value, L + k +
Calculation is performed by Aw-Ar. In the data input process and the data output process, each address value is sequentially added according to the data input / output. This input process is
This process is stopped when the number of input data is counted and executed until the number of data becomes L. On the other hand, in the output process, as soon as the output of the number of data L is completed, the output of the next block is continuously activated.

As described above, in the video data system according to the first embodiment, the memory area is used by cycling the reading and writing directions for each step. Therefore, the amount of buffer required for each user only needs to add a small amount of spare area to the size of the block of data. That is, in the conventional double buffer method, since the memory area is accessed only in fixedly divided block units, even if an empty area is generated, all the data in the block is not read out. Writing data to the block is not allowed. Therefore, a memory area for two blocks is required.

On the other hand, in this system, if the total capacity of the empty area exceeds 1 block, 1 block of data is input regardless of the position of the empty area. Then, the size of the memory area is set to a necessary and sufficient value calculated from the input / output access. Therefore, it is possible to provide the same buffer capacity as the double buffer method, even though the memory area is smaller than 2 blocks.

As for the responsiveness, as shown in FIG. 8, when the user who is watching the image A requests (Req A ') a different image A', the response (Ack
A ') is responded in a maximum of T + Tk times. Since this time Tk is a value smaller than the cycle time T,
The response time of this system is smaller than that of the double buffer. Second Embodiment (Structure) Next, a video server system according to a second embodiment of the present invention will be described.

This system has almost the same configuration as the system of the first embodiment, but the configuration of the data buffer device 102 is different. FIG. 9 is a diagram showing a buffer 223 for one user Ui of the data buffer device 102 in the present embodiment, and corresponds to the buffer 222 shown in FIG. 4 in the first embodiment. The size of the buffer 223 is twice the block size L plus k. This k is
This is the same as FIG. 4, and is read from the buffer at a time Tk that is larger than the time Tw required to write one block of size L to the buffer 223. in this case,
The buffer 223 is circulated and used in the same manner as the buffer 222 of the first embodiment, but the data writing timing and the data reading timing are different.

Since the other components of this system are the same as those in the first embodiment, the description thereof will be omitted. (Operation) The operation of the buffer 223 will be described with reference to FIGS. FIG. 10 is a diagram showing three typical cases permitted regarding the timings of writing and reading data to and from the buffer 223. Each of FIGS. 10 (a), (b), and (c) is a half when outputting immediately after reading (FIG. 10 (a)), when outputting after waiting for one cycle (FIG. 10 (b)), The operation when waiting for a cycle and then outputting (FIG. 10C) is shown. T, W and R in the figure are the same as those in the first embodiment, and W and R represent writing and reading.

FIG. 10A shows the buffer 2 of the first embodiment.
The operation is the same as that of 22. In FIG. 10B, the data L of one block is written in the buffer 223 while the data L of another block is written. Therefore, the data written in W is in a waiting state for the next one cycle because the previous data is being read. FIG. 10C is an intermediate state between FIG. 10A and FIG. 10B, and the data is in a waiting state only for a half period of the cycle time T.

The data states of the buffer 223 are shown in FIGS. 11 and 12. FIG. 11 shows the state at the end of W in FIG. 10, and FIGS. 11 (a), (b), and (c) correspond to FIGS. 10 (a), (b), and (c), respectively. As can be seen from these figures, when the writing W is completed, L (FIG. 11A), 2L (FIG. 11B), and
A state in which 1.5 L (FIG. 11C) of data has been stored. However, since Tk> Tw, a maximum amount of (k−L / ri) data remains in each of them at the time of writing.

FIG. 12 shows the buffer 223 in a writable state. This FIG.
In the read cycle of one block, the state at the time when the write for preparing the data to be read in the next cycle can be started. FIG.
(A), (b) and (c) are shown in FIG.
This corresponds to the cases of (b) and (c). Figure 12 (a) is 2L
12B shows a state in which there is an L sky, and FIG. 12C shows a state in which there is an intermediate 1.5L sky.

FIG. 13 is a diagram showing successive timings of writing and reading data to and from the buffer 223. 13A, 13B, and 13C are respectively shown in FIG.
It corresponds to the cases of (a), (b), and (c). FIG.
6A shows the same timing as in FIG. 6, and the data written in the buffer is immediately read and output. W and R in the drawing represent writing and reading to and from the buffer 223, respectively, and 1, 2 and 3 in the drawing represent the numbers of writing (W) and reading (R), respectively. Read with.

In the case of FIG. 13B, the written data is stored in the buffer for one cycle, and
It is output after waiting for the cycle. FIG. 13 (c) is stored in the buffer for half a cycle, (a) and (b)
Is in between. These three figures 13 (a), (b),
As can be seen from the timing shown in (c), when the transfer rate of the read from the buffer 223 changes, in FIG. 13A, when the read is delayed, the write W is performed at a constant cycle. , The buffer is shown in FIG.
As shown in (a) and FIG. 12 (a), since there is an empty area, the buffer overflow does not occur by writing in this area. In the case of FIG. 13B, when the read R from the buffer 223 becomes faster, and when the write W of the buffer is being performed at a constant cycle, the results shown in FIG. 11B and FIG. Buffer 2 as shown
Since sufficient data is stored in 23, underflow of the buffer 223 does not occur. In the case of FIG. 13C, the position shifted by a half cycle is the cycle of the write W, and has the characteristics of both FIG. 13A and FIG. 13B.

FIG. 14 shows the state of data in the buffer 223 and the operation timing when the data transfer rate of the output from the buffer 223 changes in the state shown in FIG. 13 (c). 14 (a), (b),
(C) shows that when the output transfer rate is constant,
The three states are shown: when the output transfer rate is high (fast) and when the output transfer rate is low (slow). As can be seen from FIGS. 14 (b) and 14 (c), even if there is such a change in the data transfer rate, a state within the range of the state of FIG. 14 (a) to the state of FIG. 14 (b). Underflow or overflow does not occur as long as.

FIG. 15 shows the change over time in the transfer rate of the data output from the buffer 223. In this figure, the second cycle (ov) is when the data transfer rate is low, and the fourth cycle (uf) is
This shows the case where the data transfer rate has increased.
These phenomena are stored in the disk device 101 when the data transfer from the data buffer device 102 is distributed to each user through the distribution switch 104 when the speed of data transfer in each channel fluctuates temporarily due to congestion of the communication path. This occurs when the stored data itself is data with a variable data transfer rate.

As described above, when the data transfer rate fluctuates with time, the buffer needs to absorb the fluctuation, but the normal state of the timing of writing to and reading from the buffer 223 is shown. Thirteen
By setting the state of (c), it is possible to avoid the occurrence of overflow and underflow for fluctuations within a certain range.

As described above, according to the video data system of the second embodiment, it is possible to realize a buffer corresponding to the fluctuation of the data transfer rate with a small capacity. That is, in the conventional double buffer system, a triple buffer with a size of 3L is required to have such a margin, but according to the method of this embodiment, the double buffer (2L) has a small capacity (k). It is realized just by adding it.

In the present embodiment, the size of the buffer is set to 2L + k, but it may be expanded to mL + k (m is an integer of 3 or more). In this case, since the buffer has a margin of (m-1) * L, it is possible to absorb the fluctuation of the data transfer rate in the range of (m-1) * L. (Third Embodiment) Next, a video server system according to a third embodiment of the present invention will be described.

This embodiment is not essentially different from the first embodiment and relates to a user management method in the system of the first embodiment. (Structure) Since the main purpose of this system is to efficiently distribute data to a large number of users,
The capacity of the disk device 101 of this embodiment is made larger than that of the first embodiment.

FIG. 16 shows the disk device 10 of this system.
1 is shown. The disk device 101 includes a plurality of disk units HDD1 (111), HDD2 (112),
The HDD 3 (113) is composed of a bus interface unit 110 connected to a common bus. For example,
The bus interface unit 110 is a SCSI interface, and HDD1 (111) HDD2 (1
12) The HDD 3 (113) is a SCSI disk unit. In this case, a large-capacity disk device 101 can be obtained by connecting a plurality of disk units. (Grouping of Users) Next, grouping of users will be described.

FIG. 17 shows an example of a management table when a plurality of users are divided into two groups. This management table is created and edited by the control processor 103, and is placed in the internal RAM of the control processor 103 (not shown). Here, the number of users is eight. Among the users, U0 to U3 are in group 1 and U
4 to U7 are group 2. The "file" column in the table shown in FIG. 17 represents the name of the file transferred to the user, and the "HDD" column represents the number of the disk unit connected to the disk device. ”Bloc
The "k" column shows the block number requested by the user in the file described in the "file" column.

For example, as can be seen from the "file" column,
U0 and U3 are accessing the same file A.
1 and U4 and U7 also access the same file B. However, as can be seen from the “block” column, the positions of the files accessed by the user are different even for the same file A. That is, U0 is the tenth block,
U3 is accessing block 150. Furthermore, as can be seen from the "HDD" column,
The block is stored in the disk unit 1, but the 150th block is stored in the disk unit 3.

Normally, blocks of consecutive numbers are sequentially accessed so that one video file is sequentially reproduced without interruption. However, exceptionally, the access may be disturbed at the request of the user. For example, when a user requests video information of a previous portion or a previous portion of the video, that is, a temporally skipped portion during reproduction of a video, or U0 accessing file A.
Corresponds to the case of requesting the information of the file B which is completely different image information from that. In such a case, an arbitrary file and an arbitrary block number are accessed at the request of the user. (Operation) Next, the operation of the buffer in group management will be described.

FIG. 18 shows the structure of the buffer 224 divided into groups. Here, k2 is the size of the area required when the number of groups is 2, and here k2> L / 2
To satisfy the size. FIG. 19 is a diagram showing the timing of access to the buffer 224 when the number of groups is two. As shown in FIG. 19, the data of each of the two groups has a half cycle (T / 2).
It is managed so that the buffer 224 is accessed with a shift. The HDDread portion indicates that data for four users is read from the disk device 101 and written in the buffer within this time. On the other hand, o
The output portion also indicates that one block of data from the buffer 224 is output for each of the four users within this time, taking one cycle (T) of time.

The procedure from the writing to the buffer 224 to the reading from the buffer 224 is the same as that of the first embodiment, and therefore the explanation is omitted here. The difference from the first embodiment is that the k2 portion of the size of the buffer 224 is larger than k of the first embodiment, and a plurality of accesses to the disk unit are executed within the cycle T / 2. The point is that the disk access is made efficient by scheduling so that it can be accessed.

FIG. 20 is a diagram showing the timing of access to the blocks of each user Ui. Now, FIG.
As shown in (a), it is assumed that the data of the user Ui is simply sequentially read from the disk device 101. In FIG. 20A, U0U1U2U3 is read out in this order. However, in such a reading order, the blocks of the file requested by each user are not correlated between users and are random. In one respect, the efficiency of access to the disk unit decreases.

One is a case where blocks requested by a plurality of users are consecutive in the same disk unit. For example,
When U0U1 accesses the block of the same disk unit, the disk unit 111 is continuously accessed twice through the interface unit 110. Therefore, the access request to the disk unit 111 and the seek time in the disk unit 111 after this are requested. The rotation waiting time and the data transfer time are required to be added twice in sequence.

The other is the arrangement of blocks in one disk unit, for example U1U.
If 2U3 is in the order of the outer circumference, the inner circumference, and the outer circumference of the disk unit, the seek time of each becomes long. Therefore, in the present embodiment, scheduling is performed for each group and for each cycle T / 2 to determine the optimum order for avoiding the above-mentioned two deteriorations in efficiency. Since the specific procedure of scheduling is not the main purpose of the present invention, its explanation is omitted.

FIG. 20B is a diagram showing the timing of access to the disk device 101 when such scheduling is performed, and corresponds to FIG. 20A when scheduling is not performed. Switching time T for accessing blocks of different users
It can be seen that a is shortened (Ta-> Ta '). FIG. 21 is a flowchart showing the procedure of group management including the above scheduling.

First, the user is divided into a plurality of groups (step S31). Here, the number of groups is g. Next, the size of the buffer per user (L +
k) is determined based on the number of groups g (step S3
2). Specifically, since data of at least k size must be output during the time of T / g, k / r
Determine k such that o> T / g, that is, k> T * ro / g = L / g.

Further, the slot time s for managing each group is calculated from s = T / g (step S33).
After the above initialization, the reading order for efficient reading is determined for all the users belonging to one group i (step S34), and the data of those users is read from the disk device and buffered in that order. (Step S35). When the writing is completed, a process of reading the data of these users from the buffer and outputting the data is activated (step S36). The above operation for group i (steps S34 to S36)
Is repeated for all groups (step S3
7). When the processing of all groups is completed, the process proceeds to the next cycle (S38).

FIG. 22 is a diagram showing the timing of access to the buffers 224 belonging to each group when the number of groups is four. The writing (W) to the buffer for the four groups in each cycle is performed after the disk device 101 is sequentially scheduled. When the writing is completed, the output from the buffer for the users in each group is activated and the data is output during the subsequent one cycle.

As described above, according to the video data system of the third embodiment, by grouping a plurality of users, the responsiveness is improved and the buffer size is reduced as compared with the double buffer system. be able to. In addition, the management cycle of the buffer 224 is not independent of the total number of users and may be the number of groups.
Even if the number of users becomes large, it is not necessary to increase the number of management cycles. In addition, by scheduling access to the disk device for a plurality of users in the group, it becomes possible to improve the efficiency of reading data from the disk device. (Fourth Embodiment) Next, a video server system according to a fourth embodiment of the present invention will be described.

This embodiment is different from the method of group management in the third embodiment. (Structure) The structure of the buffer and the structure of the group management table of this system are the same as those in the third embodiment.

FIG. 23 shows only the entry portion of the user in the management table. Here, the maximum number of users that the data buffer device 102 can supply is eight, and the number of groups is two. In the video server system, a request for an arbitrary video is usually sent from the user to the server. Therefore, the number of users who have to actually supply the video information changes dynamically.

FIG. 23 shows the contents of the management table at the time when four users make two entries in two groups. Here, only 4 of the maximum 8 users are in use and the remaining 4 are empty entries. Here, there are two cases of changing the group allocation, one is the case of accepting a new user ID, and the second is the change of only the group to which the user is allocated.

Specifically, when a new request for video information is made to a data server system by a new user, that user is assigned to an empty entry in the assignment table of FIG. At this time, the group is not fixed for each user but is dynamically allocated. FIG. 24A corresponds to a case where group 1 is assigned as an optimum group for a new request from U4 in the state of FIG.

On the other hand, when a user who is already assigned requests different video information that is not continuous, the group of the user is changed. FIG. 24B is a diagram shown in FIG.
This corresponds to the case where the allocation of U1 is moved from group 1 to group 2 in the state of (a). FIG. 25 is a diagram showing the timing of newly allocating the user U4, and corresponds to the case of changing from FIG. 23 to FIG. When the request ReqU4 from U4 arrives, the group (in this case, G
HDDrea of group 1 by allocating to group 1)
The data corresponding to U4 is written to the buffer from the cycle of d. This data is output in the next cycle (outpu
t) is performed.

On the other hand, FIG. 26 is a diagram showing the timing when the allocation of U1 is moved from the group 1 to the group 2, and corresponds to the case where it is changed from FIG. 24 (a) to FIG. 24 (b). When U1 requests the video information A '(ReqA') while reproducing the video information A, the request (ReqA ')
The allocation of U1 is moved to the group (here, group 2) where HDDread comes earliest with respect to A '). As a result, a response (AckA ') to the request (ReqA') can be made at the time Ta shown in FIG. The data remaining in the buffer in group 1 (the section from Ta to Tb shown in FIG. 26) becomes unnecessary and is canceled. After this,
The user U1 continues data transfer at the timing of group 2 until the next request is made. In addition, since it cannot be assigned to a group with no space, waiting may occur due to this. Further, when a request for new video information can be responded earliest by assigning it to the same group as it is, the assignment of the group is not changed.

As described above, the group determination in FIGS. 25 and 26 is performed so that the read (HDD read) of the disk device 101 becomes the earliest assignable slot. In the case of a group, the response to the request can be received in a maximum of 1 cycle (T). FIG. 27 shows a flow chart of this group allocation procedure.

First, when a new request from the user arrives, the allocation process is started (step S51).
This request may be assigned to a new user or may change the content of video information to the user (step S52). In the case of a new user, it is assigned to the earliest slot group among the vacant slots (step S53). On the other hand, if another empty slot comes earlier than the slot of the group to which the user belongs, the group is changed (step S55). If it does not apply to other groups, the same group accepts the request (step S56).

As described above, according to the video data system in the fourth embodiment, a user is requested by newly assigning a group or changing a group in response to a user's request for distribution of video information. The response time can be minimized. 2 compared to double buffer
In the case of a group, the response time of 2T is reduced to half T. It should be noted that even if the number of groups is three or more, allocation can be performed in the same manner. In this case, the slot time becomes short, and if the number of groups is increased, it becomes possible to further improve responsiveness.

Although the data buffer device and the data server system according to the present invention have been described above based on the embodiments, it goes without saying that the present invention is not limited to these embodiments. That is, (1) the memory 220 in the above embodiment is a normal DR
It was AM, but is not limited to this. For example, it may be a dual port memory having a random access input port and a serial output port, and configured so that accesses of both may overlap. By adopting such a memory, it is ensured that the input and the output to the buffer operate independently and in parallel by hardware instead of software, so that the burden of creating a control program is lightened. (2) The video data system in the above embodiment has one
The data transfer device 210 and one memory 220 are provided, and these functions as a logically independent buffer for n users, but the present invention is not limited to this configuration. For example, n independent modules including a data transfer device functioning as a buffer for one user and a memory may be configured. In this case, the system is composed of n buffers that are physically and logically independent, so that the time constraint imposed on the control program is relaxed.

[0082]

As is apparent from the above description, according to the data buffer device of the present invention, the size of the buffer is the block size L, and the data is read during the time required to write one block to the buffer. Amount of data that can be output k
Since the value (L + k) is obtained by adding (<1), data can be supplied to the output side channel without interruption by using the memory area by cycling the reading and writing directions for each step. It will be possible.

As a result, a data buffer that provides the same buffering capacity as the conventional double buffer system, which requires a memory area for two blocks, although it is composed of a memory having a capacity smaller than two blocks. The device is realized. In addition, the response time from the terminal issuing a data request until receiving the first data is the cycle time T
Time required to output data of size k to Tk (<
The time (T + Tk) is obtained by adding T), which is smaller than that of the conventional double buffer system that requires a response time of 2T.

Furthermore, by setting the buffer size to a value obtained by adding the capacity k to m blocks, it is possible to provide a flexible data buffer device that absorbs fluctuations in the data transfer rate. Further, by combining a plurality of such data buffer devices with a mass storage device, a data server system for continuously supplying data to a plurality of users is constructed.

Further, according to the data server system of the present invention, since a plurality of users are divided into a plurality of groups, the buffer management cycle is not independent of the total number of users but the number of groups. By
It is not necessary to increase the number of management cycles even when the number of users becomes large. In addition, by scheduling access to the disk device for a plurality of users in the group, it becomes possible to improve the efficiency of reading data from the disk device.

Further, by newly allocating a group or changing a group in response to a request for distribution of video information from the user, it is possible to shorten the time from the user's request to the response. Therefore, according to the present invention, a highly efficient and high quality data buffer device and data server system capable of delivering data to a large number of users in a short response time with a small capacity buffer memory are constructed.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a video server system according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a specific configuration of a data buffer device 102 of the video server system.

FIG. 3 is a block diagram showing a configuration of a logical buffer realized by a data transfer device 210 and a memory 220.

FIG. 4 is a schematic diagram showing the size of a buffer 222 for one user Ui.

FIG. 5 is a diagram for explaining the operation of the buffer 222.

FIG. 6 is a diagram showing timings of writing and reading to and from a buffer 222.

7 is a flowchart showing a control procedure of writing and reading to and from the memory 220 of the data buffer device 102. FIG.

FIG. 8 is a diagram showing timings of writing and reading to and from a buffer 222 when a user requests different video data.

FIG. 9 shows one user U in the data buffer device 102 of the video server system according to the second embodiment of the present invention.
It is a figure which shows the size of the buffer 223 for i.

FIG. 10 is a diagram showing three typical cases that are allowed with respect to the timing of writing and reading data to and from the buffer 223. FIG. 10A shows a case where the data is output immediately after being read. FIG. 10B shows a case where the output is performed after waiting for one cycle. FIG. 10C shows the case where the output is made after waiting for a half cycle.

11 is a diagram showing the state of the buffer 223 at the time when writing (W) in FIG. 10 is finished. FIG.
1 (a), (b), and (c) are shown in FIG.
This corresponds to the cases of (b) and (c).

12 is a diagram showing a state of a buffer 223 immediately before writing (W) in FIG. FIG.
(A), (b) and (c) are shown in FIG.
This corresponds to the cases of (b) and (c).

FIG. 13 is a diagram showing consecutive timings of writing and reading data to and from the buffer 223. FIG.
(A), (b) and (c) are shown in FIG.
This corresponds to the cases of (b) and (c).

FIG. 14 is a diagram showing the state of data in the buffer 223 and the operation timing when the data transfer rate of the output from the buffer 223 changes. FIG. 14A shows a case where the output transfer rate is constant. FIG. 14B shows the case where the output transfer rate becomes large (fast). FIG.
4 (c) shows the case where the output transfer rate becomes small (slow).

FIG. 15 is a diagram showing a temporal change in a transfer rate of data output from a buffer 223.

FIG. 16 is a block diagram showing a configuration of a disk device 101 of a video server system according to a third embodiment of the present invention.

FIG. 17 is a diagram showing an example of a management table when a plurality of users are divided into two groups.

FIG. 18 is a diagram showing a configuration of a buffer 224 for one user when divided into groups.

FIG. 19 is a buffer 22 when the number of groups is 2.
4 is a diagram showing the timing of access to No. 4; FIG.

FIG. 20 is a diagram showing a timing of access to a block of each user Ui.

FIG. 21 is a flowchart showing a procedure of group management.

FIG. 22 is a diagram showing the timing of access to the buffers 224 belonging to each group when the number of groups is four.

FIG. 23 is a diagram showing an entry portion of a user in the management table in the video server system according to the fourth embodiment of the present invention.

FIG. 24 (a) is a diagram showing a management table in the case of allocating group 1 as an optimum group for a new request from the user U4 in the state of FIG. 23. FIG. 24B shows the state of FIG.
It is a figure which shows the management table at the time of moving the allocation of the user U1 from group 1 to group 2.

FIG. 25 is a diagram showing a timing of access to the buffer 224 when a user U4 is newly allocated.

FIG. 26 is a diagram showing access timing of the buffer 224 when the allocation of the user U1 is moved from group 1 to group 2.

FIG. 27 is a flowchart showing a procedure for assigning a group to a new user.

FIG. 28 (a) is a diagram showing a buffer memory area in the conventional double buffer system. FIG.
FIG. 6B is a diagram showing the timing of data storage and read in the same system.

FIG. 29 is a diagram showing a temporal change in a data transfer rate in the data distribution system. FIG. 29A is a diagram in a normal state. FIG. 29B is a diagram when data underflow or overflow occurs.

FIG. 30 is a diagram showing a timing of a response from the buffer memory when a request for different video information is generated in the conventional double buffer system.

[Explanation of symbols]

 101 disk device 102 data buffer device 103 control processor 104 distribution switch 110 bus interface unit 111-113 disk unit 210 data transfer device 211 input / output control circuit 212 data input / output circuit 213 parameter register 214R read address generation circuit 214W write address generation circuit 215 Input port 216 Output port 217 Data bus 220 Memory 221 to 224 Buffer memory

Claims (9)

[Claims] 1. A data buffer device interposed between a data storage device and a terminal that uses the data stored therein, comprising: buffer means for temporarily storing the data; Input means for reading out data in block units from the data storage device based on a request and for writing the data in the buffer means in a cyclic manner; An output unit that repeats a cycle of outputting to the terminal at a rate of a data amount of one block during a cycle of a fixed cycle, the size of the block is L, and a time required for the input unit to perform block input is Ti, the cycle is To, the amount of data that has not been read after being written in the buffer means is d, and a positive integer is When m, the storage capacity D of the buffer means is (m + Ti / To) L
Is a value greater than or equal to and less than (m + 1) L, the input means satisfies Ti <To, and the free capacity (D-d) of the buffer means is L or more (D-TiL /
A data buffer device characterized in that block input is performed during a period equal to or less than To. 2. The data buffer device according to claim 1, wherein the input unit performs block input so that an average value of d becomes D / 2. 3. The data buffer device according to claim 1, wherein said m is 1. 4. The D is (1 + Ti / To) L, and the input means has a free capacity (D−) of the buffer means.
4. The data buffer device according to claim 3, wherein block input is started when d) exceeds L. 5. A data server system for supplying data to n (positive integer) terminals, wherein the data storage device stores the data, and between the data storage device and the n terminals. A data server system comprising n intervening data buffer devices according to claim 4. 6. The data server system is further configured such that a block input and output cycle start timing in each of the n data buffer devices is To /
The data server system according to claim 5, further comprising shift control means for controlling each input means and each output means so as to shift by n. 7. The group registration means, wherein the data server system further allocates each of the n data buffer devices to one of g (positive integer) groups according to a predetermined procedure and registers the contents thereof. Based on the content registered in the group registration means, each time obtained by dividing the period To into g is assigned to each group, and block inputs in all the data buffer devices belonging to the same group are assigned to the group. 6. The data server system according to claim 5, further comprising group control means for controlling each input means so as to be performed within a predetermined time. 8. The data storage device stores the data in units of files consisting of a group of blocks, and the group registration means receives from the terminal a request to use data belonging to a new file. , A group to which the data buffer device corresponding to the terminal should belong is newly allocated, and when it is detected that the request disappears from the terminal, the group allocation for the data buffer device corresponding to the terminal is performed. The data server system according to claim 7, wherein the data server system is released. 9. The group control means, when the group registration means newly assigns a group to which the data buffer device should belong, based on the timing of receiving the request, the data buffer device. 9. The data server system according to claim 8, wherein the input means is controlled so that the data newly read by the input means is overwritten on a part of the data already written in the buffer means.