RU2101876C1 - Device for reception and processing of digital data transmitted in television signal structure - Google Patents

Abstract

FIELD: radio electronics, in particular, systems for transmission and reception of digital data signals built in the video signal structure. SUBSTANCE: the device continuously receives, processes and accumulates in the computer interfaces with the device in real time conditions the whole information continuously transmitted to the device input from the TV signal receiver and built both in separate lines and in all lines of the television frame. The device uses a decoding unit, buffer storage unit, additionally used are a data processing unit fulfilling the function of data conversion from a series format to a parallel one monitoring and correction of received data, whose group of inputs is connected to the group of outputs of the decoding unit; buffer storage controller unit, whose first group of inputs is connected to the group of outputs of the data processing unit, input/output group - to the input/output group of the buffer storage unit, and the first group of outputs - to the group of inputs of the buffer storage unit; computer bus controller unit, whose group of inputs is connected to the second group of outputs of the buffer storage controller unit, and the first group of inputs/outputs is connected to the group of inputs/outputs of the device; and control unit synchronizing the operation of the whole device and control of the read-write operation; and formation and storage of the device state code, programmed code of sync pulse sequence and data processing code; whose outputs are connected to the respective inputs of the decoding unit, data processing unit, buffer storage controller unit and computer bus controller unit; its inputs are connected to the respective outputs of the decoding unit and buffer storage controller unit, and inputs/output group - to the second input/output group of the computer bus controller unit; the group of inputs of the decoding unit is connected to the group of the device inputs. EFFECT: reduced time of access to separate pages of teletext, improved setting to any standard of data transmission. 3 cl, 3 wdg

Description

 The invention relates to the field of electronics, in particular, to systems for the transmission and reception of digital data signals embedded in the structure of the video signal.

 A device is known for extracting measuring signals embedded in a video signal in the interval of a quenching pulse of fields transmitted on one or several lines of a television frame, called test ones (MP Krivosheev, Fundamentals of Television Measurements. 1989, Radio and Communications (Moscow), p. 46 -48).

 This extraction device comprises a test signal extraction unit and a measuring device associated with it, which can be used as an oscilloscope.

 The disadvantage of this device is the inability to use it to receive digital signals of additional information transmitted in the structure of the video signal.

 A device for processing teletext signals containing a buffer memory unit, a decoding unit, as well as a microprocessor that provides reception and processing of data recorded in the buffer memory for a period of time not exceeding the transmission time of 1 page, main memory, a control module, which at the command of the user generates a control signal supplied to the microprocessor by displaying the corresponding teletext page on the screen, and a video processor that generates control signals for generating a television image text. This device is designed to reproduce on the screen of a television receiver the transmitted digital information in the structure of the video signal in the amount of 1 page (Application of Germany N 4028942, CL N O4 N 5/445).

 The disadvantage of this device is the inability to continuously memorize and accumulate all the information transmitted on a television channel in real time, due to the design flaws of the device, its low speed and limited capabilities of its memory.

 In addition, this device provides reception of information transmitted only in specific lines of the television frame defined by the teletext transmission standard, and is not capable of receiving information transmitted in arbitrary, including in all lines of the frame.

 The disadvantages of the device should also include a significant access time to the teletext page ordered by the user, since the access time includes the latency for transmitting this page in a television channel.

 The basis of the invention is the creation of a device for receiving and processing digital data transmitted in the structure of a television signal, with such a design that will allow in real time to continuously receive, process and accumulate in a computer interfaced with the device all the information continuously fed to the input of the device from the receiving device of the television signal after its corresponding conversion from analog to digital and built-in both in separate lines and in all lines television frame; significantly reduce the access time to individual teletext pages; tune to any standard of information transfer.

 The problem is solved in that in a device containing a decoding unit, a buffer memory unit, a data processing unit is additionally introduced that performs the function of converting data from a serial format to a parallel one, which in a particular case also performs the function of monitoring and correcting received data based on redundant methods encoding, the group of inputs of which is connected to the group of outputs of the decoding unit; a buffer memory controller unit, the first group of inputs of which is connected to the group of outputs of the data processing unit, the group of inputs / outputs with the group of inputs / outputs of the buffer memory unit, and the first group of outputs with the group of inputs of the buffer memory unit; a computer bus controller unit, the input group of which is connected to the second group of outputs of the buffer memory controller unit, and the first input / output group is connected to the device input / output group; a control unit that performs the functions of synchronizing the operation of the entire device and controlling the read modes of the record, as well as generating and storing the device status code, programmable synchronization code and, in a particular case, the execution of the data processing code, connected by its respective output groups to the corresponding input groups of the decoding unit, processing unit data, a buffer memory controller block and a computer bus controller block, with their respective input groups with the corresponding groups and outputs of a decoding unit and a buffer memory controller unit, and a group of inputs / outputs with a second group of inputs / outputs of a computer bus controller unit; wherein the group of inputs of the decoding unit is connected to the group of inputs of the device.

 This device provides reception and primary processing of information in real time and its transfer to a computer for further use (accumulation, secondary processing, display on a computer display, etc.) using computer tools. Moreover, the access time to any page of the received information does not exceed the access time to any data stored in the computer memory.

 Figure 1 shows a functional diagram of the device; figure 2 is a structural diagram of a data processing unit in the particular case of execution; figure 3 is a structural diagram of a control unit.

 The device comprises a decoding unit 1, a data processing unit 2, a buffer memory controller unit 3, a buffer memory unit 4, a computer bus controller unit 5, a control unit 6. The input group 7 of the decoding unit 1 is connected to the input group 8 of the device, the output group 9 decoding unit 1 to the group of inputs 10 of the data processing unit 2, and the group of outputs 11 of the decoding unit 1 to the group of inputs 12 of the control unit 6; the group of outputs 13 of the data processing unit 2 is connected to the group of inputs 14 of the block of the buffer memory controller 3, which is connected to the group of inputs / outputs 15 by the group of inputs / outputs 16 of the buffer memory 4, and the group of outputs 17 is connected to the group of address inputs 18 of the buffer memory 4 , a group of outputs 19 with a group of inputs 20 of a computer bus controller unit 5, a group of inputs / outputs 21 of which are connected to a group of inputs / outputs 22 of a control unit 6, and a group of inputs / outputs 23 with a group of inputs / outputs 24 of the device; output group 25 of control unit 6 is connected to input group 26 of decoding unit 1, output group 27 of control unit 6 is connected to input group 28 of data processing unit 2, output group 29 of control unit 6 is connected to input group 30 of buffer memory controller 3 unit and output group 31 of the control unit 6 is connected to the group of inputs 32 of the controller unit of the computer bus 5, and the group of inputs 33 of the control unit 6 is connected to the group of outputs 34 of the controller unit of the buffer memory 3.

 In the particular case of execution, the data processing unit 2 contains a format conversion unit 35, a data control and recovery unit based on redundant coding 36, and an output multiplexer 37. The input group 38 of the format conversion unit 35 is connected to the input group 10 of the data processing unit 2, input 39 the format conversion unit 35 is connected to the corresponding input from the group of inputs 28 of the data processing unit 2, and the output group 40 of the format conversion unit 35 is connected to the group of inputs 41 of the data control and recovery unit 36 and with the group of inputs 42 of the output multiplexer 37, to the group of inputs 43 of which the group of outputs 44 of the data control and recovery unit 36 is connected, the group of inputs 45 is connected to the corresponding inputs of the group of outputs 28 of the data processing unit 2; the input 46 of the output multiplexer 37 is connected to the corresponding input from the group of inputs 28 of the data processing unit 2, and the group of outputs 47 of the output multiplexer 37 is connected to the group of outputs 13 of the data processing unit 2.

 The control unit 6 contains a register of the sync sequence 48, a register of the processing code 49, a control unit for read / write modes 50 and a status register 51. In this case, the group of inputs 52 of the register of the code of the sync sequence 48, the group of inputs 53 of the register of the processing code 49, the group of outputs 54 of the status register 51 , the group of inputs 55 of the control unit for read / write modes 50 are connected to the corresponding inputs / outputs of the group of inputs / outputs 22 of the control unit 6. The group of outputs 56 of the register code of the synchronization sequence 48 is connected to the group of outputs 25 bl control window 6. Output group 57 of the processing code register 49 is connected to the output group 27 of the control unit 6. Input group 58 of the status register 51 is connected to the output group 59 of the read / write mode control unit 50, output 60 of which is connected to the corresponding output of the group of outputs 27 of the unit control 6. The output group 61 of the read / write mode control unit 50 is connected to the output group 31 of the control unit 6. The output group 62 of the read / write mode control unit 50 is connected to the output group 29 of the control unit 6. Input group 63 the read / write mode control 50 is connected to the input group 12 of the control unit 6. The input group 64 of the read / write mode control unit 50 is connected to the input group 33 of the control unit 6.

 The device operates as follows. Before receiving digital information, the device is configured to the standard format of the received information. To this end, a control code 6 is written to the control unit 6 through a group of inputs / outputs 22 from a computer bus controller unit 5 from an input / output group 21, which is a sign of the beginning of transmitted digital information, and in a particular case, a code that defines a method for controlling and restoring data based on redundant coding methods. After completing the setup, the device is put into digital information reception mode.

 The device provides the implementation of two main modes of the mode of receiving digital information, its processing and writing to the block of buffer memory 4 and the mode of reading information from the device to the computer. In this case, the information reception mode is given priority over the reading mode, which occurs against the background of the main reception mode. Priority control is provided by control unit 6.

 In the mode of receiving digital information, the decoding unit 1 begins to analyze the data received at its input 7 from the input of the device 8 and compares it with the sync sequence code coming from the control unit 6 to the group of inputs 26. As the data being analyzed coincide with the sync sequence code, which is a sign the beginning of the transmitted information, the decoding unit 1 on its group of outputs 11 generates a data processing start signal, which is fed to the group of inputs 12 of the control unit 6, which starts to control p zhimom write incoming data into the buffer memory 4. In the absence of the analyzed information code predetermined synchronization sequence in the group decoding unit 11 outputs the signal 1 is generated out of sync, which is supplied to a group of inputs 12 of the control unit 6.

 At the beginning of the data recording process, the control unit 6, in accordance with the data processing start signal received at the input group 12, generates a data processing unit 2 start signal at the corresponding output of the output group 27. The data processing unit 2 converts data from a serial format to a parallel one and transfers them to the corresponding outputs of the group of outputs 13, from where they arrive at the corresponding inputs of the group of inputs 14 of the buffer memory controller unit. After processing, block 2 generates a data ready signal to the block of the buffer memory controller 3.

 In the particular case of execution of the data processing unit 2, this unit operates as follows. The start signal of the data processing unit 2 from the corresponding input of the group of inputs 28 of the data processing unit 2 is fed to the input 39 of the format conversion unit 35 located in the data processing unit 2, thereby enabling the conversion from serial to parallel code.

 The format conversion unit 35, located in the data processing unit 2, converts the digital information received from input 10 of the data processing unit 2 from serial to parallel. Data is fed to input 38 of a 35 format conversion unit in serial form and converted to parallel format. Next, the data goes to the group of inputs 41 of the data control and recovery unit 36 and the group of inputs 42 of the output multiplexer 37. If the data processing code arriving at the group of inputs 28 of the data processing unit 2 indicates that the data must be checked and adjusted , the data control and recovery unit 36 performs data control and recovery (correction) based on redundant coding methods in accordance with the processing code received at the group of its inputs 45 from the group of outputs 27 of the control unit 6. After that, the data arrives at the group of inputs 43 of the output multiplexer 37. In the event that the data processing code coming from the group of inputs 28 of the data processing unit 2 indicates that it is not necessary to monitor and restore the data, the data can be transferred to group of outputs 13 of the processing unit 2 without performing the functions of control and recovery. From the corresponding output of the group of outputs 27 of the control unit 6 to the address input 46 of the output multiplexer 37 is supplied a code that allows or prohibits monitoring and data recovery. In accordance with it, in the first group of outputs 47 of the output multiplexer 37 and, accordingly, in the group of outputs 13 of the data processing unit 2, in the first case, the corrected data is sent in parallel format from the group of outputs 44 of the control and data recovery unit 36, and in the second case, the uncorrected data in parallel format from the group of outputs 40 block conversion format 35.

 The buffer memory controller unit 3 ensures the interaction of the device with the buffer memory unit 4. Using the data ready signal from the data processing unit 2, it generates a timing diagram for writing data to the buffer memory unit 4 and generates data at the corresponding outputs of the group of inputs / outputs 15, as well as the addresses to output group 17.

 The data in the buffer memory block 4 is conditionally divided into packets. As the next packet accumulates, the buffer memory controller unit 3 generates a signal of a data packet readiness indicator on the group of outputs 34, which is received in the control unit 6. The control unit 6 generates a data packet ready status signal at the respective outputs from the input / output group 22, based on which the computer bus controller unit 5 generates a computer interrupt signal at the respective outputs from the group of inputs / outputs 23 and, accordingly, at the corresponding outputs from the group of inputs / outputs 24 of the device. If the reaction time of the computer to the interruption exceeds the time of filling the entire volume of the buffer memory, the control unit 6 generates a data loss status signal at the corresponding outputs of the group of inputs / outputs 22, which from the corresponding output of the group of inputs / outputs 23 of the controller unit of the computer bus 5 goes to the computer. In this case, for the correct functioning of the device, it is necessary to transfer it to the setup mode for reinitialization.

 The mode of reading data from the buffer memory unit 4 is initialized by the computer after receiving an interrupt signal from the computer bus controller unit 5. The computer sets the data read request signal to the corresponding inputs from the group of inputs / outputs 23 of the computer bus controller unit 5. This request signal is sent to the corresponding inputs of the group of inputs / outputs 22 of the control unit 6, which, after the completion of the next cycle of the data recording mode in the buffer memory unit 4, generates a request to read data on its output group 29 and a group of 30 input buffer memory 3, the controller unit.

 The buffer memory controller unit 3, by a data read request signal, generates a time chart for reading data from the buffer memory unit 4 and sets the read address on the group of outputs 17. Data from the corresponding outputs of the input / output group 16 comes from the buffer memory unit 4 to the buffer memory controller unit 3 and then enter through the group of outputs 19 of the block of the buffer memory controller 3 to the group of inputs 20 of the block of the computer bus controller 5, which provides the output of data to the computer bus through the corresponding outputs of the group of inputs / outputs 24 devices.

 The control unit 6 operates as follows. In the process of setting the device to the standard format of the received information in the register of the sync sequence 48 and the register of the processing code 49, the corresponding codes are written that come from the corresponding outputs of the group of inputs / outputs 22 of the control unit 6. Then, from the group of outputs 56 of the sync sequence 48, the sync sequence is transmitted to the group of outputs 25 of the control unit 6, and from the group of outputs 57 of the register of the processing code 49, the processing code is fed to the group of outputs 27 of the control unit 6, thereby Configuring the device for a way to control and restore data.

 In the mode of recording information in the buffer memory unit 4, the read / write mode control unit 50 receives signals to the group of inputs 63, indicating the coincidence of the received information with the given synchronization sequence code, coming from the group of outputs 11 of the decoding unit 1 to the group of inputs 12 of the control unit, and depending on their state, either forms a sequence of control signals at output 60 and, respectively, at one of the outputs of the group of outputs 27 of the control unit 6 and at the group of outputs 62 and, respectively, at the group of outputs dow 29 of the control unit 6, thereby ensuring the execution of the mode of recording information in the buffer memory 4, or when the received information does not match the specified synchronization code, the read / write mode control unit 50 generates a mismatch status code on the group of outputs 59, which is recorded in the status register 51 and can be transferred to the computer bus controller 5.

 As data is written to the buffer memory block 4, the read / write modes control 50 receives data packet ready signals on the group of inputs 64 and generates the corresponding control signals on the group of outputs 61 to start the computer bus controller unit 5, and also generates a status code on the group of outputs 59 the readiness of the data packet recorded in the status register 51. As the buffer memory of the buffer memory block 4 is filled, the read / write mode control unit 50 controls the degree of its filling even in the absence of request signals and data reading, initiated by the computer, at some point 59 generates code data loss state on the output group, in a recordable status register 51.

 In the mode of reading data from the buffer memory unit 4 to the computer, the read / write mode control unit 50 receives request signals to read data from the input / output group 22 of the control unit 6 on the input group 55 and waits for the end of the data write cycle to the buffer memory unit 4, after which generates control signals on the group of outputs 62 that arrive at the block of the buffer memory controller 3, and on its group of outputs 61 signals for controlling the block of the computer bus controller 5, thereby ensuring the passage of information from the block of buffer memory 4 through the block a buffer memory controller 3, and bus controller computer unit 5 to the respective outputs of the group of outputs / inputs 24 of the device.

 The invention can be used in a television reception network for the distribution of data of an arbitrary structure, including teletext. Most effectively, the device can be used to receive circular information in a broadcast network.

Claims (2)

 1. A device for receiving and processing digital data transmitted in the structure of a television signal, containing a decoding unit, a buffer memory unit, characterized in that it contains a data processing unit that performs the function of converting data from serial to parallel format, the input group of which is connected to the group of outputs a decoding unit, a buffer memory controller unit, the first group of inputs of which is connected to a group of outputs of a data processing unit, a group of inputs and outputs with a group of inputs and outputs of block b farm memory, and the first group of outputs with a group of inputs of the buffer memory block, a computer bus controller block, the group of inputs of which is connected to the second group of outputs of the buffer memory controller block, and the first group of inputs and outputs is connected to the group of inputs and outputs of the device, and the control unit, performing the functions of storing the programmable code of the synchronization sequence, synchronizing the operation of the entire device and controlling the read modes of the record, as well as the formation and storage of the status code of the device, connected by its own the output groups with the corresponding input groups of the decoding unit, the data processing unit, the buffer memory controller block and the computer bus controller block, their respective input groups with the corresponding output groups of the decoding block and the buffer memory controller block, and the input-output group with the second group of inputs the outputs of the controller unit of the computer bus, while the group of inputs of the decoding unit is connected to the group of inputs of the device.  2 The device according to claim 1, characterized in that the data processing unit is configured to perform the function of monitoring and correcting received data based on the methods of redundant coding, and the control unit is configured to perform the storage function of the data processing code.  3. The device according to claim 2, characterized in that the data processing unit contains a format conversion unit that performs the function of converting data from a serial format to a parallel one, a data control and correction unit that performs the function of verifying the correctness of the data in accordance with the methods of redundant coding, generating adjusted data and signal indicating the presence of errors, the output multiplexer, and the group of inputs of the format conversion unit is connected to the group of inputs of the data processing unit connected to the decoy of the outputs of the decoding unit, the group of outputs of the format conversion unit is connected to the first group of inputs of the control and data recovery unit and to the first group of inputs of the output multiplexer, the group of outputs of the control and data recovery unit is connected to the second group of inputs of the output multiplexer, and the group of outputs of the output multiplexer is connected to the group of outputs of the data processing unit, the input of the format conversion unit, the second group of inputs of the control and data recovery unit, as well as the address input a multiplexer connected to respective inputs of the input group of data processing unit which is connected to a respective group control unit outputs.

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