RU2054792C1 - Synchronous filter - Google Patents

Abstract

FIELD: radio engineering. SUBSTANCE: synchronous filter has resistor, odd number of series-connected circuits, each having series-connected capacitor and switch, two selector switches, N short-pulse shaping circuits, OR gate, scale-of-two frequency divider, and control unit. EFFECT: eliminated resonance-frequency noise caused by control unit; reduced size and mass of filter. 2 cl

Description

 The invention relates to radio engineering and can be used in devices for the frequency selection of signals, in particular in decoders of multi-element commands with a discretely variable frequency of packages.

 Synchronous bandpass filters are known, the required frequency properties of which are obtained on the basis of the principle of switching capacitors in a given sequence (see St. St. USSR N 1322419, class H 03 H 7/01, F. Allen, S. Sanchez-Sinencio. Electronic circuits with switched capacitors. M. Radio and communications, 1989). The disadvantages of these filters are the impossibility of obtaining the desired amplitude-frequency characteristics and the rather high complexity of the circuit containing a large number of elements.

 The closest in technical essence the solution chosen as a prototype is a synchronous filter (see. St. St. USSR N 1345316, class H 03 H 19/00), containing an input resistor, a first switch, a second switch, N capacitors, N keys and control unit.

 The disadvantage of this filter is that the switch-on device located in the control unit operates at the resonant frequency of the synchronous filter, creating a strong, difficult to eliminate and uncontrolled in amplitude interference at the frequency of the received signal due to pickups leaking to the capacitors through the keys. This is especially true when performing a synchronous filter in an integrated design.

 The aim of the invention is to reduce spurious interference caused by the control unit of the synchronous filter at the resonant tuning frequency.

 This is achieved by the fact that in a synchronous filter containing an input resistor, N parallel-connected circuits, each of which consists of a series-connected capacitor and key, two switches and a control unit, N circuits for generating short pulses along the leading edge of the key control signals are introduced, a logic circuit OR and the frequency divider by two. To ensure the operability of the proposed synchronous filter, the number of capacitors should be odd.

 Using the proposed synchronous filter will eliminate interference at the resonant frequency induced by the control device, reduce its overall dimensions and weight.

 In FIG. 1 shows a functional diagram of a synchronous filter; figure 2 is a timing chart of his work.

 The synchronous filter contains an input resistor 1, connected in series with the input circuit, two switches 2 and 3, an odd number N of capacitors 4, connected in series with N keys 5, N circuits 6 for generating short pulses along the leading edge of the key control signals, OR logic 7, a frequency divider 8 into two and a control unit 9. The input of each of the N circuits for generating short pulses is connected to the same output of the control unit 9, and the output is connected to the corresponding input of the logic circuit OR 7, the output of which is connected to odom divider 8 frequency into two. The output of the frequency divider 8 is connected to the control inputs of switches 2 and 3.

 The synchronous filter works as follows.

 An additive mixture of signal and noise enters through the input resistor 1 and switch 2 to the first capacitor plates 4.1.4.N. The second plates are connected to the common bus by switch 3.

 Each 6.1.6.N circuit generates a short pulse at the output, the beginning of which exactly coincides with the leading edge of the control signal of the corresponding 5.1.5.N key.

 These pulses through the logic circuit OR 7 are fed to the input of the frequency divider. With the beginning of each input pulse, the frequency divider 8 generates at the output a sequence of pulses with a frequency half the frequency of the input pulses. This ensures the duration of pulses and pauses, exactly equal to the time of connecting one of the capacitors 4.1.4.N to the resistor 1. The key blocks 2 and 3 will switch with a frequency N times greater than the resonant frequency of the filter, synchronously with each key 5.1 .5.N. Through each half of the input signal period, the capacitor plates will be connected opposite to the previous position, which helps to preserve all the positive properties of the synchronous filter and to eliminate interference induced by the control unit at the resonant frequency of its tuning.

Claims (1)

 A SYNCHRONOUS FILTER containing an input resistor, the first output of which is a synchronous filter input, N parallel-connected circuits, each of which consists of a series capacitor and a key, the first and second switches and a control unit, while the switching contact of the first switch is connected to the second output of the input the resistor, which is the output of the synchronous filter, the opening and closing contacts are connected respectively to the closing and opening contacts of the second switch, the switching contact of which is connected to the common bus, the making contact of the first switch connected to the terminals of N capacitors, and the outputs of N keys connected to the closing contact of the second switch, the control inputs of N keys connected to N outputs of the control unit, characterized in that the OR element is connected in series and a frequency divider into two, as well as N blocks for generating short pulses along the leading edge of the key control signals, the inputs of which are connected to the corresponding outputs of the control unit And the outputs - to the inputs OR element, the frequency divider output is connected to two control inputs of the first and second switches, wherein the N - odd number.

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