RU2020758C1 - Device for computing position characteristic of position-independent code - Google Patents

Abstract

FIELD: computer technology. SUBSTANCE: three bars made of (n+k-1) multifunctional registers are brought into the device. EFFECT: reduced expense of equipment. 1 dwg

Description

 The invention relates to computer technology and can be used in information processing systems presented in positional codes.

 The aim of the invention is to reduce hardware costs.

 The basis of the device is the following algorithm.

In the non-positional code (code of the system of residual classes), the number X is represented by the division residues (the smallest positive residues) of the number X based on ρ ₁ , ρ ₂ , ... ρ _n , ρ _{n + 1} , ..., ρ _{n + k} , which must satisfy the condition of mutual pairwise simplicity, i.e.

, j≠i). Для обеспечения возможности определить, в какой части диапазона

, где P_n=

ρ_i, находится число Х, вычисляют позиционную характеристику вида S

x

=

, где P_p=

ρ_i и [*]^- - наименьшее целое.(β _i ρ _j ) = 1 (j, i =

, j ≠ i). To be able to determine in which part of the range

where P _n =

ρ _i , find the number X, calculate the positional characteristic of the form S

x

=

where P _p =

ρ _i and [*] ^- is the smallest integer.

α_iβ_i-RP_n, (1) где β_i - базисные числа, для каждого из которых справедливо
β_i=

= 1 (mod ρ_i),
тогда S(x) вычисляют последовательно как S₁(x)=

затем S₂(A)=

и т.д до
S_k(A)=S(A)=

. (2)
Тогда подставляют выражение (1) в уравнение (2):
S₁(A) =

.It is known that
x =

α _i β _i -RP _n , (1) where β _i are basic numbers, each of which holds
β _i =

= 1 (mod ρ _i ),
then S (x) is calculated sequentially as S ₁ (x) =

then S ₂ (A) =

etc up to
S _k (A) = S (A) =

. (2)
Then substitute the expression (1) in equation (2):
S ₁ (A) =

.

, (i=

) и R₁=

- целые числа и

R

=0 (j=

, i≠j);

R

=

,

R

=

-

, то окончательно получают
S

x

=

(α_j-α_i)

(i=

, i=

).Since R _i =

, (i =

) and R ₁ =

are integers and

R

= 0 (j =

, i ≠ j);

R

=

,

R

=

-

then finally get
S

x

=

(α _j -α _i )

(i =

, i =

)

Then, at the n-1 step, we obtain the set of residues S _{n + 1} , S _{n + 2} , ..., S _{n + k} , which determine the positional characteristic S (x) in the non-positional code. Then the expression (3) allows you to calculate the positional characteristic.

 The drawing shows a functional diagram of a device for calculating the positional characteristic of a non-positional code.

 The device contains three groups of registers 1.2-1.n + k, 2.2-2.n + k, 3.1-3. n + k-1, subtractors 4.2-4. n + k, blocks 5.2-5.n + k of constant multiplication, blocks 6.2-6. n + k memory, inputs 7.1-7.n + k device residues, control inputs of the fourth 8.1-8. n + k-1, second 9.1-9.n + k, third 10.2-10.n + k device groups, non-position code to position converter 11, output 12 of the device position characteristic, control inputs 13.2-13.n + k first group of device.

 The device operates as follows.

 In the initial state, the first information inputs of the registers 1.2-1.n + k of the first group are fed with balances on the corresponding basis, the remaining registers are reset.

(α₂-α₁)

, который записывается в регистр 2.2.In the first clock cycle, input 7.1 receives the first remainder in register 3.1 and calculates
S $\genfrac{}{}{0ex}{}{\text{1}}{\text{2}}$ =

(α ₂ -α ₁ )

, which is written in register 2.2.

In the second cycle, a pulse is received at the control inputs 8.1 and 9.2, α ₁ is shifted to register 3.2, and S ₂ ¹ to register 3.1 and the calculation of S ₃ ¹ starts, which is written to register 2.3.

(S $\genfrac{}{}{0ex}{}{\text{1}}{\text{3}}$ -S $\genfrac{}{}{0ex}{}{\text{1}}{\text{2}}$ )

и S $\genfrac{}{}{0ex}{}{\text{1}}{\text{4}}$ =(α₄-α₁)

, которые записываются соответственно в регистры 2.3, 2.4.In the third step, the contents of register 3.1 - S ₂ ¹ are shifted to register 3.2, α ₁ from register 3.2 to register 3.3, and register 2.3 - S ₃ ¹ to register 1.3, and S $\genfrac{}{}{0ex}{}{\text{2}}{\text{3}}$ =

(S $\genfrac{}{}{0ex}{}{\text{1}}{\text{3}}$ -S $\genfrac{}{}{0ex}{}{\text{1}}{\text{2}}$ )

and S $\genfrac{}{}{0ex}{}{\text{1}}{\text{4}}$ = (α ₄ -α ₁ )

which are written respectively in registers 2.3, 2.4.

In the fourth cycle, the contents of register 2.3 are shifted to register 3.2 by the pulse received at control input 9.2, the contents of register 3.2 - S ₂ ¹ are shifted to register 3.3 by the pulse fed to input 8.2, and the contents of register 3.3 - α ₁ are transferred to the register 3.4.

 Further, everything is carried out according to the above algorithm after n + 1 clock cycles; at the output 12 of converter 11, a number appears corresponding to the positional characteristic S (x).

Claims (1)

 DEVICE FOR CALCULATING A POSITIONAL CHARACTERISTIC OF A NON-POSITION CODE, containing n + K - 1 subtractors, n + K - 1 blocks of multiplication by a constant (where n is the number of working bases, K is the number of control bases), the first memory block and the converter of the non-positional code into positional, the output of which is connected to the output of the positional characteristic of the device, the output of the i-th subtractor (i = 1, ..., n + K - 1) is connected to the first input of the i-th unit of multiplication by a constant, characterized in that, in order to reduce hardware costs, it introduced three groups of n + K - 1 p histors and n + K - 2 memory blocks, and the first information input of the i-th register of the first group is connected to the input of the (i + 1) -th remainder of the device, the input of the first remainder of which is connected to the information input of the first register of the second group, the output of the i-th the register of the first group is connected to the input of the i-th subtractor, the input of which is subtracted is connected to the first output of the i-th register of the second group, the second output of the j-th register of the second group (j = 1, ..., n + K - 2) is connected with the information input of the (j + 1) -th register of the second group, the i-th control input of the first group The device is connected to the input of the i-th memory block, the output of which is connected to the second input of the i-th block of multiplication by a constant, the output of which is connected to the information input of the i-th register of the third group, the first output of which is connected via the editing OR to the information input i- the second register of the second group, and the second output with the second information input of the i-th register of the first group, the output of the l-th register of the third group (l = n + 1, ..., n + K - 1) is connected to the corresponding input of the non-position converter code in the position, i-th control inputs second th and third groups of the device are connected respectively to the first and second shift inputs of the i-th register of the third group, the shift input of the i-th register of the second group is connected to the i-th control input of the fourth group of the device, the clock input of which is connected to the recording inputs of each of the registers all groups.

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