RU2005138547A - Обработкакоманд генерации дайджестов сообщений - Google Patents
Обработкакоманд генерации дайджестов сообщений Download PDFInfo
- Publication number
- RU2005138547A RU2005138547A RU2005138547/09A RU2005138547A RU2005138547A RU 2005138547 A RU2005138547 A RU 2005138547A RU 2005138547/09 A RU2005138547/09 A RU 2005138547/09A RU 2005138547 A RU2005138547 A RU 2005138547A RU 2005138547 A RU2005138547 A RU 2005138547A
- Authority
- RU
- Russia
- Prior art keywords
- memory
- data
- data structure
- digests
- digest
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/32—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials
- H04L9/3236—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials using cryptographic hash functions
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
- H04L9/0643—Hash functions, e.g. MD5, SHA, HMAC or f9 MAC
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/60—Protecting data
- G06F21/64—Protecting data integrity, e.g. using checksums, certificates or signatures
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/72—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/50—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using hash chains, e.g. blockchains or hash trees
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/12—Details relating to cryptographic hardware or logic circuitry
- H04L2209/125—Parallelization or pipelining, e.g. for accelerating processing of cryptographic operations
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/20—Manipulating the length of blocks of bits, e.g. padding or block truncation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Bioethics (AREA)
- Health & Medical Sciences (AREA)
- General Health & Medical Sciences (AREA)
- Executing Machine-Instructions (AREA)
- Devices For Executing Special Programs (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Debugging And Monitoring (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Complex Calculations (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
- Stereo-Broadcasting Methods (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Electrical Discharge Machining, Electrochemical Machining, And Combined Machining (AREA)
Claims (18)
1. Способ генерации дайджестов содержимого памяти вычислительной среды, заключающийся в том, что посредством команды задают единицу памяти, для которой требуется сгенерировать дайджест, и генерируют дайджест данных, хранящихся в этой единице памяти.
2. Способ по п.1, в котором задание единицы памяти включает в себя предоставление информации о местоположении структуры данных, соотнесенной с указанной единицей памяти.
3. Способ по п.2, в котором информация о местоположении структуры данных включает в себя информацию о происхождении структуры данных.
4. Способ по п.3, в котором информация о местоположении структуры данных также включает в себя индекс элемента структуры данных, соответствующего указанной единице памяти.
5. Способ по п.1, в котором генерация дайджеста данных включает в себя хэширование данных, хранящихся в единице памяти, при помощи алгоритма безопасного хэширования с получением сжатого представления данных, хранящихся в единице памяти.
6. Способ по п.1, в котором единица памяти включает в себя сегмент памяти или область памяти, а структура данных включает структуру данных, хранящихся в сегменте памяти, или структуру данных, хранящихся в области памяти.
7. Способ по п.1, в котором генерацию дайджеста данных выполняют посредством указанной команды.
8. Способ по п.1, в котором структура данных включает в себя множество элементов, а при генерации дайджеста данных используют индекс для получения элемента структуры данных, соотнесенного с единицей памяти, для которой требуется сгенерировать дайджест.
9. Способ по п.1, в котором указанная единица памяти включает в себя сегмент памяти с множеством страниц памяти.
10. Способ по п.1, в котором единица памяти включает в себя область памяти, в которой содержится множество сегментов памяти, имеющих множество страниц памяти.
11. Способ по п.1, в котором задают множество единиц памяти, генерируют дайджесты данных, хранящихся в этом множестве единиц памяти, и полученные дайджесты сохраняют во второй единице памяти меньшего размера.
12. Способ по п.11, в котором генерирование дайджестов данных включает в себя операцию сцепления с обеспечением генерирования дайджестов для указанного множества единиц памяти.
13. Способ по п.12, в котором данные, подлежащие обработке для генерации дайджестов, представляют собой сообщения, единицы памяти объединены в блоки, причем при генерации дайджестов данных обрабатывают полные блоки и после обработки всех полных блоков дополняют остальную часть заданной памяти.
14. Способ по п.1, в котором память включает в себя виртуальную память.
15. Способ по п.1, в котором указанная команда реализована аппаратными и/или программными средствами и/или во встроенном программном обеспечении.
16. Способ по п.1, в котором указанную команду выполняет процессор, эмулирующий архитектуру команды, причем архитектура команды отличается от архитектуры процессора.
17. Система для генерации дайджестов содержимого памяти вычислительной среды, содержащая средства для осуществления операций способа по любому из пп.1-16.
18. Носитель данных для использования в компьютере, снабженный машиночитаемым программным кодом для осуществления способа по любому из пп.1-16.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/436,230 | 2003-05-12 | ||
US10/436,230 US7159122B2 (en) | 2003-05-12 | 2003-05-12 | Message digest instructions |
Publications (2)
Publication Number | Publication Date |
---|---|
RU2005138547A true RU2005138547A (ru) | 2007-06-20 |
RU2344467C2 RU2344467C2 (ru) | 2009-01-20 |
Family
ID=33417120
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
RU2005138547/09A RU2344467C2 (ru) | 2003-05-12 | 2004-05-04 | Обработка команд генерации дайджестов сообщений |
Country Status (11)
Country | Link |
---|---|
US (2) | US7159122B2 (ru) |
EP (1) | EP1623316B1 (ru) |
JP (2) | JP4817189B2 (ru) |
CN (1) | CN1799024B (ru) |
AT (1) | ATE350702T1 (ru) |
DE (1) | DE602004004101T2 (ru) |
ES (1) | ES2279365T3 (ru) |
GB (1) | GB2416609B (ru) |
PL (1) | PL1623316T3 (ru) |
RU (1) | RU2344467C2 (ru) |
WO (1) | WO2004099975A2 (ru) |
Families Citing this family (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040230813A1 (en) * | 2003-05-12 | 2004-11-18 | International Business Machines Corporation | Cryptographic coprocessor on a general purpose microprocessor |
KR101123742B1 (ko) * | 2005-12-23 | 2012-03-16 | 삼성전자주식회사 | 사용자 인터페이스와 소프트웨어 간의 신뢰 경로 설정 방법및 장치 |
JP5263498B2 (ja) * | 2008-07-09 | 2013-08-14 | セイコーエプソン株式会社 | 信号処理プロセッサ及び半導体装置 |
JP5263497B2 (ja) * | 2008-07-09 | 2013-08-14 | セイコーエプソン株式会社 | 信号処理プロセッサ及び半導体装置 |
US9317286B2 (en) * | 2009-03-31 | 2016-04-19 | Oracle America, Inc. | Apparatus and method for implementing instruction support for the camellia cipher algorithm |
US8832464B2 (en) * | 2009-03-31 | 2014-09-09 | Oracle America, Inc. | Processor and method for implementing instruction support for hash algorithms |
US8654970B2 (en) * | 2009-03-31 | 2014-02-18 | Oracle America, Inc. | Apparatus and method for implementing instruction support for the data encryption standard (DES) algorithm |
US20100250965A1 (en) * | 2009-03-31 | 2010-09-30 | Olson Christopher H | Apparatus and method for implementing instruction support for the advanced encryption standard (aes) algorithm |
US20100246815A1 (en) * | 2009-03-31 | 2010-09-30 | Olson Christopher H | Apparatus and method for implementing instruction support for the kasumi cipher algorithm |
US8356185B2 (en) * | 2009-10-08 | 2013-01-15 | Oracle America, Inc. | Apparatus and method for local operand bypassing for cryptographic instructions |
US9851969B2 (en) | 2010-06-24 | 2017-12-26 | International Business Machines Corporation | Function virtualization facility for function query of a processor |
US10521231B2 (en) | 2010-06-24 | 2019-12-31 | International Business Machines Corporation | Function virtualization facility for blocking instruction function of a multi-function instruction of a virtual processor |
US8312258B2 (en) * | 2010-07-22 | 2012-11-13 | Intel Corporation | Providing platform independent memory logic |
US8737604B2 (en) | 2011-05-09 | 2014-05-27 | Advanced Micro Devices, Inc. | Processor with architecture implementing the advanced encryption standard |
US8874933B2 (en) * | 2012-09-28 | 2014-10-28 | Intel Corporation | Instruction set for SHA1 round processing on 128-bit data paths |
US9201629B2 (en) | 2013-03-14 | 2015-12-01 | International Business Machines Corporation | Instruction for performing a pseudorandom number seed operation |
US9276750B2 (en) * | 2013-07-23 | 2016-03-01 | Intel Corporation | Secure processing environment measurement and attestation |
US9787278B1 (en) | 2016-09-26 | 2017-10-10 | International Business Machines Corporation | Lossless microwave switch based on tunable filters for quantum information processing |
US10348506B2 (en) * | 2016-09-30 | 2019-07-09 | International Business Machines Corporation | Determination of state of padding operation |
US9680653B1 (en) * | 2016-10-13 | 2017-06-13 | International Business Machines Corporation | Cipher message with authentication instruction |
US10630312B1 (en) * | 2019-01-31 | 2020-04-21 | International Business Machines Corporation | General-purpose processor instruction to perform compression/decompression operations |
US10831497B2 (en) * | 2019-01-31 | 2020-11-10 | International Business Machines Corporation | Compression/decompression instruction specifying a history buffer to be used in the compression/decompression of data |
US11061685B2 (en) * | 2019-02-27 | 2021-07-13 | International Business Machines Corporation | Extended asynchronous data mover functions compatibility indication |
Family Cites Families (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2458331A1 (de) * | 1973-12-13 | 1975-06-19 | Honeywell Inf Systems | Datenverarbeitungssystem zur adressierung eines in einem sekundaerspeicher abgelegten datensatzes |
JPS56121138A (en) * | 1980-02-28 | 1981-09-22 | Nippon Telegr & Teleph Corp <Ntt> | Buffer memory controlling system |
US4578530A (en) | 1981-06-26 | 1986-03-25 | Visa U.S.A., Inc. | End-to-end encryption system and method of operation |
EP0354774B1 (en) | 1988-08-11 | 1996-04-10 | International Business Machines Corporation | Data cryptography using control vectors |
US5200999A (en) | 1991-09-27 | 1993-04-06 | International Business Machines Corporation | Public key cryptosystem key management based on control vectors |
AU6629894A (en) | 1993-05-07 | 1994-12-12 | Apple Computer, Inc. | Method for decoding guest instructions for a host computer |
US5666411A (en) | 1994-01-13 | 1997-09-09 | Mccarty; Johnnie C. | System for computer software protection |
US5551013A (en) | 1994-06-03 | 1996-08-27 | International Business Machines Corporation | Multiprocessor for hardware emulation |
US5673319A (en) | 1995-02-06 | 1997-09-30 | International Business Machines Corporation | Block cipher mode of operation for secure, length-preserving encryption |
US5765030A (en) | 1996-07-19 | 1998-06-09 | Symantec Corp | Processor emulator module having a variable pre-fetch queue size for program execution |
US5774670A (en) * | 1995-10-06 | 1998-06-30 | Netscape Communications Corporation | Persistent client state in a hypertext transfer protocol based client-server system |
US5790825A (en) | 1995-11-08 | 1998-08-04 | Apple Computer, Inc. | Method for emulating guest instructions on a host computer through dynamic recompilation of host instructions |
US6009261A (en) | 1997-12-16 | 1999-12-28 | International Business Machines Corporation | Preprocessing of stored target routines for emulating incompatible instructions on a target processor |
US6226750B1 (en) * | 1998-01-20 | 2001-05-01 | Proact Technologies Corp. | Secure session tracking method and system for client-server environment |
JPH11249873A (ja) * | 1998-03-02 | 1999-09-17 | Mitsubishi Electric Corp | ドライバ機能の動的管理方式及び動的管理方法 |
US6308255B1 (en) | 1998-05-26 | 2001-10-23 | Advanced Micro Devices, Inc. | Symmetrical multiprocessing bus and chipset used for coprocessor support allowing non-native code to run in a system |
US6463582B1 (en) | 1998-10-21 | 2002-10-08 | Fujitsu Limited | Dynamic optimizing object code translator for architecture emulation and dynamic optimizing object code translation method |
AU6625000A (en) | 1999-08-09 | 2001-03-05 | Qualcomm Incorporated | Method and apparatus for generating a message authentication code |
JP2001142694A (ja) * | 1999-10-01 | 2001-05-25 | Hitachi Ltd | データフィールドのエンコード方法、情報フィールドの拡張方法、及び、コンピュータシステム |
US6542981B1 (en) | 1999-12-28 | 2003-04-01 | Intel Corporation | Microcode upgrade and special function support by executing RISC instruction to invoke resident microcode |
JP2002353960A (ja) | 2001-05-30 | 2002-12-06 | Fujitsu Ltd | コード実行装置およびコード配布方法 |
US7266703B2 (en) | 2001-06-13 | 2007-09-04 | Itt Manufacturing Enterprises, Inc. | Single-pass cryptographic processor and method |
US7213148B2 (en) * | 2001-06-13 | 2007-05-01 | Corrent Corporation | Apparatus and method for a hash processing system using integrated message digest and secure hash architectures |
US20030002666A1 (en) * | 2001-06-13 | 2003-01-02 | Takahashi Richard J. | Method and apparatus for creating a message digest using a parallel, one-way hash algorithm |
US20030028765A1 (en) | 2001-07-31 | 2003-02-06 | Cromer Daryl Carvis | Protecting information on a computer readable medium |
US6996725B2 (en) | 2001-08-16 | 2006-02-07 | Dallas Semiconductor Corporation | Encryption-based security protection for processors |
-
2003
- 2003-05-12 US US10/436,230 patent/US7159122B2/en active Active
-
2004
- 2004-05-04 PL PL04731046T patent/PL1623316T3/pl unknown
- 2004-05-04 AT AT04731046T patent/ATE350702T1/de active
- 2004-05-04 ES ES04731046T patent/ES2279365T3/es not_active Expired - Lifetime
- 2004-05-04 GB GB0518811A patent/GB2416609B/en not_active Expired - Fee Related
- 2004-05-04 DE DE602004004101T patent/DE602004004101T2/de not_active Expired - Lifetime
- 2004-05-04 WO PCT/GB2004/001915 patent/WO2004099975A2/en active IP Right Grant
- 2004-05-04 EP EP04731046A patent/EP1623316B1/en not_active Expired - Lifetime
- 2004-05-04 JP JP2006506214A patent/JP4817189B2/ja not_active Expired - Lifetime
- 2004-05-04 CN CN2004800128758A patent/CN1799024B/zh not_active Expired - Lifetime
- 2004-05-04 RU RU2005138547/09A patent/RU2344467C2/ru active
-
2006
- 2006-10-10 JP JP2006276107A patent/JP4817185B2/ja not_active Expired - Lifetime
- 2006-10-20 US US11/551,292 patent/US7725736B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US7725736B2 (en) | 2010-05-25 |
US7159122B2 (en) | 2007-01-02 |
US20070055886A1 (en) | 2007-03-08 |
GB2416609B (en) | 2006-03-22 |
US20040230814A1 (en) | 2004-11-18 |
WO2004099975A2 (en) | 2004-11-18 |
EP1623316A2 (en) | 2006-02-08 |
JP2007080278A (ja) | 2007-03-29 |
ATE350702T1 (de) | 2007-01-15 |
RU2344467C2 (ru) | 2009-01-20 |
ES2279365T3 (es) | 2007-08-16 |
CN1799024A (zh) | 2006-07-05 |
JP2006526202A (ja) | 2006-11-16 |
PL1623316T3 (pl) | 2007-05-31 |
DE602004004101T2 (de) | 2007-07-05 |
GB2416609A (en) | 2006-02-01 |
JP4817185B2 (ja) | 2011-11-16 |
WO2004099975A3 (en) | 2006-01-05 |
JP4817189B2 (ja) | 2011-11-16 |
EP1623316B1 (en) | 2007-01-03 |
DE602004004101D1 (de) | 2007-02-15 |
CN1799024B (zh) | 2010-04-28 |
GB0518811D0 (en) | 2005-10-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
RU2005138547A (ru) | Обработкакоманд генерации дайджестов сообщений | |
CN101583927B (zh) | 独立于踪迹的存储地址来定义踪迹句柄 | |
TW299421B (ru) | ||
WO2003107180B1 (en) | PRESENTATION OF A DYNAMIC ASSOCIATIVITY OF TYPICAL CODES | |
US6975325B2 (en) | Method and apparatus for graphics processing using state and shader management | |
DE10345454A1 (de) | Wortindividuelle Schlüsselerzeugung | |
CA2523241A1 (en) | Processing cipher message assist instructions | |
CA2522995A1 (en) | Processing a security message authentication control instruction | |
CN112559140A (zh) | 数据一致性的事务控制方法、系统、设备及存储介质 | |
CN111967065A (zh) | 一种数据保护方法、处理器及电子设备 | |
CN106156076A (zh) | 数据处理的方法和系统 | |
US20150134704A1 (en) | Real Time Analysis of Big Data | |
CN110992453B (zh) | 场景物件的显示方法、装置、电子设备和存储介质 | |
CN102270179A (zh) | 用于cad系统的基于片元的数据存储和处理方法及其系统 | |
CN103853312A (zh) | 来自与数据处理设备的处理器关联的存储器的静态帧显示 | |
EP3758288B1 (en) | Digital signature verification engine for reconfigurable circuit devices | |
CN116107991A (zh) | 容器标签数据库构建方法、装置、存储介质及电子设备 | |
JP2007086951A (ja) | ファイル分割処理方法及びファイル分割プログラム | |
CN101819608A (zh) | 一种微处理器指令级随机验证中加速取指的装置和方法 | |
JP2015069332A (ja) | 静的検証装置に静的検証を実行させる対象範囲を抽出する、対象範囲抽出装置、静的検証システム、対象範囲抽出方法、及び対象範囲抽出プログラム | |
CN116992966B (zh) | 用于人工智能模型推理平台的方法及计算设备 | |
WO2023176202A1 (ja) | 疑似画像生成装置 | |
JP2007164708A (ja) | 変換データ生成装置、データ変換システム、及びこれらの方法並びにそのプログラム | |
CN107491288A (zh) | 一种基于单指令多数据流结构的数据处理方法及装置 | |
KR100779660B1 (ko) | 비디오 데이터 처리 방법 및 장치 |