RU1830632C - Adaptive group receiver of multifrequency code with pulse-code modulation - Google Patents

Description

The invention relates to telecommunications and can be used to control the switching equipment of a pulse-modulated digital electronic telephone exchange.

The purpose of the invention is to expand the dynamic range of received signal levels.

The drawing shows a functional diagram of an adaptive group receiver of a multi-frequency code with pulse-code modulation.

The receiver contains random access memory t, a switch 2 addresses, block 3 generators, the first, second and third registers 4-6, block 7 multipliers, the first and second converters 8 and 9 code, the first and second computing blocks 10 and 11, the first and second counters 12 and 13, code comparator 14, first, second and third read-only memory devices 16, 15, 17 and code adder 18, an additional meter of average signal amplitude 19 is introduced, the clock input of which is connected to the clock input of random access memory 1 the outputs of which through the meter 19 of the average amplitude of the signal are connected to the corresponding first inputs of the first ROM 16, while the additional output of the block 2 of the generators is connected. with the enable inputs of the first 8 and second 9 code converters and with the inhibit input of the meter 19 of the average signal amplitude, the installation input of which connected to the first output of block 3 generators.

The receiver operates as follows.

The data inputs of random access memory (RAM) 1 receive a parallel and non-linear PCM code for reading the signal of the next channel, containing the signed S-th digit and the three most significant bits (7th, 6th and 5th) defining the segment number of the nonlinear reference code. The four least significant bits of the LM code, which determine the position of the reference within this segment, are not processed and discarded in order to simplify the receiver. Since the information on the spectral composition of the two-frequency signal was practically contained in the sign bit of the PCM code of samples, the harmonic signal has significant redundancy. Due to redundancy, truncation of the KM code to 4 senior bits (as shown by modeling on a microcomputer) does not significantly reduce the noise immunity of the reception.

The sequence of samples of a group digital PCM signal carrying information on two-frequency dialing messages in each of the 32 channels is recorded in RAM 1 as it arrives at the addresses corresponding to each channel. To generate addresses, frequency grids (1024-0.0625) kHz are used, which are generated in block 3 of the generators by successively dividing clock pulses of frequency f 2048 kHz.

The cycle synchronization of the generator block 3 is provided by applying a pulse sequence fu of 8 kHz to its second input.

Dialing signals are transmitted in the spectrum of the PM channel by multi-frequency codes 2 of b in the frequency range (700-1700) Hz and the levels of (-36-6) dBmO with possible distortion of the P 6 dB levels. Altogether, there can be Ce 15 code combinations for transmitting 10 digits and a number of auxiliary signals during automatic connection establishment between analogue coordinate exchanges and digital EATS-TsA with IKM.

Two-frequency packages can follow one after another without interruptions, the so-called interval-free package. The average duration of one parcel is 50 ms, the duration range is 31-70 ms.

The time T of the analysis of the two-frequency signal segment in the receiver is determined by half the minimum duration

packages, since the moments of their change are unknown and independent of the beginning of the analysis interval T.

In order to simplify the construction of a block of 3 generators in the receiver, it is taken as a basis

T 16 Msec, which corresponds to the minimum frequency of the generated frequency grid Rmin 1 / T 0.0625 kHz. During time T, K TC / Rmin passes 128 PCM signal samples on each of 32 channels. T selection 16 ms

determines the memory capacity of RAM 1 N 128x32 4096 four-bit words.

To simplify the group receiver, it is advisable to perform sequential single-channel processing of the multi-channel signal. In this case, all K 128 PCM samples of the first channel previously recorded in RAM 1 are read first, then 128 samples of the second channel, etc., up to the 32nd channel.

The receiver turns out to be practically single-channel, only the processing time of one channel is reduced by 32 times and amounts to T0 T / 32 0.5 Msec. To generate the necessary addresses of RAM 1 in the modes of writing and reading information, an address switch 2 is used, controlled by its first input by write / read pulses with a frequency fT. At the end of the read mode, the next sample of signal X from the output of RAM 1 is overwritten in the first register 4, where it is stored for subsequent comparison with the next sample Y of the signal from this channel from the output of RAM 1. Sign bits of the previous sample X and the subsequent Y, as well as three significant bits of the modules of both samples are supplied in the form of addresses to the inputs of the first ROM 16. This ROM is used as a converter of the nonlinear PCM code of two neighboring samples into a 4-bit adaptive delta modulation (ADM) code.

The difference of two adjacent samples of the signal is encoded using four quantization steps with a frequency of TKB 4fu 32 kHz. A reduction in f B B by a factor of two compared to the transmission rate of an 8-bit non-linear PCM code f 8 fc 64 kHz is achieved by adapting the quantization step D to the average signal level. The information about the step is accumulated in the medium-amplitude meter 19, to the inputs of which all 128 codes of modules of segments of PCM samples of the signal of the channel are transmitted one after the other, the medium-amplitude meter 19 is an accumulating adder, the code outputs of which carry information about a segment of adaptive step A, proportional to the average module of a segment of a two-frequency signal T 16 Msec. A non-linear three-bit step code is supplied to the first three address inputs of the first ROM 16. Step A is formed before the main processing of information of this channel starts and is stored in the meter 19 up to the end of the T0 T / 32 interval of 0.5 ms. The interval T0 is divided into 8 segments AT0 T0 / 8 62.5 μs, while the first two segments 2 AT0 125 μs are spent on accumulating information read out from RAM 1 on the average module of segments of all 128 samples of the VIKM signal of this channel. The remaining six time slots 6 DTo 375 microseconds are spent on sequential processing of six frequencies and detection in this channel of two transmitted frequencies of code 2 of 6.

The medium amplitude meter 19 summarizes the codes of the modules of the sample segments of the channel for 125 μs, after which the accumulation ban stops at the input. As the code of the adaptive step D, three high-order bits of the ten-bit binary code obtained

as a result of summing 128 128-bit binary numbers.

The programming of the first ROM 16 is carried out according to the following algorithm:

1). The difference b of the current sample Y and the previous X in the linear binary code is determined, taking into account the signs of the samples, according to the formula d ± 2Y + 3 - (± 2X + 3), where X and Y are the numbers of segments enclosed in the three high-order bits of the PCM code.

2). The ratio a is found, taking into account the sign of d:

-I

± 2v + 3- (± 2x о Д + 3

)

± 2U - (± 2 x) jjTS

3). The output word of the first ROM (16) is determined from the conditions:

and 1 is the word 1010, the word 0101, and O

1 a 2 is the word 1101, and O is the word 0010, and O

2 a 3 - the word 1110, word 0001,

| «| 3 - the word 1111. and O the word 0000. and O

Due to the adaptation of step A to the average signal level, over a wide range of amplitudes of the two-frequency mixture (-36-6) dBmO, the output words of the ROM 16 are determined only by the spectral composition of the signal, i.e. its shape, and is almost independent of level. This achieves automatic level control (AGC) of the signal and a weak dependence of the reception thresholds on the dynamic range of amplitudes.

An additional advantage of converting the PCM code to ADM at the output of the ROM 16, in addition to the AGC, is the one-bit delta stream. Further processing of the output words of the ROM 16, where each bit has the same weight, is much simpler than processing the PCM codes.

The proposed receiver measures the cross-correlation between 4-bit words at the output of the first ROM 16 and reference 4-bit sign codes of sines and cosines of a given frequency recorded in the second ROM 15 of the quadrature signal components. The need to record both quadrature components is explained by the unknown initial phase of the received signal.

In block 7 of the multipliers for the sine and cosine signs, the mutual correlation of the four delta samples of the signal with the four delta samples of the sine and four delta samples of the cosine sequences recorded in ROM 15 is simultaneously calculated. sequences at the first four outputs of ROM 15, at the output of this bit of block 7 of the multipliers, a level of logical zero occurs, otherwise, unity. In the sine code converter 8, which is a 4-bit accumulating adder, the number of units (from 0 to 4) in each four samples is converted to a 1-2-4 binary code and the sum of these codes is accumulated. From the overflow output of the sine code converter 8, the number of coincidence pulses is counted by the first sine counter 12.

Similarly, the multiplication and accumulation of information on the cosine component occurs through the second four outputs of the ROM 15, block 7 of the multipliers per sign. cosine, cosine code converter 9 and cosine counter 13.

The accumulation of information in the counters 12 and 13 continues for half the time allotted for processing each frequency of a given channel. Specifically in

To the proposed receiver for the time „

. 31.25 microsecond RAM 1 reads 64 samples of the signal previously recorded on this channel. In the first 10 and second 11 computing units, the signs of the binary numbers recorded in each counter are determined by the high order sign of the respective counters 12 and 13. If the high-order sign is positive, the code from the outputs of the counter 12 or 13 passes without inversion to the inputs of the adder 18 of the codes of the same name, otherwise it is inverted, which ensures modulus addition of the sine and cosine components of the given frequency. From the outputs of the adder 18 codes

at the end of the interval ° information about

the signal level of a given frequency through the third ROM 17 is overwritten by the recording signal from the fourth output of the generator block 3 to the second register 5, where it is stored until the end of the processing time AT0 of this frequency.

The purpose of the third ROM 17 is to convert the signal code into an adaptive threshold code of a given frequency. According to the results of the analysis of the signal for the first half

processing time ----, in ROM 17, a threshold code proportional to the signal level is generated that predicts the nature of

further increasing the signal at the end of the LT0 processing interval. Since the information needed at the output of the ROM 17 is stored for a short time, only at the moment

DT0

-k-, it is stored in the second register 5. The adaptive threshold code recorded in register 5 is used to make a final decision about the non-availability or absence of a component of this frequency at the end of the AT0 interval.

If the signal code at the inputs of the ROM 17 is lower than the minimum threshold, the maximum code is written in register 5, which obviously increases the signal to the end of the AT0 interval. whereby there will be a logical zero at the output of comparator 14 and the reception does not take place.

After comparing in code comparator 14

the signal from the output of the adder 18 codes with an adaptive threshold from the output of the register 5, at the output of the comparator 14 there is a level of logical units, if the signal is exceeded; it is either equal to the threshold, or the logic level is zero if the signal is below the threshold. This information is copied to the third register 6 at the moment ATO is finished processing information about a given frequency of the next channel, according to the recording signal from the first output

block 3 generators.

At the moment T0 8 AT0 of the end of the processing interval of this channel, information on the two-frequency signal of this channel is generated on six output information buses of the register 6. At this moment, from the first output of the block of 3 generators, the ready pulse arrives at the clock output of the receiver in order to transmit information about the number of the next channel to

specialized microcomputer, sopr - (female with a receiver (not shown in the drawing). At the same time, this clock pulse is applied to the combined inputs of the zero setting of a medium-amplitude meter 19 and counters 12, 13.

The cycle synchronization of the receiver with the microcomputer is provided by pulses with a period of T 32 T0, taken from the third output of the generator block 3, due to which

the counter of the channel number included in the device for interfacing with the microcomputer (not shown in the drawing) is reset to zero.

The second output of block 3 of the generators gives a sequence of pulses with a period of 0.5 ms for processing one channel and a duration of 2 DT0 T0 / 4 e the beginning of the interval To. During the lifetime of the pulses 2. That is provided by

the resolution input of the medium-amplitude meter 19 is the accumulation of information about the adaptive step of quantization D. In the remaining time interval 6 ATo, the prohibition of the operation of code converters 8 and 9 is removed and sequential correlation processing of six signal frequencies occurs at a fixed, previously accumulated adaptive step of quantization L.

All of the above processes at the receiver at all subsequent T 32 T0 analysis intervals are repeated in the same way. At intervals T, including the moments of the change of parcels, non-transmission of any of the transmitted frequencies is possible. This will happen, for example, if the moment of changing the dialing sign is somewhere in the middle of the interval T. In this case, the previous sending FI, F2 will not be accepted due to the failure to reach a high adaptive threshold at the time T. The subsequent sending of Рз, F4 will also not be accepted, but due to the failure to reach the minimum signal level at the time T / 2. As a result, a passive pause will exist at the output of the receiver during the subsequent interval T, i.e. a non-interval packet will become an interval packet. This will lead to an acceptable shortening of the duration of the subsequent sending by an average of T / 2, but will not cause false positives of the receiver due to erroneous two-frequency combinations like FI, РЗ; F2, Ps; FI, RF; F2, F / j.

The proposed adaptive group digital receiver of a multi-frequency code with a pulse-code modulation is built on digital integrated circuits of a TTLS-structure and a CMOS structure of medium degree of integration, and also contains LSI RAM and ROM, the receiver is made on a single printed circuit board and contains 40 cases of K555 series microcircuits {1533), K561 (1561), K537, K573 and K556. The current consumption from the E + 5V power supply is on the order of 800 mA.

The RAM 1 is built on four K537RU14A type microcircuits and two K555AP4 bus formers. Switch 2 addresses consists of three multiplexers type K555KP11. Block 3 of the generators contains four cascade-connected synchronous binary counters of the type K1533IE10. Register 4 is built on a single chip of type K555IP11, register 5 contains a chip of K561IR9, and register b consists of a chip of type K51IR2 containing two independent four-bit shift registers, connected in series to obtain a six-bit output word. Block 7 of the multipliers for the sign of sines and cosines contains two cases of microcircuits of type K555LP5 EXCLUSIVE - 5 HOURS OR.

The first 8 and second 9 sine and cosine code converters each contain two code combiners of type K555IM6, one register K555IR11, 1/2 the case of the logical element AND-NOT K555LAZ and 1/4 the case K555LP5 EXCLUSIVE OR.

The first 10 and second 11 computational blocks each contain one controlled 4-bit register of the type

5 K561IR9, in which the module is calculated by switching the code (direct, inverse) by the sign of the highest order of the corresponding first 12 and second 13 counters, each of which is built on a single chip of type K561IE10.

The code comparator 14 contains one chip type K561IP2. The first ROM 16 is built on RPZU type K573RF2.

5 The second ROM of 15 quadrature components contains a TTLSh chip K556RT7. The third ROM 17 is built on RPZU type K573RF2.

The adder of 18 codes contains one housing of the K5611 / 1M1 chip.

The medium amplitude meter 19 is an accumulative adder of three-bit segment codes with 128 IS samples. The meter of the average amp5 of litup contains one K55IM6 adder microcircuit, one K555IR11 register microcircuit, and one K561IE10 counter microcircuit connected to the totalizer overflow output. The basic scheme of the medium-amplitude meter 19 largely coincides with the circuit of the code converters 8 and 9 (minus the elements AND NOT,).

The adaptive group receiver board for a multi-frequency stake with pulse-code modulation is designed, manufactured, and configured.

Technical appraisal and economic advantages of the proposed solution in comparison with

0 prototype USSR N 1635273, class H 04 L 27/14 include:

1. In expanding the dynamic range of levels and the permissible distortion of the amplitudes of the received two-frequency

5th signal due to lower non-linear. crosstalk falling into the signal frequency band. The reduction of non-linear noise is achieved by eliminating the clipping operation of two-frequency characters and preserving the waveform for

by converting the PCM to adaptive delta modulation with automatic adjustment of the quantization step in proportion to the average signal modulus.

The socio-economic effect is to improve the quality of communication, due to the reduction in the probability of false switching due to erroneous reception of dialing signals under the influence of nonlinear interference ..:

Claims (1)

SUMMARY OF THE INVENTION Adaptive group receiver of a multi-frequency pulse-code modulated code, comprising a block of generators, a first read-only memory device, the outputs of which are connected to the corresponding first inputs of the multiplier unit, the first and second computing units, the outputs of which are connected respectively to the first and second the inputs of the code adder, the outputs of which are connected to the first corresponding inputs of the code comparator, while the first and second inputs of the generator block are respectively clock and synchronizing inputs of the adaptive group receiver, the clock input of the address switch is connected to the clock input of the random access memory, to the clock input of the first register and to the first input of the generator block, the first outputs of which are connected to the corresponding inputs of the first permanent memory and - the corresponding inputs of the address switch, the outputs of which are connected to the corresponding address inputs of the random access memory, the outputs of which are connected to the corresponding first inputs of the second read-only memory and with the corresponding inputs of the first register, the outputs of which are connected to the corresponding second inputs of the second read-only memory, the outputs of which are connected to the corresponding second inputs of the multiplier unit, the first and second outputs of which are connected to the inputs of the first and second code converters, the outputs of which are connected to the signal inputs of the first and second counters, respectively, the installation inputs of the cat They are connected to the first output of the generator block and the installation input of the third register, the signal input of which is connected. To the output of the code comparator, the second inputs of which are connected to the corresponding outputs of the second register, the inputs of which are connected to the corresponding outputs of the third permanent storage device, the inputs of which are connected to the corresponding the outputs of the code adder, the third output of the generator block is connected to the recording input of the second register, the outputs of the first and second counters are connected to the inputs of respectively, of the first and second computing units, wherein the data inputs of the random access memory are signal inputs of an adaptive group receiver, the signal outputs of which are the outputs of the third register, the first and second outputs of the generator block are respectively the clock and loop outputs of the receiver, characterized in that, in order to expand the dynamic range of levels of the received signal, a meter of the average amplitude of the signal is introduced, the clock input of which is connected to the clock the input of random access memory /. the corresponding outputs of which are connected via an average signal amplitude meter to the corresponding first inputs of the first permanent memory, while the additional output of the generator block is connected to the enable inputs of the first and second code converters and to the inhibit input of the average signal amplitude meter, installation input which is connected to the first output of the generator block.