PL2764376T3 - Sposób rozróżniania pomiędzy urządzeniami z kanałem typu P i kanałem typu N oparty na różnym stopniu wytrawienia - Google Patents

Sposób rozróżniania pomiędzy urządzeniami z kanałem typu P i kanałem typu N oparty na różnym stopniu wytrawienia

Info

Publication number
PL2764376T3
PL2764376T3 PL11873517T PL11873517T PL2764376T3 PL 2764376 T3 PL2764376 T3 PL 2764376T3 PL 11873517 T PL11873517 T PL 11873517T PL 11873517 T PL11873517 T PL 11873517T PL 2764376 T3 PL2764376 T3 PL 2764376T3
Authority
PL
Poland
Prior art keywords
channel
differentiate
devices based
different etching
etching rates
Prior art date
Application number
PL11873517T
Other languages
English (en)
Inventor
Lev Klibanov
Jeffrey Campbell
Robert Szkarlat
Original Assignee
Chipworks, Incorporated
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chipworks, Incorporated filed Critical Chipworks, Incorporated
Publication of PL2764376T3 publication Critical patent/PL2764376T3/pl

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/302Contactless testing
    • G01R31/305Contactless testing using electron beams
    • G01R31/307Contactless testing using electron beams of integrated circuits
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2898Sample preparation, e.g. removing encapsulation, etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Weting (AREA)
PL11873517T 2011-09-27 2011-09-27 Sposób rozróżniania pomiędzy urządzeniami z kanałem typu P i kanałem typu N oparty na różnym stopniu wytrawienia PL2764376T3 (pl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP11873517.4A EP2764376B1 (en) 2011-09-27 2011-09-27 A method to differentiate p-channel or n-channel devices based on different etching rates.
PCT/IB2011/054245 WO2013045973A1 (en) 2011-09-27 2011-09-27 A method to differential p-channel or n-channel devices based on different etching rates.

Publications (1)

Publication Number Publication Date
PL2764376T3 true PL2764376T3 (pl) 2017-03-31

Family

ID=47994345

Family Applications (1)

Application Number Title Priority Date Filing Date
PL11873517T PL2764376T3 (pl) 2011-09-27 2011-09-27 Sposób rozróżniania pomiędzy urządzeniami z kanałem typu P i kanałem typu N oparty na różnym stopniu wytrawienia

Country Status (7)

Country Link
EP (1) EP2764376B1 (pl)
JP (1) JP5977830B2 (pl)
KR (1) KR20140082993A (pl)
CN (1) CN104105976B (pl)
CA (1) CA2849729A1 (pl)
PL (1) PL2764376T3 (pl)
WO (1) WO2013045973A1 (pl)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7396899B2 (ja) * 2017-05-15 2023-12-12 エル・ピー・ケー・エフ・レーザー・アンド・エレクトロニクス・ソシエタス・ヨーロピア パルスレーザ光を用いた基板の加工、特に分離のための方法
JP2020131141A (ja) * 2019-02-21 2020-08-31 紀州技研工業株式会社 描画方法および描画装置

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4623255A (en) * 1983-10-13 1986-11-18 The United States Of America As Represented By The Administrator, National Aeronautics And Space Administration Method of examining microcircuit patterns
JP2953020B2 (ja) * 1990-10-05 1999-09-27 日本電気株式会社 半導体装置の製造方法
JPH11135785A (ja) * 1997-10-31 1999-05-21 Sony Corp 半導体装置の製造方法
JP2000260768A (ja) * 1999-03-05 2000-09-22 Nec Corp 半導体装置の製造方法
US7294935B2 (en) * 2001-01-24 2007-11-13 Hrl Laboratories, Llc Integrated circuits protected against reverse engineering and method for fabricating the same using an apparent metal contact line terminating on field oxide
US6872581B2 (en) * 2001-04-16 2005-03-29 Nptest, Inc. Measuring back-side voltage of an integrated circuit
JP4302971B2 (ja) * 2002-12-17 2009-07-29 Necエレクトロニクス株式会社 半導体装置の製造方法
JP2005045006A (ja) * 2003-07-22 2005-02-17 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
US7015146B2 (en) * 2004-01-06 2006-03-21 International Business Machines Corporation Method of processing backside unlayering of MOSFET devices for electrical and physical characterization including a collimated ion plasma
CA2521675C (en) * 2005-09-29 2009-11-24 Chipworks Inc Method of preparing an integrated circuit die for imaging
US20070200179A1 (en) * 2006-02-24 2007-08-30 Taiwan Semiconductor Manufacturing Co., Ltd. Strain enhanced CMOS architecture with amorphous carbon film and fabrication method of forming the same
US7745236B2 (en) * 2006-12-21 2010-06-29 Spansion Llc Floating gate process methodology
US7655984B2 (en) * 2007-06-12 2010-02-02 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device with discontinuous CESL structure

Also Published As

Publication number Publication date
CN104105976B (zh) 2016-09-21
EP2764376A4 (en) 2015-06-17
EP2764376A1 (en) 2014-08-13
KR20140082993A (ko) 2014-07-03
JP2014531763A (ja) 2014-11-27
JP5977830B2 (ja) 2016-08-24
CA2849729A1 (en) 2013-04-04
CN104105976A (zh) 2014-10-15
EP2764376B1 (en) 2016-11-16
WO2013045973A1 (en) 2013-04-04

Similar Documents

Publication Publication Date Title
EP2695057A4 (en) CREATION OF A CORRELATION RULE DEFINING A RELATIONSHIP BETWEEN TYPES OF EVENTS
EP2745189A4 (en) BRACELET KEYBOARD
EP2698219A4 (en) FOREST
GB201203412D0 (en) .
ZA201404328B (en) Electronic transaction method
EP2909744A4 (en) REALIZING RESEARCH BASED ON CRITERIA ASSOCIATED WITH AN ENTITY
SG11201402747XA (en) Processing event data streams
GB2493907B (en) Downhole pulse-generating apparatus
GB201203063D0 (en) .
EP2742683A4 (en) METHOD FOR DETECTING SYMBOL ERROR
GB201113968D0 (en) Prognostic methadology
GB201108648D0 (en) Velocity strings
PL2764376T3 (pl) Sposób rozróżniania pomiędzy urządzeniami z kanałem typu P i kanałem typu N oparty na różnym stopniu wytrawienia
GB2505813B (en) Integrated key server
EP2711783A4 (en) Electronic clock
AU340184S (en) Hole punch
GB2490529B (en) A hole opener
GB2490534B (en) A hole opener
AU4560P (en) MZZ1456030 Cucumis melo
AU4571P (en) HDO393502 Cucumis melo
AU4570P (en) HDO393501 Cucumis melo
AU4559P (en) MZZ1456043 Cucumis melo
AU4561P (en) PS 03935152 Cucumis melo
AU2011905370A0 (en) UCG Operation Methods
AU2011903253A0 (en) An improved transaction method