PL203794A1 - Scalony uklad logiczny - Google Patents

Scalony uklad logiczny

Info

Publication number
PL203794A1
PL203794A1 PL20379478A PL20379478A PL203794A1 PL 203794 A1 PL203794 A1 PL 203794A1 PL 20379478 A PL20379478 A PL 20379478A PL 20379478 A PL20379478 A PL 20379478A PL 203794 A1 PL203794 A1 PL 203794A1
Authority
PL
Poland
Prior art keywords
combined logical
logical
combined
Prior art date
Application number
PL20379478A
Other languages
English (en)
Other versions
PL114678B1 (en
Inventor
Vjaceslav J Kremlev
Artases R Nazarjan
Aleksej V Ljubasevskij
Vil Jam N Kokin
Original Assignee
Kremlev V J
Artases R Nazarjan
Aleksej V Ljubasevskij
Vil Jam N Kokin
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from SU772441910A external-priority patent/SU633395A1/ru
Priority claimed from SU772441813A external-priority patent/SU602056A1/ru
Application filed by Kremlev V J, Artases R Nazarjan, Aleksej V Ljubasevskij, Vil Jam N Kokin filed Critical Kremlev V J
Publication of PL203794A1 publication Critical patent/PL203794A1/pl
Publication of PL114678B1 publication Critical patent/PL114678B1/pl

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09403Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using junction field-effect transistors
    • H03K19/09414Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using junction field-effect transistors with gate injection or static induction [STIL]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0214Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0218Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of field effect structures
    • H01L27/0225Charge injection in static induction transistor logic structures [SITL]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/098Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being PN junction gate field-effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
PL1978203794A 1977-01-10 1978-01-04 Integrated logic circuit PL114678B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SU772441910A SU633395A1 (ru) 1977-01-10 1977-01-10 Интегральна логическа схема
SU772441813A SU602056A1 (ru) 1977-01-10 1977-01-10 Интегральный инвертор

Publications (2)

Publication Number Publication Date
PL203794A1 true PL203794A1 (pl) 1978-10-23
PL114678B1 PL114678B1 (en) 1981-02-28

Family

ID=26665610

Family Applications (1)

Application Number Title Priority Date Filing Date
PL1978203794A PL114678B1 (en) 1977-01-10 1978-01-04 Integrated logic circuit

Country Status (10)

Country Link
US (1) US4175240A (pl)
JP (1) JPS53111287A (pl)
CH (1) CH631298A5 (pl)
CS (1) CS201645B1 (pl)
DD (1) DD134585A1 (pl)
DE (1) DE2800924C2 (pl)
FR (1) FR2377094A1 (pl)
GB (1) GB1557657A (pl)
NL (1) NL7800133A (pl)
PL (1) PL114678B1 (pl)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4638344A (en) * 1979-10-09 1987-01-20 Cardwell Jr Walter T Junction field-effect transistor controlled by merged depletion regions
US4698653A (en) * 1979-10-09 1987-10-06 Cardwell Jr Walter T Semiconductor devices controlled by depletion regions
JPH0760997B2 (ja) * 1986-06-09 1995-06-28 日本テキサス・インスツルメンツ株式会社 高耐圧出力回路
JP3300593B2 (ja) * 1995-06-15 2002-07-08 株式会社東芝 半導体集積回路装置
US20020071293A1 (en) * 2000-07-13 2002-06-13 Eden Richard C. Power semiconductor switching devices, power converters, integrated circuit assemblies, integrated circuitry, power current switching methods, methods of forming a power semiconductor switching device, power conversion methods, power semiconductor switching device packaging methods, and methods a of forming power transistor
FI20150334A (fi) 2015-01-14 2016-07-15 Artto Mikael Aurola Paranneltu puolijohdekokoonpano

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4065680A (en) * 1974-07-11 1977-12-27 Signetics Corporation Collector-up logic transmission gates
DE2509530C2 (de) * 1975-03-05 1985-05-23 Ibm Deutschland Gmbh, 7000 Stuttgart Halbleiteranordnung für die Grundbausteine eines hochintegrierbaren logischen Halbleiterschaltungskonzepts basierend auf Mehrfachkollektor-Umkehrtransistoren
JPS608628B2 (ja) * 1976-07-05 1985-03-04 ヤマハ株式会社 半導体集積回路装置
US4053923A (en) * 1976-09-23 1977-10-11 Motorola, Inc. Integrated logic elements with improved speed-power characteristics

Also Published As

Publication number Publication date
DE2800924C2 (de) 1982-10-28
PL114678B1 (en) 1981-02-28
NL7800133A (nl) 1978-07-12
DD134585A1 (de) 1979-03-07
US4175240A (en) 1979-11-20
CS201645B1 (en) 1980-11-28
JPS53111287A (en) 1978-09-28
CH631298A5 (de) 1982-07-30
DE2800924A1 (de) 1978-07-20
GB1557657A (en) 1979-12-12
FR2377094A1 (fr) 1978-08-04
FR2377094B1 (pl) 1980-05-16

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