PE3691A1 - Gestion de interrupciones para un sistema de computacion - Google Patents

Gestion de interrupciones para un sistema de computacion

Info

Publication number
PE3691A1
PE3691A1 PE1990170793A PE17079390A PE3691A1 PE 3691 A1 PE3691 A1 PE 3691A1 PE 1990170793 A PE1990170793 A PE 1990170793A PE 17079390 A PE17079390 A PE 17079390A PE 3691 A1 PE3691 A1 PE 3691A1
Authority
PE
Peru
Prior art keywords
interruptions
management
computer system
subsystem
central processor
Prior art date
Application number
PE1990170793A
Other languages
English (en)
Inventor
Chester Asbury Heath
Richard Neil Mendelson
Francis Michael Bonevento
Ernest Nelson Mandese
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of PE3691A1 publication Critical patent/PE3691A1/es

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Hardware Redundancy (AREA)

Abstract

CARACTERIZADA POR ESTAR REFERIDA A LA GESTION DE MULTIPLES INTERRUPCIONES LOGICAS DE COMANDOS INDIRECTOS EN UNA INTERRUPCION FISICA DESDE UN SUBSISTEMA A UN PROCESADOR CENTRAL. EL PROCESADOR CENTRAL PUEDE BORRAR MULTIPLES INTERRUPCIONES LOGICAS DESDE UN DISPOSITIVO LOGICO, DADO EN EL SUBSISTEMA CON UN SOLO COMANDO DE REINICIALIZACION DE INTERRUPCIONES
PE1990170793A 1989-06-16 1990-06-14 Gestion de interrupciones para un sistema de computacion PE3691A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/367,391 US5185864A (en) 1989-06-16 1989-06-16 Interrupt handling for a computing system with logical devices and interrupt reset

Publications (1)

Publication Number Publication Date
PE3691A1 true PE3691A1 (es) 1991-02-15

Family

ID=23446982

Family Applications (1)

Application Number Title Priority Date Filing Date
PE1990170793A PE3691A1 (es) 1989-06-16 1990-06-14 Gestion de interrupciones para un sistema de computacion

Country Status (6)

Country Link
US (1) US5185864A (es)
EP (1) EP0403119A3 (es)
JP (1) JPH0640321B2 (es)
BR (1) BR9002835A (es)
GB (1) GB9008091D0 (es)
PE (1) PE3691A1 (es)

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DE3917715A1 (de) * 1989-05-31 1990-12-06 Teldix Gmbh Rechnersystem
US5544347A (en) 1990-09-24 1996-08-06 Emc Corporation Data storage system controlled remote data mirroring with respectively maintained data indices
US5265255A (en) * 1990-09-24 1993-11-23 International Business Machines Corp. Personal computer system with interrupt controller
JPH0776951B2 (ja) * 1990-10-30 1995-08-16 インターナショナル・ビジネス・マシーンズ・コーポレイション コンピュータシステム、複数の入出力アダプタによるアドレス空間共用システム、及び複数の入出力装置とコンピュータプロセッサ間の通信管理方
US5404535A (en) * 1991-10-22 1995-04-04 Bull Hn Information Systems Inc. Apparatus and method for providing more effective reiterations of processing task requests in a multiprocessor system
BR9204660A (pt) * 1991-12-20 1993-06-22 Ibm Sistema de rede de computadores que engloba uma interface para sistemas de computadores pequenos(scsi)para dispositivos de scsi nao locais
US5459857A (en) * 1992-05-15 1995-10-17 Storage Technology Corporation Fault tolerant disk array data storage subsystem
US5481724A (en) * 1993-04-06 1996-01-02 International Business Machines Corp. Peer to peer computer-interrupt handling
JPH07262154A (ja) * 1994-03-25 1995-10-13 Fujitsu Ltd プロセッサ間通信制御方式
US5901327A (en) * 1996-05-28 1999-05-04 Emc Corporation Bundling of write data from channel commands in a command chain for transmission over a data link between data storage systems for remote data mirroring
US6052797A (en) * 1996-05-28 2000-04-18 Emc Corporation Remotely mirrored data storage system with a count indicative of data consistency
US6023743A (en) 1997-06-10 2000-02-08 International Business Machines Corporation System and method for arbitrating interrupts on a daisy chained architected bus
WO2002061590A1 (en) * 2001-01-31 2002-08-08 International Business Machines Corporation Method and apparatus for transferring interrupts from a peripheral device to a host computer system
WO2002069115A2 (en) * 2001-02-28 2002-09-06 Brecis Communications Corporation A security system with an intelligent dma controller
US6816935B1 (en) * 2001-03-02 2004-11-09 Advanced Micro Devices, Inc. Interrupt and status reporting structure and method for a timeslot bus
US6823413B2 (en) * 2001-06-08 2004-11-23 Oki Electronic Industry Co., Ltd. Interrupt signal processing apparatus
US20030225916A1 (en) * 2002-05-30 2003-12-04 David Cheon Implementing a data link layer protocol for multiple network interface devices
US6792610B2 (en) * 2002-05-30 2004-09-14 Sun Microsystems, Inc. Attaching a device driver to multiple logical devices of one physical device
US7127601B2 (en) * 2002-05-30 2006-10-24 Sun Microsystems, Inc. System and method for delivering FPGA programming
US7076787B2 (en) * 2002-05-30 2006-07-11 Sun Microsystems, Inc. Supporting multiple protocols with a single device driver
US7112388B2 (en) 2002-06-27 2006-09-26 Hitachi Maxwell Ltd. Battery provided with terminals
US20090177807A1 (en) * 2008-01-03 2009-07-09 International Business Machines Corporation Reset method for application specific integrated circuits (asic)
US8968907B2 (en) 2010-08-30 2015-03-03 Samsung Sdi Co., Ltd. Battery pack
US9146776B1 (en) * 2011-08-16 2015-09-29 Marvell International Ltd. Systems and methods for controlling flow of message signaled interrupts
US9128920B2 (en) 2011-11-30 2015-09-08 Marvell World Trade Ltd. Interrupt handling systems and methods for PCIE bridges with multiple buses
CN107577591A (zh) * 2016-07-05 2018-01-12 中兴通讯股份有限公司 一种自动化测试异常保护的方法、装置及系统
CN110858164B (zh) * 2018-08-22 2022-09-09 成都华为技术有限公司 进程间通信方法、装置及计算机可读介质

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3787891A (en) * 1972-07-03 1974-01-22 Ibm Signal processor instruction for non-blocking communication between data processing units
US3778780A (en) * 1972-07-05 1973-12-11 Ibm Operation request block usage
JPS5549344B2 (es) * 1973-12-19 1980-12-11
US4470111A (en) * 1979-10-01 1984-09-04 Ncr Corporation Priority interrupt controller
US4445176A (en) * 1979-12-28 1984-04-24 International Business Machines Corporation Block transfers of information in data processing networks
JPS57178518A (en) * 1981-04-24 1982-11-02 Nec Home Electronics Ltd Interruption control circuit
JPS58222361A (ja) * 1982-06-18 1983-12-24 Fujitsu Ltd デ−タ処理システムにおけるアクセス要求の優先順位決定制御方式
US4787026A (en) * 1986-01-17 1988-11-22 International Business Machines Corporation Method to manage coprocessor in a virtual memory virtual machine data processing system
US4901234A (en) * 1987-03-27 1990-02-13 International Business Machines Corporation Computer system having programmable DMA control
JPH01126751A (ja) * 1987-11-11 1989-05-18 Fujitsu Ltd グルーピング装置
US4994963A (en) * 1988-11-01 1991-02-19 Icon Systems International, Inc. System and method for sharing resources of a host computer among a plurality of remote computers

Also Published As

Publication number Publication date
GB9008091D0 (en) 1990-06-06
BR9002835A (pt) 1991-08-20
US5185864A (en) 1993-02-09
EP0403119A3 (en) 1991-11-27
EP0403119A2 (en) 1990-12-19
JPH0640321B2 (ja) 1994-05-25
JPH0355653A (ja) 1991-03-11

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