NO862765L - Fremgangsmaate for fremstilling av mikromoduler for komponentkort og produkter fremstilt ved fremgangsmaaten. - Google Patents

Fremgangsmaate for fremstilling av mikromoduler for komponentkort og produkter fremstilt ved fremgangsmaaten.

Info

Publication number
NO862765L
NO862765L NO862765A NO862765A NO862765L NO 862765 L NO862765 L NO 862765L NO 862765 A NO862765 A NO 862765A NO 862765 A NO862765 A NO 862765A NO 862765 L NO862765 L NO 862765L
Authority
NO
Norway
Prior art keywords
conductive
micromodule
cell
stated
microcircuit
Prior art date
Application number
NO862765A
Other languages
English (en)
Norwegian (no)
Other versions
NO862765D0 (no
Inventor
Jean Pierre Gloton
Phillippe Peres
Original Assignee
Eurotechnique Sa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Eurotechnique Sa filed Critical Eurotechnique Sa
Publication of NO862765D0 publication Critical patent/NO862765D0/no
Publication of NO862765L publication Critical patent/NO862765L/no

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01057—Lanthanum [La]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Theoretical Computer Science (AREA)
  • Credit Cards Or The Like (AREA)
  • Paper (AREA)
  • Inspection Of Paper Currency And Valuable Securities (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
NO862765A 1985-07-12 1986-07-08 Fremgangsmaate for fremstilling av mikromoduler for komponentkort og produkter fremstilt ved fremgangsmaaten. NO862765L (no)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8510719A FR2584862B1 (fr) 1985-07-12 1985-07-12 Procede de fabrication en continu de micromodules pour cartes contenant des composants, bande continue de micromodules et micromodules realises selon un tel procede

Publications (2)

Publication Number Publication Date
NO862765D0 NO862765D0 (no) 1986-07-08
NO862765L true NO862765L (no) 1987-01-13

Family

ID=9321252

Family Applications (1)

Application Number Title Priority Date Filing Date
NO862765A NO862765L (no) 1985-07-12 1986-07-08 Fremgangsmaate for fremstilling av mikromoduler for komponentkort og produkter fremstilt ved fremgangsmaaten.

Country Status (4)

Country Link
EP (1) EP0211716A1 (ja)
JP (1) JPS6219496A (ja)
FR (1) FR2584862B1 (ja)
NO (1) NO862765L (ja)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2632100B1 (fr) * 1988-05-25 1992-02-21 Schlumberger Ind Sa Procede de realisation d'une carte a memoire electronique et cartes a memoire electronique obtenue par la mise en oeuvre dudit procede
EP0408904A3 (en) * 1989-07-21 1992-01-02 Motorola Inc. Surface mounting semiconductor device and method
CH686325A5 (de) * 1992-11-27 1996-02-29 Esec Sempac Sa Elektronikmodul und Chip-Karte.
US5977613A (en) * 1996-03-07 1999-11-02 Matsushita Electronics Corporation Electronic component, method for making the same, and lead frame and mold assembly for use therein
FR2761527B1 (fr) * 1997-03-25 1999-06-04 Gemplus Card Int Procede de fabrication de carte sans contact avec connexion d'antenne par fils soudes
EP1554754A2 (en) * 2002-10-15 2005-07-20 Axalto SA Method of manufacturing a data carrier
JP4843950B2 (ja) * 2005-01-27 2011-12-21 スズキ株式会社 船外機のチルトアップ規制装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2985806A (en) * 1958-12-24 1961-05-23 Philco Corp Semiconductor fabrication
DE2305883A1 (de) * 1973-02-07 1974-08-15 Finsterhoelzl Rafi Elekt Leiterplatte
FR2337381A1 (fr) * 1975-12-31 1977-07-29 Honeywell Bull Soc Ind Carte portative pour systeme de traitement de signaux electriques et procede de fabrication de cette carte
GB2073947B (en) * 1980-04-11 1983-12-21 Philips Electronic Associated Integrated circuit encapsulation
DE3051195C2 (de) * 1980-08-05 1997-08-28 Gao Ges Automation Org Trägerelement zum Einbau in Ausweiskarten
JPS5947748A (ja) * 1982-09-10 1984-03-17 Hitachi Ltd 半導体装置用リ−ドフレ−ム

Also Published As

Publication number Publication date
FR2584862A1 (fr) 1987-01-16
NO862765D0 (no) 1986-07-08
FR2584862B1 (fr) 1988-05-20
JPS6219496A (ja) 1987-01-28
EP0211716A1 (fr) 1987-02-25

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