NO303759B1 - Fremgangsmate og apparat til bifasedemodulasjon med digital faselöst slaayfe - Google Patents

Fremgangsmate og apparat til bifasedemodulasjon med digital faselöst slaayfe Download PDF

Info

Publication number
NO303759B1
NO303759B1 NO921051A NO921051A NO303759B1 NO 303759 B1 NO303759 B1 NO 303759B1 NO 921051 A NO921051 A NO 921051A NO 921051 A NO921051 A NO 921051A NO 303759 B1 NO303759 B1 NO 303759B1
Authority
NO
Norway
Prior art keywords
transition
bit
phase
clock
signal
Prior art date
Application number
NO921051A
Other languages
English (en)
Norwegian (no)
Other versions
NO921051D0 (no
NO921051L (no
Inventor
Michael Andrew Montgomery
Original Assignee
Schlumberger Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Schlumberger Technology Corp filed Critical Schlumberger Technology Corp
Publication of NO921051D0 publication Critical patent/NO921051D0/no
Publication of NO921051L publication Critical patent/NO921051L/no
Publication of NO303759B1 publication Critical patent/NO303759B1/no

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4904—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using self-synchronising codes, e.g. split-phase codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/10—Arrangements for initial synchronisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Manipulation Of Pulses (AREA)
  • Dc Digital Transmission (AREA)
NO921051A 1989-09-19 1992-03-18 Fremgangsmate og apparat til bifasedemodulasjon med digital faselöst slaayfe NO303759B1 (no)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/409,618 US4992790A (en) 1989-09-19 1989-09-19 Digital phase-locked loop biphase demodulating method and apparatus
PCT/US1990/005116 WO1991004625A1 (fr) 1989-09-19 1990-09-11 Procede et appareil de demodulation biphasee de boucle a phase verrouillee numerique

Publications (3)

Publication Number Publication Date
NO921051D0 NO921051D0 (no) 1992-03-18
NO921051L NO921051L (no) 1992-03-19
NO303759B1 true NO303759B1 (no) 1998-08-24

Family

ID=23621276

Family Applications (1)

Application Number Title Priority Date Filing Date
NO921051A NO303759B1 (no) 1989-09-19 1992-03-18 Fremgangsmate og apparat til bifasedemodulasjon med digital faselöst slaayfe

Country Status (7)

Country Link
US (1) US4992790A (fr)
EP (1) EP0493501B1 (fr)
AU (1) AU6502690A (fr)
CA (1) CA2066037C (fr)
DE (1) DE69028709D1 (fr)
NO (1) NO303759B1 (fr)
WO (1) WO1991004625A1 (fr)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5127023A (en) * 1990-07-18 1992-06-30 The United States Of America As Represented By The Secretary Of The Navy Retiming decoder/encoder
JP3371913B2 (ja) * 1991-09-03 2003-01-27 ソニー株式会社 波形歪補正装置
US5172113A (en) * 1991-10-24 1992-12-15 Minnesota Mining And Manufacturing Company System and method for transmitting data in an optical traffic preemption system
DE4345059A1 (de) * 1993-12-31 1995-07-06 Nec Electronics Europ Gmbh Verfahren und Vorrichtung zum Dekodieren eines diphase-kodierten digitalen Signals
US5636248A (en) * 1994-10-04 1997-06-03 The United States Of America As Represented By The Secretary Of The Navy Method and system for regenerating amplitude and timing characteristics of an analog signal
US5889820A (en) * 1996-10-08 1999-03-30 Analog Devices, Inc. SPDIF-AES/EBU digital audio data recovery
EP0930713B1 (fr) * 1997-12-04 2003-09-03 STMicroelectronics S.r.l. Décodage d'un train binaire modulé en biphase et diviseur de fréquence non-entier synchronisant soit même
US6252518B1 (en) 1998-11-17 2001-06-26 Schlumberger Technology Corporation Communications systems in a well
US6816082B1 (en) 1998-11-17 2004-11-09 Schlumberger Technology Corporation Communications system having redundant channels
DE10007783A1 (de) * 2000-02-21 2001-08-23 Rohde & Schwarz Verfahren und Anordnung zur Daten- und Taktrückgewinnung bei einem biphase-codierten Datensignal
JP2005175827A (ja) * 2003-12-10 2005-06-30 Matsushita Electric Ind Co Ltd 通信装置
US7098833B2 (en) * 2004-06-04 2006-08-29 Texas Instruments Incorporated Tri-value decoder circuit and method
US7573399B2 (en) * 2005-06-01 2009-08-11 Global Traffic Technologies, Llc Multimode traffic priority/preemption vehicle arrangement
US7307547B2 (en) * 2005-06-01 2007-12-11 Global Traffic Technologies, Llc Traffic preemption system signal validation method
US7333028B2 (en) * 2005-06-01 2008-02-19 Global Traffic Technologies, Llc Traffic preemption system communication method
US7417560B2 (en) * 2005-06-01 2008-08-26 Global Traffic Technologies, Llc Multimode traffic priority/preemption intersection arrangement
US7515064B2 (en) * 2005-06-16 2009-04-07 Global Traffic Technologies, Llc Remote activation of a vehicle priority system
US7432826B2 (en) * 2005-06-16 2008-10-07 Global Traffic Technologies, Llc Traffic preemption system with headway management
US7873132B2 (en) * 2005-09-21 2011-01-18 Hewlett-Packard Development Company, L.P. Clock recovery
US7991080B2 (en) * 2006-07-20 2011-08-02 Broadcom Corporation RFID decoding subsystem with decode module
EP3379764B1 (fr) 2017-03-22 2019-07-17 Kabushiki Kaisha Toshiba Dispositif à semi-conducteur

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3836956A (en) * 1972-12-12 1974-09-17 Robertshaw Controls Co Method and apparatus for decoding biphase signals
US4146743A (en) * 1976-08-09 1979-03-27 Hewlett-Packard Company Adaptive sampling decoder-encoder apparatus and method
US4080572A (en) * 1976-11-24 1978-03-21 Westinghouse Electric Corporation Receiver and method for synchronizing and detecting coded waveforms
FR2377729A1 (fr) * 1977-01-14 1978-08-11 Thomson Csf Dispositif de decodage de signaux numeriques, et systeme comportant un tel dispositif
US4092491A (en) * 1977-04-04 1978-05-30 Bell Telephone Laboratories, Incorporated Differential encoding and decoding scheme for digital transmission systems
IT1126782B (it) * 1977-06-28 1986-05-21 Rai Radiotelevisione Italiana Metodo e dispositivo atto a ridurre la probabilita' di perdita di un carattere in una trasmissione numerica utilizzante la codifica bifase
US4146841A (en) * 1977-09-28 1979-03-27 Harris Corporation Technique for combatting jitter in multiple phase transmission system
US4167760A (en) * 1978-03-28 1979-09-11 Ampex Corporation Bi-phase decoder apparatus and method
US4313206A (en) * 1979-10-19 1982-01-26 Burroughs Corporation Clock derivation circuit for double frequency encoded serial digital data
US4320525A (en) * 1979-10-29 1982-03-16 Burroughs Corporation Self synchronizing clock derivation circuit for double frequency encoded digital data
US4361895A (en) * 1980-07-28 1982-11-30 Ontel Corporation Manchester decoder
US4592072B1 (en) * 1982-05-07 1994-02-15 Digital Equipment Corporation Decoder for self-clocking serial data communications
US4513427A (en) * 1982-08-30 1985-04-23 Xerox Corporation Data and clock recovery system for data communication controller
US4603322A (en) * 1982-09-27 1986-07-29 Cubic Corporation High-speed sequential serial Manchester decoder
US4562582A (en) * 1983-04-18 1985-12-31 Nippon Telegraph & Telephone Public Corporation Burst signal receiving apparatus
FR2605473A1 (fr) * 1986-10-15 1988-04-22 Hewlett Packard France Sa Procede et appareil de codage et de decodage d'informations binaires
US4881059A (en) * 1987-04-30 1989-11-14 American Telephone And Telegraph Company Manchester code receiver
US4868569A (en) * 1987-12-15 1989-09-19 Schlumberger Well Services Biphase digital look-ahead demodulating method and apparatus

Also Published As

Publication number Publication date
EP0493501B1 (fr) 1996-09-25
US4992790A (en) 1991-02-12
EP0493501A1 (fr) 1992-07-08
WO1991004625A1 (fr) 1991-04-04
AU6502690A (en) 1991-04-18
NO921051D0 (no) 1992-03-18
NO921051L (no) 1992-03-19
DE69028709D1 (de) 1996-10-31
CA2066037C (fr) 2000-11-07
CA2066037A1 (fr) 1991-03-20

Similar Documents

Publication Publication Date Title
NO303759B1 (no) Fremgangsmate og apparat til bifasedemodulasjon med digital faselöst slaayfe
US11063741B2 (en) Phase control block for managing multiple clock domains in systems with frequency offsets
US4756011A (en) Digital phase aligner
US4010323A (en) Digital timing recovery
US6959058B2 (en) Data recovery apparatus and method for minimizing errors due to clock skew
US5216554A (en) Digital phase error estimator
US4218770A (en) Delay modulation data transmission system
US3529290A (en) Nonredundant error detection and correction system
US8611487B2 (en) Enhanced phase discriminator for fast phase alignment
CA2059922A1 (fr) Reconnaissance des synchroniseurs initiaux et detection de synchronisations dans les systemes a reponse partielle
US7069481B2 (en) Data recovery circuit for minimizing power consumption by non-integer times oversampling
US4472686A (en) Circuit for reproducing and demodulating modulated digital signals
US3238459A (en) Unambiguous local phase reference for data detection
US4330862A (en) Signal characteristic state detector using interval-count processing method
JP2597872B2 (ja) ブロック同期方式
WO1984004863A1 (fr) Decodeur manchester
US4034348A (en) Apparatus, including delay means, for sampling and recovering data recorded by the double transition recording technique
US7317777B2 (en) Digital adaptive control loop for data deserialization
NO800322L (no) System til aa motta frekvensmodulerte digitale informasjonssignaler
US5394442A (en) Optical communications transmitter and receiver
US5510786A (en) CMI encoder circuit
DK152474B (da) Fremgangsmaade og apparat til synkronisering af et binaert datasignal
US7752506B1 (en) FIFO memory error circuit and method
NO134080B (fr)
DK143628B (da) Asynkron digital detektor

Legal Events

Date Code Title Description
MM1K Lapsed by not paying the annual fees

Free format text: LAPSED IN MARCH 2002