NO20030439D0 - Sikker programmerbar logisk enhet - Google Patents
Sikker programmerbar logisk enhetInfo
- Publication number
- NO20030439D0 NO20030439D0 NO20030439A NO20030439A NO20030439D0 NO 20030439 D0 NO20030439 D0 NO 20030439D0 NO 20030439 A NO20030439 A NO 20030439A NO 20030439 A NO20030439 A NO 20030439A NO 20030439 D0 NO20030439 D0 NO 20030439D0
- Authority
- NO
- Norway
- Prior art keywords
- programmable logic
- logic device
- secure programmable
- secure
- programmable
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/76—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in application-specific integrated circuits [ASIC] or field-programmable devices, e.g. field-programmable gate arrays [FPGA] or programmable logic devices [PLD]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
- G06F12/1425—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
- G06F12/1433—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block for a module or a part of a module
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/60—Protecting data
- G06F21/606—Protecting data by securing the transmission between two devices or processes
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/74—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information operating in dual or compartmented mode, i.e. at least one secure mode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
- G06F21/79—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17748—Structural details of configuration resources
- H03K19/17768—Structural details of configuration resources for security
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2221/00—Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/21—Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/2105—Dual mode as a secondary aspect
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2221/00—Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/21—Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/2143—Clearing memory, e.g. to prevent the data from being stolen
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Computer Security & Cryptography (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Computing Systems (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Health & Medical Sciences (AREA)
- Bioethics (AREA)
- General Health & Medical Sciences (AREA)
- Semiconductor Integrated Circuits (AREA)
- Storage Device Security (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/627,351 US6331784B1 (en) | 2000-07-28 | 2000-07-28 | Secure programmable logic device |
PCT/US2001/040935 WO2002011289A1 (en) | 2000-07-28 | 2001-06-11 | Secure programmable logic device |
Publications (2)
Publication Number | Publication Date |
---|---|
NO20030439L NO20030439L (no) | 2003-01-28 |
NO20030439D0 true NO20030439D0 (no) | 2003-01-28 |
Family
ID=24514291
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NO20030439A NO20030439D0 (no) | 2000-07-28 | 2003-01-28 | Sikker programmerbar logisk enhet |
Country Status (10)
Country | Link |
---|---|
US (1) | US6331784B1 (no) |
EP (1) | EP1307966A1 (no) |
JP (1) | JP2004505534A (no) |
KR (1) | KR20030022872A (no) |
CN (1) | CN1444799A (no) |
AU (1) | AU2001275528A1 (no) |
CA (1) | CA2415177A1 (no) |
NO (1) | NO20030439D0 (no) |
TW (1) | TW510080B (no) |
WO (1) | WO2002011289A1 (no) |
Families Citing this family (57)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7681043B1 (en) | 2002-05-08 | 2010-03-16 | Broadcom Corporation | System and method for configuring device features via programmable memory |
US7810152B2 (en) | 2002-05-08 | 2010-10-05 | Broadcom Corporation | System and method for securely controlling access to device functions |
US20030056116A1 (en) * | 2001-05-18 | 2003-03-20 | Bunker Nelson Waldo | Reporter |
US6466048B1 (en) * | 2001-05-23 | 2002-10-15 | Mosaid Technologies, Inc. | Method and apparatus for switchably selecting an integrated circuit operating mode |
US7463739B2 (en) * | 2001-08-02 | 2008-12-09 | Safenet, Inc. | Method and system providing improved security for the transfer of root keys |
JP2003058426A (ja) * | 2001-08-21 | 2003-02-28 | Sony Corp | 集積回路およびその回路構成方法ならびにプログラム |
US6525557B1 (en) * | 2001-11-02 | 2003-02-25 | Xilinx, Inc. | Method for watermarking a register-based programmable logic device core |
US7162644B1 (en) | 2002-03-29 | 2007-01-09 | Xilinx, Inc. | Methods and circuits for protecting proprietary configuration data for programmable logic devices |
US7112994B2 (en) * | 2002-07-08 | 2006-09-26 | Viciciv Technology | Three dimensional integrated circuits |
US20040004251A1 (en) * | 2002-07-08 | 2004-01-08 | Madurawe Raminda U. | Insulated-gate field-effect thin film transistors |
US7064018B2 (en) * | 2002-07-08 | 2006-06-20 | Viciciv Technology | Methods for fabricating three dimensional integrated circuits |
US20040004239A1 (en) * | 2002-07-08 | 2004-01-08 | Madurawe Raminda U. | Three dimensional integrated circuits |
US7673273B2 (en) * | 2002-07-08 | 2010-03-02 | Tier Logic, Inc. | MPGA products based on a prototype FPGA |
US7129744B2 (en) * | 2003-10-23 | 2006-10-31 | Viciciv Technology | Programmable interconnect structures |
US7312109B2 (en) * | 2002-07-08 | 2007-12-25 | Viciciv, Inc. | Methods for fabricating fuse programmable three dimensional integrated circuits |
US20040018711A1 (en) * | 2002-07-08 | 2004-01-29 | Madurawe Raminda U. | Methods for fabricating three dimensional integrated circuits |
US6992503B2 (en) * | 2002-07-08 | 2006-01-31 | Viciciv Technology | Programmable devices with convertibility to customizable devices |
US7064579B2 (en) * | 2002-07-08 | 2006-06-20 | Viciciv Technology | Alterable application specific integrated circuit (ASIC) |
US6714041B1 (en) * | 2002-08-30 | 2004-03-30 | Xilinx, Inc. | Programming on-the-fly (OTF) |
US7180776B1 (en) | 2002-08-30 | 2007-02-20 | Xilinx, Inc. | Systems and methods for programming a secured CPLD on-the-fly |
US7197647B1 (en) | 2002-09-30 | 2007-03-27 | Carnegie Mellon University | Method of securing programmable logic configuration data |
US8643162B2 (en) | 2007-11-19 | 2014-02-04 | Raminda Udaya Madurawe | Pads and pin-outs in three dimensional integrated circuits |
US7812458B2 (en) * | 2007-11-19 | 2010-10-12 | Tier Logic, Inc. | Pad invariant FPGA and ASIC devices |
US7042756B2 (en) * | 2002-10-18 | 2006-05-09 | Viciciv Technology | Configurable storage device |
US7030651B2 (en) | 2003-12-04 | 2006-04-18 | Viciciv Technology | Programmable structured arrays |
US7176713B2 (en) * | 2004-01-05 | 2007-02-13 | Viciciv Technology | Integrated circuits with RAM and ROM fabrication options |
DE102004001669B4 (de) * | 2004-01-12 | 2008-06-05 | Infineon Technologies Ag | Konfigurierbares Logikbauelement ohne lokalen Konfigurationsspeicher mit parallelem Konfigurationsbus |
KR100564611B1 (ko) * | 2004-02-14 | 2006-03-29 | 삼성전자주식회사 | 하드 디스크 드라이브의 완충 구조체 |
JP4294514B2 (ja) * | 2004-03-05 | 2009-07-15 | シャープ株式会社 | 半導体装置および電子装置 |
CA2462495A1 (en) * | 2004-03-30 | 2005-09-30 | Dspfactory Ltd. | Method and system for protecting content in a programmable system |
TWI241492B (en) * | 2004-05-13 | 2005-10-11 | Sunplus Technology Co Ltd | Method and chips being able to expand I/O pins of chip |
US7489164B2 (en) * | 2004-05-17 | 2009-02-10 | Raminda Udaya Madurawe | Multi-port memory devices |
JP4191170B2 (ja) | 2004-07-23 | 2008-12-03 | Necエレクトロニクス株式会社 | プログラム可能なゲートアレイのコピー防止方法及びシステム |
US7164611B2 (en) * | 2004-10-26 | 2007-01-16 | Micron Technology, Inc. | Data retention kill function |
WO2006109738A1 (ja) * | 2005-04-07 | 2006-10-19 | Matsushita Electric Industrial Co., Ltd. | 回路構築装置 |
US7581117B1 (en) | 2005-07-19 | 2009-08-25 | Actel Corporation | Method for secure delivery of configuration data for a programmable logic device |
US7437584B2 (en) * | 2006-02-27 | 2008-10-14 | Atmel Corporation | Apparatus and method for reducing power consumption in electronic devices |
US7486111B2 (en) * | 2006-03-08 | 2009-02-03 | Tier Logic, Inc. | Programmable logic devices comprising time multiplexed programmable interconnect |
US8301890B2 (en) * | 2006-08-10 | 2012-10-30 | Inside Secure | Software execution randomization |
US7613907B2 (en) * | 2006-08-11 | 2009-11-03 | Atmel Corporation | Embedded software camouflage against code reverse engineering |
US7984301B2 (en) * | 2006-08-17 | 2011-07-19 | Inside Contactless S.A. | Bi-processor architecture for secure systems |
US7554865B2 (en) * | 2006-09-21 | 2009-06-30 | Atmel Corporation | Randomizing current consumption in memory devices |
US7635988B2 (en) * | 2007-11-19 | 2009-12-22 | Tier Logic, Inc. | Multi-port thin-film memory devices |
US7573294B2 (en) * | 2007-12-26 | 2009-08-11 | Tier Logic, Inc. | Programmable logic based latches and shift registers |
US7602213B2 (en) * | 2007-12-26 | 2009-10-13 | Tier Logic, Inc. | Using programmable latch to implement logic |
US7573293B2 (en) * | 2007-12-26 | 2009-08-11 | Tier Logic, Inc. | Programmable logic based latches and shift registers |
US7795913B2 (en) * | 2007-12-26 | 2010-09-14 | Tier Logic | Programmable latch based multiplier |
US8230375B2 (en) | 2008-09-14 | 2012-07-24 | Raminda Udaya Madurawe | Automated metal pattern generation for integrated circuits |
CN101854243B (zh) * | 2010-04-30 | 2012-12-12 | 株洲南车时代电气股份有限公司 | 一种电路系统设计加密电路及其加密方法 |
US8159265B1 (en) | 2010-11-16 | 2012-04-17 | Raminda Udaya Madurawe | Memory for metal configurable integrated circuits |
US8159266B1 (en) | 2010-11-16 | 2012-04-17 | Raminda Udaya Madurawe | Metal configurable integrated circuits |
US8159268B1 (en) | 2010-11-16 | 2012-04-17 | Raminda Udaya Madurawe | Interconnect structures for metal configurable integrated circuits |
US8719957B2 (en) * | 2011-04-29 | 2014-05-06 | Altera Corporation | Systems and methods for detecting and mitigating programmable logic device tampering |
CN106201352B (zh) * | 2016-07-07 | 2019-11-29 | 广东高云半导体科技股份有限公司 | 非易失性fpga片上数据流文件的保密系统及解密方法 |
CN106648791B (zh) * | 2016-12-29 | 2019-11-05 | 成都多沐汽车工程有限公司 | 数据加载方法及装置 |
CN111506519B (zh) * | 2020-04-22 | 2021-04-27 | 上海安路信息科技股份有限公司 | 为fpga码点分配sram单元的方法及系统 |
CN113296433A (zh) * | 2021-04-28 | 2021-08-24 | 成都秦川物联网科技股份有限公司 | 一种单片机复位方法 |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4852044A (en) | 1985-03-04 | 1989-07-25 | Lattice Semiconductor Corporation | Programmable data security circuit for programmable logic device |
US4812675A (en) | 1987-04-15 | 1989-03-14 | Exel Microelectronics Incorporated | Security element circuit for programmable logic array |
US4972105A (en) | 1989-09-22 | 1990-11-20 | The U.S. Government As Represented By The Director, National Security Agency | Programmable configurable logic memory |
US5251304A (en) * | 1990-09-28 | 1993-10-05 | Motorola, Inc. | Integrated circuit microcontroller with on-chip memory and external bus interface and programmable mechanism for securing the contents of on-chip memory |
GB9121591D0 (en) | 1991-10-11 | 1991-11-27 | Pilkington Micro Electronics | Data security arrangement for semiconductor programmable logic devices |
WO1993010498A1 (en) | 1991-11-12 | 1993-05-27 | Microchip Technology Inc. | Security for on-chip microcontroller memory |
US5465341A (en) * | 1992-10-23 | 1995-11-07 | Vlsi Technology, Inc. | Verifiable security circuitry for preventing unauthorized access to programmed read only memory |
US5349249A (en) | 1993-04-07 | 1994-09-20 | Xilinx, Inc. | Programmable logic device having security elements located amongst configuration bit location to prevent unauthorized reading |
US5450022A (en) | 1994-10-07 | 1995-09-12 | Xilinx Inc. | Structure and method for configuration of a field programmable gate array |
US5640107A (en) | 1995-10-24 | 1997-06-17 | Northrop Grumman Corporation | Method for in-circuit programming of a field-programmable gate array configuration memory |
US5640347A (en) | 1995-10-30 | 1997-06-17 | Myson Technology, Inc. | EEPROM circuit configuration having security function |
US5768372A (en) | 1996-03-13 | 1998-06-16 | Altera Corporation | Method and apparatus for securing programming data of a programmable logic device |
US5970142A (en) | 1996-08-26 | 1999-10-19 | Xilinx, Inc. | Configuration stream encryption |
US5954817A (en) * | 1996-12-31 | 1999-09-21 | Motorola, Inc. | Apparatus and method for securing electronic information in a wireless communication device |
JP4000654B2 (ja) | 1997-02-27 | 2007-10-31 | セイコーエプソン株式会社 | 半導体装置及び電子機器 |
US6100714A (en) * | 1998-01-15 | 2000-08-08 | Ict, Inc. | High density PLD structure with flexible logic built-in blocks |
-
2000
- 2000-07-28 US US09/627,351 patent/US6331784B1/en not_active Expired - Lifetime
-
2001
- 2001-06-11 CA CA002415177A patent/CA2415177A1/en not_active Abandoned
- 2001-06-11 KR KR10-2003-7001064A patent/KR20030022872A/ko not_active Application Discontinuation
- 2001-06-11 CN CN01813482A patent/CN1444799A/zh active Pending
- 2001-06-11 AU AU2001275528A patent/AU2001275528A1/en not_active Abandoned
- 2001-06-11 WO PCT/US2001/040935 patent/WO2002011289A1/en active Application Filing
- 2001-06-11 JP JP2002515705A patent/JP2004505534A/ja not_active Withdrawn
- 2001-06-11 EP EP01942252A patent/EP1307966A1/en not_active Ceased
- 2001-07-12 TW TW090117066A patent/TW510080B/zh not_active IP Right Cessation
-
2003
- 2003-01-28 NO NO20030439A patent/NO20030439D0/no not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
NO20030439L (no) | 2003-01-28 |
JP2004505534A (ja) | 2004-02-19 |
TW510080B (en) | 2002-11-11 |
AU2001275528A1 (en) | 2002-02-13 |
KR20030022872A (ko) | 2003-03-17 |
CA2415177A1 (en) | 2002-02-07 |
EP1307966A1 (en) | 2003-05-07 |
CN1444799A (zh) | 2003-09-24 |
US6331784B1 (en) | 2001-12-18 |
WO2002011289A1 (en) | 2002-02-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FC2A | Withdrawal, rejection or dismissal of laid open patent application |