NO20005675L - Fremgangsmåte og apparatur for et serielt aksessbart minne - Google Patents

Fremgangsmåte og apparatur for et serielt aksessbart minne

Info

Publication number
NO20005675L
NO20005675L NO20005675A NO20005675A NO20005675L NO 20005675 L NO20005675 L NO 20005675L NO 20005675 A NO20005675 A NO 20005675A NO 20005675 A NO20005675 A NO 20005675A NO 20005675 L NO20005675 L NO 20005675L
Authority
NO
Norway
Prior art keywords
accessible memory
serial
serial accessible
memory
accessible
Prior art date
Application number
NO20005675A
Other languages
English (en)
Other versions
NO20005675D0 (no
Inventor
Philip S Ng
Jinshu Sopn
Johnny Chan
Original Assignee
Atmel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Corp filed Critical Atmel Corp
Publication of NO20005675D0 publication Critical patent/NO20005675D0/no
Publication of NO20005675L publication Critical patent/NO20005675L/no

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4096Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/103Read-write modes for single port memories, i.e. having either a random port or a serial port using serially addressed read-write data registers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1039Read-write modes for single port memories, i.e. having either a random port or a serial port using pipelining techniques, i.e. using latches between functional memory parts, e.g. row/column decoders, I/O buffers, sense amplifiers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1048Data bus control circuits, e.g. precharging, presetting, equalising

Landscapes

  • Engineering & Computer Science (AREA)
  • Databases & Information Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
NO20005675A 1998-05-12 2000-11-10 Fremgangsmåte og apparatur for et serielt aksessbart minne NO20005675L (no)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/076,751 US6038185A (en) 1998-05-12 1998-05-12 Method and apparatus for a serial access memory
PCT/US1999/007881 WO1999059154A1 (en) 1998-05-12 1999-04-09 Method and apparatus for a serial access memory

Publications (2)

Publication Number Publication Date
NO20005675D0 NO20005675D0 (no) 2000-11-10
NO20005675L true NO20005675L (no) 2000-11-13

Family

ID=22133966

Family Applications (1)

Application Number Title Priority Date Filing Date
NO20005675A NO20005675L (no) 1998-05-12 2000-11-10 Fremgangsmåte og apparatur for et serielt aksessbart minne

Country Status (12)

Country Link
US (2) US6038185A (no)
EP (1) EP1086465B1 (no)
JP (1) JP2002515628A (no)
KR (1) KR20010042821A (no)
CN (1) CN1171234C (no)
CA (1) CA2322317A1 (no)
DE (1) DE69936524T2 (no)
HK (1) HK1035255A1 (no)
MY (1) MY114637A (no)
NO (1) NO20005675L (no)
TW (1) TW464875B (no)
WO (1) WO1999059154A1 (no)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3471268B2 (ja) * 1999-12-10 2003-12-02 日本電気株式会社 論理回路
FR2805653A1 (fr) * 2000-02-28 2001-08-31 St Microelectronics Sa Memoire serie programmable et effacable electriquement a lecture par anticipation
US6826068B1 (en) 2001-01-18 2004-11-30 Kabushiki Kaisha Toshiba Fast data readout semiconductor storage apparatus
JP2002216483A (ja) 2001-01-18 2002-08-02 Toshiba Corp 半導体記憶装置
CN100444125C (zh) * 2002-08-19 2008-12-17 旺宏电子股份有限公司 串行式输出入测试方法与其测试的存储器组件
JP3717912B2 (ja) * 2003-11-06 2005-11-16 沖電気工業株式会社 インタリーブ装置
US7002873B2 (en) * 2003-12-19 2006-02-21 Intel Corporation Memory array with staged output
US7095247B1 (en) * 2004-03-25 2006-08-22 Lattice Semiconductor Corporation Configuring FPGAs and the like using one or more serial memory devices
US7009886B1 (en) * 2004-07-19 2006-03-07 Silicon Storage Technology, Inc. Integrated circuit memory device with bit line pre-charging based upon partial address decoding
US7027348B2 (en) * 2004-08-17 2006-04-11 Silicon Storage Technology, Inc. Power efficient read circuit for a serial output memory device and method
US6879535B1 (en) * 2004-08-30 2005-04-12 Atmel Corporation Approach for zero dummy byte flash memory read operation
US7589648B1 (en) 2005-02-10 2009-09-15 Lattice Semiconductor Corporation Data decompression
US7265578B1 (en) 2005-04-04 2007-09-04 Lattice Semiconductor Corporation In-system programming of non-JTAG device using SPI and JTAG interfaces of FPGA device
US7397274B1 (en) 2005-04-07 2008-07-08 Lattice Semiconductor Corporation In-system programming of a non-compliant device using multiple interfaces of a PLD
US7656717B2 (en) 2005-09-29 2010-02-02 Hynix Semiconductor, Inc. Memory device having latch for charging or discharging data input/output line
JP4665726B2 (ja) * 2005-11-14 2011-04-06 セイコーエプソン株式会社 印刷装置のコントローラ、印刷装置、コントローラ基板
US7554357B2 (en) * 2006-02-03 2009-06-30 Lattice Semiconductor Corporation Efficient configuration of daisy-chained programmable logic devices
US7570078B1 (en) 2006-06-02 2009-08-04 Lattice Semiconductor Corporation Programmable logic device providing serial peripheral interfaces
US7378873B1 (en) 2006-06-02 2008-05-27 Lattice Semiconductor Corporation Programmable logic device providing a serial peripheral interface
US7495970B1 (en) * 2006-06-02 2009-02-24 Lattice Semiconductor Corporation Flexible memory architectures for programmable logic devices
US7521969B2 (en) * 2006-07-28 2009-04-21 Lattice Semiconductor Corporation Switch sequencing circuit systems and methods
US7456672B1 (en) 2006-09-11 2008-11-25 Lattice Semiconductor Corporation Clock systems and methods
US7511641B1 (en) 2006-09-19 2009-03-31 Lattice Semiconductor Corporation Efficient bitstream compression
US7769909B2 (en) * 2006-12-04 2010-08-03 Atmel Corporation Device and method for access time reduction by speculatively decoding non-memory read commands on a serial interface
US7761633B2 (en) * 2007-01-29 2010-07-20 Microsemi Corp. - Analog Mixed Signal Group Ltd. Addressable serial peripheral interface
US8132040B1 (en) 2007-10-25 2012-03-06 Lattice Semiconductor Corporation Channel-to-channel deskew systems and methods
US7902865B1 (en) 2007-11-15 2011-03-08 Lattice Semiconductor Corporation Compression and decompression of configuration data using repeated data frames
US7660177B2 (en) * 2007-12-21 2010-02-09 Silicon Storage Technology, Inc. Non-volatile memory device having high speed serial interface
JP5291437B2 (ja) 2008-11-12 2013-09-18 セイコーインスツル株式会社 半導体記憶装置の読出回路及び半導体記憶装置
US8255733B1 (en) 2009-07-30 2012-08-28 Lattice Semiconductor Corporation Clock delay and skew control systems and methods
JP5456413B2 (ja) * 2009-08-24 2014-03-26 ローム株式会社 半導体記憶装置
JP5319572B2 (ja) * 2010-02-23 2013-10-16 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー メモリ装置
US9159442B2 (en) * 2011-11-11 2015-10-13 Microchip Technology Incorporated Serial memory with fast read with look-ahead
CN103544991B (zh) * 2012-07-12 2016-06-22 华邦电子股份有限公司 闪存装置及其操作的方法
US11238906B2 (en) * 2020-06-15 2022-02-01 Taiwan Semiconductor Manufacturing Company Limited Series of parallel sensing operations for multi-level cells
CN113392057B (zh) * 2021-06-11 2023-03-14 环荣电子(惠州)有限公司 整合多个地址于单一通道的数据通信方法及其系统

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5289413A (en) * 1990-06-08 1994-02-22 Kabushiki Kaisha Toshiba Dynamic semiconductor memory device with high-speed serial-accessing column decoder
KR100275182B1 (ko) * 1990-12-17 2000-12-15 윌리엄 비. 켐플러 순차 메모리
US5325502A (en) * 1991-05-15 1994-06-28 Micron Technology, Inc. Pipelined SAM register serial output
DE69126962D1 (de) * 1991-05-16 1997-09-04 Ibm Speicheranordnung
JPH06231576A (ja) * 1993-02-04 1994-08-19 Nec Corp 半導体記憶装置
FR2726934B1 (fr) * 1994-11-10 1997-01-17 Sgs Thomson Microelectronics Procede de lecture anticipee de memoire a acces serie et memoire s'y rapportant
JPH08273362A (ja) * 1995-03-30 1996-10-18 Nec Ic Microcomput Syst Ltd 半導体記憶装置

Also Published As

Publication number Publication date
CN1300431A (zh) 2001-06-20
EP1086465A4 (en) 2001-08-08
KR20010042821A (ko) 2001-05-25
MY114637A (en) 2002-11-30
TW464875B (en) 2001-11-21
DE69936524D1 (de) 2007-08-23
WO1999059154A1 (en) 1999-11-18
DE69936524T2 (de) 2008-03-13
NO20005675D0 (no) 2000-11-10
US6038185A (en) 2000-03-14
US6097657A (en) 2000-08-01
EP1086465A1 (en) 2001-03-28
CA2322317A1 (en) 1999-11-18
EP1086465B1 (en) 2007-07-11
JP2002515628A (ja) 2002-05-28
CN1171234C (zh) 2004-10-13
HK1035255A1 (en) 2001-11-16

Similar Documents

Publication Publication Date Title
NO20005675D0 (no) Fremgangsmåte og apparatur for et serielt aksessbart minne
GB2364726B (en) Method and apparatus for continuously testing a well
NO20015067D0 (no) Fremgangsmåte og anordning for testing av en brönn
NO976076D0 (no) Fremgangsmåte og innretning for fremstilling av en stent
NO20025830L (no) Fremgangsmåte og anordning for komplettering av en brönn
NO984754D0 (no) FremgangsmÕte og anordning for mÕling i en horisontal kanal
NO972578D0 (no) Fremgangsmåte og anordning for forsegling
NO994599D0 (no) Anordning og fremgangsmaate for prosodigenering av visuell syntese
NO982338L (no) FremgangsmÕte og anordning for plassering av en plugg
NO994285L (no) Innretning og fremgangsmaate for aa danne et innlöp i en enhet
GB2342454B (en) Pipe testing apparatus and method
NO20011970D0 (no) Fremgangsmåte og anordning for posisjonering av et tog
NO983282D0 (no) Anordning og fremgangsmate for trykkmÕling
DE69718846D1 (de) Verfahren zum Speicherzugriff
NO993236D0 (no) FremgangsmÕte og innretning for oppvarming av en komponent
NO952911D0 (no) Fremgangsmåte for utlesing av et gyroapparat og et denne fremgangsmåte utnyttede gyroapparat
IS1811B (is) Aðferð og vél til beitingar á önglum
NO980767L (no) Anordning og fremgangsmåte for separasjon av fluider
NO994152D0 (no) Fremgangsmåte og innretning for bestemmelse av avstander
DE19982723T1 (de) System und Verfahren zum Ändern der A-Nummer
NO983248L (no) Fölefremgangsmåte og apparatur
NO980969D0 (no) Framgangsmåte og anordning for avföling av aksellerasjon
IS5262A (is) Aðferð og búnaður til vigtunar
NO305872B1 (no) FremgangsmÕte og anordning for installasjon av ankere i en havbunn
NO994244D0 (no) FremgangsmÕte og anordning for separering av et fluid i en brönn

Legal Events

Date Code Title Description
FC2A Withdrawal, rejection or dismissal of laid open patent application