NL9401923A - Werkwijze en inrichting voor het in een veiligheidssysteem verwerken van signalen. - Google Patents

Werkwijze en inrichting voor het in een veiligheidssysteem verwerken van signalen. Download PDF

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Publication number
NL9401923A
NL9401923A NL9401923A NL9401923A NL9401923A NL 9401923 A NL9401923 A NL 9401923A NL 9401923 A NL9401923 A NL 9401923A NL 9401923 A NL9401923 A NL 9401923A NL 9401923 A NL9401923 A NL 9401923A
Authority
NL
Netherlands
Prior art keywords
memories
operations
signals
complementary
state machines
Prior art date
Application number
NL9401923A
Other languages
English (en)
Dutch (nl)
Inventor
Hendrik Christiaan Steinz
Johannes Roland Dassel
Original Assignee
Gti Holding Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gti Holding Nv filed Critical Gti Holding Nv
Priority to NL9401923A priority Critical patent/NL9401923A/nl
Priority to EP95935610A priority patent/EP0740812A1/en
Priority to US08/676,194 priority patent/US5822514A/en
Priority to PCT/NL1995/000354 priority patent/WO1996016369A1/en
Priority to JP8516749A priority patent/JPH09512370A/ja
Priority to MYPI95003287A priority patent/MY112014A/en
Publication of NL9401923A publication Critical patent/NL9401923A/nl
Priority to NO962866A priority patent/NO962866L/no

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1497—Details of time redundant execution on a single processing unit

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Safety Devices In Control Systems (AREA)
  • Selective Calling Equipment (AREA)
NL9401923A 1994-11-17 1994-11-17 Werkwijze en inrichting voor het in een veiligheidssysteem verwerken van signalen. NL9401923A (nl)

Priority Applications (7)

Application Number Priority Date Filing Date Title
NL9401923A NL9401923A (nl) 1994-11-17 1994-11-17 Werkwijze en inrichting voor het in een veiligheidssysteem verwerken van signalen.
EP95935610A EP0740812A1 (en) 1994-11-17 1995-10-16 A method and a device for processing signals in a protection system
US08/676,194 US5822514A (en) 1994-11-17 1995-10-16 Method and device for processing signals in a protection system
PCT/NL1995/000354 WO1996016369A1 (en) 1994-11-17 1995-10-16 A method and a device for processing signals in a protection system
JP8516749A JPH09512370A (ja) 1994-11-17 1995-10-16 保護システムにおける信号処理方法及び装置
MYPI95003287A MY112014A (en) 1994-11-17 1995-10-31 A method and a device for processing signals in a protection system
NO962866A NO962866L (no) 1994-11-17 1996-07-08 Fremgangsmåte og anordning til behandling av signaler i et sikkerhetssystem

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL9401923A NL9401923A (nl) 1994-11-17 1994-11-17 Werkwijze en inrichting voor het in een veiligheidssysteem verwerken van signalen.
NL9401923 1994-11-17

Publications (1)

Publication Number Publication Date
NL9401923A true NL9401923A (nl) 1996-07-01

Family

ID=19864907

Family Applications (1)

Application Number Title Priority Date Filing Date
NL9401923A NL9401923A (nl) 1994-11-17 1994-11-17 Werkwijze en inrichting voor het in een veiligheidssysteem verwerken van signalen.

Country Status (7)

Country Link
US (1) US5822514A (no)
EP (1) EP0740812A1 (no)
JP (1) JPH09512370A (no)
MY (1) MY112014A (no)
NL (1) NL9401923A (no)
NO (1) NO962866L (no)
WO (1) WO1996016369A1 (no)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19850672C2 (de) * 1998-11-03 2003-07-31 St Microelectronics Gmbh Leitungsfehlerprüfschaltung für ein elektrisches Datenübertragungssystem
US8265920B1 (en) 2004-07-30 2012-09-11 Synopsys, Inc. Determining large-scale finite state machines using constraint relaxation
US7418604B2 (en) * 2004-12-22 2008-08-26 Hewlett-Packard Development Company, L.P. System and method for powering on after verifying proper operation of a charge pump and voltage regulator
US7805629B2 (en) * 2005-03-04 2010-09-28 Netapp, Inc. Protecting data transactions on an integrated circuit bus
US8291063B2 (en) * 2005-03-04 2012-10-16 Netapp, Inc. Method and apparatus for communicating between an agent and a remote management module in a processing system
US8090810B1 (en) 2005-03-04 2012-01-03 Netapp, Inc. Configuring a remote management module in a processing system
US7899680B2 (en) * 2005-03-04 2011-03-01 Netapp, Inc. Storage of administrative data on a remote management device
US7487343B1 (en) 2005-03-04 2009-02-03 Netapp, Inc. Method and apparatus for boot image selection and recovery via a remote management module
US7634760B1 (en) 2005-05-23 2009-12-15 Netapp, Inc. System and method for remote execution of a debugging utility using a remote management module
DE102005061394A1 (de) * 2005-12-22 2007-06-28 Robert Bosch Gmbh Fehlertolerantes Prozessorsystem
US20070240019A1 (en) * 2005-12-29 2007-10-11 International Business Machines Corporation Systems and methods for correcting errors in I2C bus communications

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5991726A (ja) * 1982-11-17 1984-05-26 Hitachi Ltd アレイ・ロジツク冗長化演算方式

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Publication number Priority date Publication date Assignee Title
US3174133A (en) * 1961-05-12 1965-03-16 Leeds & Northrup Co Actuation of on-off outputs from electronic digital computer device
FR1360236A (fr) * 1963-03-20 1964-05-08 Electronique & Radio Ind Perfectionnements aux procédés de détection d'erreurs d'une chaine digitale de calcul et dispositif utilisé
GB1246218A (en) * 1969-04-09 1971-09-15 Decca Ltd Improvements in or relating to data transmission systems
FR2092855A1 (fr) * 1970-06-25 1972-01-28 Jeumont Schneider Dispositif de controle du decodage d'une adresse
US4166272A (en) * 1976-10-12 1979-08-28 Bbc Brown Boveri & Company Limited Process for data transfer with increased security against construction member error
EP0013103B1 (en) * 1978-12-22 1983-06-29 LUCAS INDUSTRIES public limited company Motor vehicle electrical system
US4584666A (en) * 1984-06-21 1986-04-22 Motorola, Inc. Method and apparatus for signed and unsigned bounds check
AU568977B2 (en) * 1985-05-10 1988-01-14 Tandem Computers Inc. Dual processor error detection system
US4740972A (en) * 1986-03-24 1988-04-26 General Signal Corporation Vital processing system adapted for the continuous verification of vital outputs from a railway signaling and control system
US5179689A (en) * 1987-03-13 1993-01-12 Texas Instruments Incorporated Dataprocessing device with instruction cache
JP2613223B2 (ja) * 1987-09-10 1997-05-21 株式会社日立製作所 演算装置
US5535417A (en) * 1993-09-27 1996-07-09 Hitachi America, Inc. On-chip DMA controller with host computer interface employing boot sequencing and address generation schemes

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5991726A (ja) * 1982-11-17 1984-05-26 Hitachi Ltd アレイ・ロジツク冗長化演算方式

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 8, no. 206 (E - 267) 20 September 1984 (1984-09-20) *

Also Published As

Publication number Publication date
US5822514A (en) 1998-10-13
WO1996016369A1 (en) 1996-05-30
MY112014A (en) 2001-03-31
EP0740812A1 (en) 1996-11-06
JPH09512370A (ja) 1997-12-09
NO962866D0 (no) 1996-07-08
NO962866L (no) 1996-07-08

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