NL8615006A - THERMAL DETECTOR SERIES. - Google Patents

Description

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E 2011-250 Ned.G / EvF

Title: Thermal detector series

The present invention relates to improvements in or with respect to thermal detectors, and more particularly to thermal infrared detector arrays. In a thermal detector, the energy of the absorbed incident radiation increases the temperature of each detection element. This increase in temperature causes changes in the temperature dependent properties of the detector, which can be controlled to detect the incident radiation. The thermal detectors of particular interest in the present context include pyroelectric detectors and / or bolometer detectors in the form of a two-dimensional assembly connected to a semiconductor reader for providing a compact, solid state, uncooled thermal memory array imaging and related applications.

There is increasing interest in obtaining a thermal detector operation in large two-dimensional fine distribution arrays (eg arrays of up to or more than 100 x 100 elements with distributions of less than 100 µm), which are the basic physical limits for a thermal detector. This operation is determined, for example, in terms of the signal-to-noise ratio of the detector assembly. To achieve this operation, it is necessary to first maximize the signal from the device (response sensitivity) by optimizing the device structure and by selecting suitable detector materials (i.e., choosing a material with a high response sensitivity behavior), by optimizing the electronic readout design and minimizing all noise sources related to, for example, the dielectric loss of the detector material, and noise sources in the electronic readout circuits. However, once these noise sources are sufficiently reduced, a fundamental physical limit noise is approximated, which is determined by the thermal conductance of the structure and the efficiency of radiation collection and absorption in the pixels. This limit noise behavior, called the thermal fluctuation noise limit, is given by the following expression.

μ

Thermal Fluctuation Noise = / 4KT2G V 35 Equivalent Power \ "J * ~) where G is the total thermal conductance of an element in the series, n is the efficiency of radiation collection and absorption in the element's pixel area, K is the Boltzmann constant and T is the absolute temperature.

.8615006 -2-

It can further be indicated that the electrical contribution to the thermal fluctuation noise equivalent power is proportional to

Vt where YD is the thermal admittance of an element in the series, of which n is 5 one part jwC, where w is the operating angle frequency of the device and n

C is the thermal capacity of the element. This expression implies that small thicknesses for the detector elements are required such that wC

J1 is less than or equal to the thermal conductance, the real part of Y, in the operating frequency range. In practice, total thermal conductivity values of less than 0.2 W.au K are required, with radiation collection and absorption efficiencies approaching one for element distances of or less than 100 µm and element thicknesses of less than 15 µm (preferably less than 8 µm) so that the thermal fluctuation noise limit still provides a useful device operation, for operating frequencies in the 10 to 50 Hz. range. For other frequencies, the preferred thickness varies inversely with the frequency.

A pyroelectric detector, which exhibits an improved Noise Equivalent Power operation, is described in British Patent Application GB 2,100,058 (1982). As described therein, a thermal detecting element is mounted adjacent to a larger area absorber, and is elastically supported by one or more flexible films. Electrical connection is provided by conductors that extend laterally on the interior surfaces of the films. While this construction may extend longitudinally in the form of a one-dimensional array, the aforementioned need for lateral extension generally excludes an embodiment in finely divided two-dimensional form.

A two-dimensional integrated detector array is described in U.S. Patent 4,162,420 (1979). In this device, however, the elements are not distributed network-like. The detector face is spaced from, but electrically connected to, a silicon readout circuit by a series of metal rods (10 µm square and 25 µm length). The use of metal materials in this form, along with the lack of a networked distribution, results in a device that exhibits relatively poor thermal insulation and thermal crosstalk between the adjacent elements.

Until now it has been a problem to provide a finely divided, large two-dimensional integrated infrared detector array; a series that exhibits satisfactory thermal insulation and low crosstalk.

The present invention is intended to provide detector structures and also machining methods suitable for large two-dimensional thermal detector arrays, in which a high degree of thermal insulation (low G) is combined with a high radiation collection and absorption efficiency.

According to the invention, there is provided a thermal detector array comprising discrete thermal detector elements arranged in a two-dimensional array, each element supported on one side of a layer of elastic material having a low thermal conductivity, which layer is also acts as a separation between the 10 elements, an opposite side of the layer carries a common electrode structure, which communicates with each element and provides interconnections between them by means of electrically conductive tracks with high thermal resistance, each element has an element leakage trode, which communicates with an inwardly facing surface of the element, each element electrode is connected by means of a connection element to an input circuit of a semiconductor substrate such that the connection elements provide support for the layer relative to the substrate, and each element has a associated radiation absorber.

The connecting elements may have a low thermal conductivity. They can be placed in position between the respective elements and the substrate. Alternatively, the bonding elements can be placed adjacent to the sides of the respective elements, extending directly between the substrate and the layer.

In accordance with the invention, methods for the above are also provided. Such structures mentioned above can be made by processing bulk layers of detector material or can be made by thin film techniques.

These improved structures and processes are suitable for dielectric bolometer and pyroelectric detector arrays, using single crystal or ceramic ferroelectric oxide materials such as: barium strontium titanate; lead magnesium niobate; lead scandium tantalate; lead zerniobate / lead zero tungsten framework; and lead zirconate / lead zerniobate.

The complete physical separation of the detector elements from the thermal detector material in the series ensures low thermal conductance and low thermal crosstalk between the elements.

The support layer is preferably made of polymer material.

Polymer materials are well suited for the backing layer, as well as for any other purpose, involving a mechanical bond or .80150 * 6 -4- backing, but also requiring the provision of low thermal conductivity. Polymeric materials, which are generally insulating materials of complex molecular structure and often used to provide an amorphous rather than a crystalline solid, exhibit the lowest ambient temperature thermal conductivity values of all classes of solids, as shown in the table below:

Thermal conductivity range Material class W.M ^ .K * 10 Metals 10-400

Semiconductors 1-200

Crystalline inorganic solids 2-200

Amorphous Inorganic Solids 0.8-2.0 15 Organic Polymers 0.1-0.4

A preferred polymeric material class for the backing layer is the polyimide family of high temperature polymers. Among them should be found examples which have hitherto been extensively developed as passive and dielectric interlayer coatings for application to silicon integrated circuits. A specific example of a polyimide material, which has been successfully demonstrated herein, is the so-called "PIQ" polyimide manufactured by Hitachi. The use of a polyimide material for a support film, which is strong and flexible with a high transition temperature and good adhesion to metal and oxide surfaces, is fully compatible with the above-mentioned ferroelectric materials and with the flip chip solder joint, a technique which is preferred for the present purpose. Polyimide films are applied by rotary coating (spin coating) and cured between 300 and 350 ° C. Coating thicknesses in the range 0.2 to 2.0 µm are workable, while submicron coatings are preferred. The difference in thermal expansion coefficients of the polyimide film and the ferroelectric oxide materials forming the detector elements (v50 ppm.K ^ or <10 ppm.K puts the support film under a slightly positive voltage after cooling after the curing step. This keeps the film tensed after network formation and results in a weak microphonic effect Other possible polymeric materials for use as a support film include, 8615006-5 polyamides and polyurethanes (including UV curable types) and vapor-deposited polymers (eg parylene).

The use of a full discrete element structure, mounted on a polymeric support layer, which is under a small tension, ensures a very weak microphonic response. Some degree of piezoelectric action is inherent in the pyroelectric and dielectric bolometer materials under the influence of the applied bias field, and detector designs should be designed to minimize this undesired response mode.

The aforementioned radiation absorber structure may be formed from a thin metal resistance film having an impedance (377-Λ10) matched to the impedance of the free space, which can also serve as the common electrode. Such a film will absorb 50% of the incident broad band radiation. Anti-reflective coatings 15 can be added to increase the efficiency of absorption over a more limited waveband. The use of an electrode layer acting as a reflective metal element on the opposite side of the detector element, together with the knowledge of the infrared optical properties of the materials in the structure and control of the thickness of the detector element, can be used to increase the absorption efficiency in the band of interest. Yields of 0.6 to 0.8 in the 8-14 µm infrared band are achievable for such multi-layer structures. Preferred absorber layer structures, however, contain a metal black layer, such as platinum black, which exhibit an absorption efficiency close to one in a structure of very low thermal mass.

Although the absorbers can have the same surface as the associated detector elements, the absorber and detector surfaces in reticulated detector array structures can be varied independently. Indeed, the independent nature of these two structures can be exploited to obtain a high radiation collection and absorption efficiency, combined with a high degree of thermal insulation of the detector elements.

Preferred electrode materials, especially for interconnection traces between the elements and with the element terminals, contain 35 metals, metal alloys, cermet (ceramic and metal alloy) and amorphous metal alloys, which have high thermal resistance, good adhesion to other materials in the structure and can be modeled to provide narrow tracks. Examples include anodized chrome, and nickel-chrome alloy metal .8015006-6 films, chrome-silica cermet films, and nickel-indium amorphous metal films. Such films, of which a small thickness (eg 10 to 30 µm) and a small width (eg 2 to 10 µm) are required, can be deposited by a variety of thermal deposition techniques, which filament and electron beam evaporation or by sputtering. Sputtering processes, and especially magnetron sputtering processes, are preferred. An electrode containing any of the above-mentioned metals with a coating of an inert metal with a high electrical conductivity, such as gold, is generally required for the deposition of metal black, such as platinum black. The high conductivity inert metal can be removed from the element bonding traces after black deposition to remove the associated thermal shunt. Gaps or "holes" in the polymer backing film over the elements are desired to ensure good thermal contact between the absorber 15 and the detector element. If a thin film, impedance adjusted, absorber structure is used, the polymer backing film can also serve as an anti-reflective coating for the absorber.

Figure 1 is an illustrative cross-sectional view of an integrated thermal detector array in accordance with the present invention; Figure 2 is a detailed cross-sectional view of a pixel component of the array of Figure 1, showing in detail the structure of the connector element thereof; Figure 3 is an illustrative cross-sectional view of an integrated thermal detector array, which is another embodiment of the invention; Figures 4 and 5 show a cross-sectional and top view, respectively, of a part of a preferred embodiment of the series shown in the previous figure; Figures 6 and 7 are schematic cross-sectional views of the arrays shown in the preceding figures, showing construction and mounting details for bulk material processing; and Figures 8 and 9 are schematic cross-sectional views of a preferred shape and array according to the thin film technique.

In order to better understand the invention, embodiments thereof will be described below by way of example, with reference being made to the aforementioned accompanying drawings.

Figure 1 shows an integrated thermal detector array. It contains a large number of discrete thermal detector elements 1, which are arranged in series positions at intervals by means of an elastic support layer 3 of a material with low thermal conductivity. The latter provides sufficient support and mechanical reliability for the assembly. An inwardly facing surface of the layer 3 extends a common electrode structure 5, which provides interconnection between the elements by means of electrically conductive connections with high thermal resistance 7. The opposite side of element 1 carries an individual element electrode 9. The supported element array structure is placed on a semiconductor substrate 11, and connecting elements 13, which also provide support and electrical connection, are included between each element 1 and the substrate 11. These provide electrical passage between the element electrodes 9 and the associated electrodes. input contacts 15 of the readout circuit integrated in the substrate 11. On the opposite surface of the layer 3, a coating 17 of thermal absorption material is provided for each detector element 1. Thermal contact between each element 1 and absorber 17 is provided, effective thermal conduction is provided over the support (layer) or through metal-filled openings in the support (network).

As shown in Figure 2, each connecting element has a composite structure and is placed under each element 1. This combines the conflicting requirements of electrical interconnection with thermal insulation. This composite structure can be realized, for example, by providing a mesa 19 of a material with a low thermal conductivity, such as a polymer, directly under the detector 1, and applying a thin metal track 21 with high thermal resistance to it. the top of the mesa 19. The metallized polymer mesa 19 is then connected to and electrically connected to the input contact 15 of the readout substrate 11, for example, by providing a solder bond 23 and surface metal layers 25, 27. This structure can also be used in inverse form, i.e. with the solder joint 23 adjacent to the thermal detector element 1 and the polymer mesa 19 adjacent to the read substrate 11. However, this structure is less favorable since the solder joint 23 now acts as a thermal load on the detector element 1 and the response operation correspondingly decreases.

A range of polymeric materials can be selected to form the mesa 19. Polyimide materials are particularly suitable for the inverse form of the mesa structure, in which the mesa 19 on the side of the sub-8 £ 13 G9 δ t -8- street 11 is placed. Polyimide materials are less suitable for the original mesa structure, because the curing cycle involved may cause some difficulties in the process sequence of the device. The use of a Novolac photosensitive resin, which can be modeled and then smooth-cured to form a mesa 19 with a rounded edge profile to facilitate subsequent metallization, is preferred for the structure of Figure 2. A radiation (ÜV , X-ray or electron beam) or chemical (eg immersion in acidified formaldehyde solution) stabilization treatment for cross-linking the Novolac resin and stabilizing the mesa dimensions before applying the metal layer and the final solder joint is in this case desirable .

The use of a clump connection structure, in which the connections 13 are placed under each element 1, means that the element itself 15 can fill a large part of the available pixel area. It can be shown that an optimized compromise between pixel fill factor (i.e. radiation capture efficiency) and thermal crosstalk between adjacent elements 1 is obtained, for equal areas of absorber 17 and element 1, at an element to spacing ratio of 4: 1, 20 watts is equivalent to a radiation capture efficiency of 0.64, and that the use of a stretched surface platinum black collector (see Figure 4) and / or stretched surface collector (XAC) structures may further provide a significant improvement in the capture efficiency without compromising to the thermal insulation. A collection and absorption efficiency of about 0.9 can be provided by such means, especially for structures with distributions of or less than 100 µm.

An alternative array structure is shown in Figure 3. Thermal insulation of the element 1 from the readout circuit substrate (the dominant heat sink in each structure) and between adjacent elements 1 in this example is obtained simultaneously by a polymer band support network 3 around each element 1. The individual elements 1 in this structure are smaller than in the clump connection structure (Figure 1) and the polymer support network 3 is correspondingly longer. The connections 13, which provide the electrical connection of the element-35 electrodes 9 to the readout circuits 15, are placed against the support network 3, and it is no longer essential to include additional thermal barrier structures (mesas) in the connection 13, as was done in the clump connection structure. In this structure, the total thermal conductivity is adjusted with respect to .80 * 5006 -9 radiation capture efficiency (in the case where the surfaces of the element 1 and the absorber 17 are equal) and an optimum element diameter is about 0.6 of the pixel width, which gives a pixel fill factor (or radiation reception efficiency) of approximately 0.35. The values for the total and lateral thermal conductivity for this polymer membrane structure are considerably smaller than for the clump connection structure (Figure 1) at a given distribution and for practical structure geometries. This can then provide a superior utmost furnishing action, provided the radiation collection efficiency can be increased.

A preferred embodiment of the membrane-mounted two-dimensional thermal detector array structure includes an extended surface platinum black collector 17 '(PB-XAC), as shown in Figure 4. A particular point to note is that this preferred structure has truncated element angles (which gives octagonal instead of square elements 15). This increases the length of the thin metal film track 29 connecting each element electrode 9 to each connection terminal 13 to the readout circuit 15, providing a further increase in thermal insulation, with minimal loss of absorber surface. This thin film track 29 extends from the element electrode 9 over the polymer 20 insulation 31 to the point where the connections 13 are made. The use of four common electrode terminals 7 should also be noted. While two connections per element 1, plus additional connections at the end of each element row, are sufficient for the entire common connection, some excess 25 is useful in the fine track geometries desired in this fine distribution structure. The use of three or four common connections 7 is therefore desirable. Again, the flip chip connection was chosen as the preferred method of making the connections 13 between the array and the electronic readout circuit 15. This technique is particularly suitable for the membrane-mounted structure, since the solder bonding process has no imposed mechanical pressure (as required in a solid phase bonding process such as indium bonding), which would be incompatible with the bonding position on the flexible polymer film. The solder bonding process relies on the natural wetting action of molten solder on the metal layers 25, 27 to be wetted provided on the two components to form the joints 13. The position ratio of the solder joint, with a joint height adapted to the diameter of the contact to be wetted with solder, ensures that the thermal detector element 1 is physically separated from the readout circuit substrate 11, provided that the element thickness is smaller. than the height of the solder joint. This connection geometry requirement is compatible with the need for very small element thicknesses.

Process examples for the fabrication of thermal detector-5 arrays with the previously described structures are now contemplated. These methods, while containing certain new features, are not necessarily the only methods or sequence of methods by which such arrays can be fabricated. Methods suitable for detector arrays made from bulk ferroelectric materials and ferroelectric films deposited on ferroelectric films will be described.

Particular features include selective thinning and network distribution of elements, novel structures to provide mechanical support for the arrays, and hybrid device alignment methods.

The structures of two-dimensional thermal detector arrays of the lump compound and of the polymer membrane mounted type, made of thinned bulk materials, are shown in Figures 6 and 7. These Figures show the edges of the array structure as well as part of the array area itself. The edges of the device structure 20 include a relatively thick, irregular "image frame" edge 33 around the entire detector array. This edge provides a sufficiently rigid mechanical support frame for the polymer support or membrane film 3. It also provides an area for the device structure that may be touched during assembly, and a location for placing one or more rows of solder joints 35 with a considerably larger diameter than that of the solder joints 23 in the array itself. These solder joints 35 are provided to automatically align the hybrid device structure during the joining process, in particular to align the series of small diameter series element joints 23 with respect to the substrate 11.

A possible manufacturing sequence for devices shown in Figures 6 and 7 is the orientation, cutting, cutting and polishing of the ferroelectric bulk material, either in the single crystal or polycrystalline ceramic form, to provide a wafer with parallel sides with the desired thickness for the non-regular edge 33 of the device. The area from which the reticular array is to be fabricated is then selectively thinned to the final device thickness. Suitable selective thinning techniques may include various wet and dry etching processes, for example, optically enhanced chemical etching or ion beam etching, depending on the material and its crystal form. Ion beam etching has the advantage of being a relatively universal etching method, and is therefore preferred in many cases. The areas not to be thinned are suitably shielded from the etchants, for example, by means of a metal foil mask or a photosensitive layer according to the etching procedure.

The different layers required for the incident radiation side 37 of the device are then provided in recesses. This will usually contain an etch prevention layer for the subsequent network formation, the polymer backing film or membrane layer 3, the common electrode layers 5 and the infrared absorber structure 17. The wafer is then inverted and the element electrodes 9 and network mask layers applied. Networked distribution is preferably performed by an anisotropic etching process, such as ion beam etching or reactive ion etching. Suitable mask materials and etch inhibiting layers can be selected with regard to the respective material to be etched, the respective etching process and the relevant geometry. A set of recesses 39 may be etched below the device support edge 33 simultaneously with the meshing of the element array, for later incorporation of larger diameter alignment solder joints 35. Etched recesses 39 are particularly suitable for the membrane-mounted structure, as shown in Figure 7. If the solder joints 23, 35 are located on the silicon read chip half of the final hybrid device, then these recesses can also help in the mechanical alignment of the components prior to fusing the solder to complete the connection of the hybrid device. Once the network formation is complete, the etching barrier layer secures the underlying polymer support or membrane film 3. The 30-barrier barrier layer which has served its purpose can then be removed as desired.

After the network formation is completed, the different layers required for the element connection side of the structure are added.

These may include polymer insulator 31, element electrode 9 and polymer 35 mesa layers 19, element readout bonding tracks 21, and wettable metal coatings 25, 27 to accommodate the solder joints 23.

A corresponding series of wettable metal coatings 27 are provided on the input contacts 15 to the silicon readout circuit.

The solder lumps 23 can be applied to one or both components. 86150: 3 9-12- of the hybrid device.

The ferroelectric materials constituting the sensitive elements of the thermal detector array can also conventionally be deposited directly in the form of a thin film of the desired thickness for the active element. This can avoid potential costly crystal growth, ceramic fabrication, orientation, cutting, etching and polishing procedures inherent in the use of bulk materials for these devices. Thin film deposition methods of such ferroelectric materials include reactive sputtering of composite targets, metal-organic chemical vapor deposition (MOCVD), and on-site decomposition of previously deposited metal-organic films (for example, films produced by the sol-gel process or by on-site hydrolysis of sprayed metal-organic complex solutions). Such films can be polycrystalline with varying degrees of crystallographic preferred orientation, or single crystal, depending on the deposition and / or decomposition conditions. Particularly important parameters in this regard include the deposition or decomposition temperature, and the nature of the substrate on which the films are deposited. These processes, for such relatively complex materials such as the aforementioned ferroelectric oxides, generally involve deposition or decomposition temperatures in excess of 400 ° C, especially when highly crystalline films are required. For this reason, direct deposition on a suitable thermal insulating structure rather than on the reader is generally difficult. Film deposition is therefore preferably done on a suitable temporary substrate. A substrate 41 with a deposited ferroelectric film 43 and a "barrier" layer 45 is shown in Figure 8. The selection of the appropriate heat-resistant substrate material may overcome the aforementioned deposition process temperature requirement, and may also provide prospects for controlling the film structure -30 make it clear. Suitable substrate materials can contain amorphous materials (e.g., molten quartz), and crystalline oxide and other inorganic composite materials. Single crystal substrate materials (eg, spinel, sapphire, magnesium, oxide, cubic zirconium oxide, sodium chloride and lithium fluoride) are of particular interest, as they provide the potential for epitaxial growth of single crystal ferroelectric films, if the network parameters or the network gaps are suitably are brought into conformity.

The "barrier" layer 45 shown in Figure 8 may be required to prevent chemical interaction of the growing film with the substrate and / or to promote nuclear cleavage of the film. The "barrier" film 45 itself may be deposited on the substrate 41 to provide the preferred orientation or as an epitaxial single crystal layer. The preferred orientation or single crystal nature of this "barrier" film may extend into the ferroelectric film grown thereon. The barrier film 45 can also be used to achieve a smooth transition between the network parameters of the substrate 41 to that of the ferroelectric film, in the situation where epitaxial growth takes place. An example of a barrier layer 45 is metal platinum, which can be deposited on molten quartz with a preferred orientation, or deposited as an epitaxial film on single crystal magnesium by sputtering.

After depositing a ferroelectric thin film 43 of desired thickness on the substrate 41, this structure can be processed in a similar manner to the device structure made from the bulk material, as shown in Figure 9. The substrate layer 41 is forgotten from the active surface of the array in a manner appropriate to the selected substrate material, but is retained around the periphery of the structure to provide a thicker, non-networked support frame 33 for the polymer support or membrane film 3, which covers the detector 20 series bears. The barrier layer 45 may be included in the array structure or removed. Device operation in other ways follows a completely similar route to that previously described and results in a physically similar structure.

Other structural derivatives derived from the previously described structures.

Variants are also within the scope of the invention. Particular examples include the use of alternative devices for concentrating and / or receiving the incident infrared radiation on the detector elements 1. Refracting or reflecting optical structures, which include miniature, discrete element optical immersion lenses, and a flat ground or curved reflecting light tube structures are included. Such structures can be produced, for example, by the photochemical or anisotropic chemical etching of single crystal silicas followed by appropriate anti-reflection or metal coating. Such concentration structures can be reassembled and accurately aligned with the hybrid structure using flip chip connection.

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Claims (5)

Thermal detector array, comprising discrete thermal detector elements arranged in a two-dimensional array, characterized in that each element (1) is supported on one side of a layer (3) of elastic material with a low thermal conductivity, which layer also serves as separation between the elements, an opposite side of the layer carries a common electrode structure (5) which communicates with each element and provides interconnections between them by means of electrically conductive tracks (7) with high thermal resistor, each element (1) has an element electrode (9), which is in communication with an inwardly facing surface of the element, each element electrode (9) is connected to an input circuit (15) by means of a connecting element (13) of a semiconductor substrate (11) such that the connecting elements (13) support the layer relative to the substrate (11), and each element (1) has a radiation absorber (17) connected thereto. Series according to claim 1, characterized in that the connecting elements (13) are made of a material with low thermal conductivity. Series according to claim 1 or 2, characterized in that the connecting elements (13) are placed between the respective elements (1) and the substrate (11). Series according to claim 1 or 2, characterized in that the connecting elements (13) are placed adjacent to the sides of the respective elements (1), which extend directly between the substrate (11) and the layer (3). . 5. A method of manufacturing a thermal detector array mainly as described above. .8015006