NL8601694A - METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES - Google Patents

Description

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Method for manufacturing semiconductor devices i i

The invention generally relates to a method of manufacturing semiconductor devices and in particular to an etching method of flattening an insulating silicon nitride layer having raised surface steps created during the manufacture of semiconductor devices.

In recent years, great importance has been attached to an etching method for planarizing surfaces in semiconductor device manufacturing methods involving a high degree of integration and high density of integrated semiconductor circuits. Particularly when a silicon nitride layer or film is used as the insulating intermediate layer and there are two wiring layers, for example, of aluminum with the insulating layer between them, the following problems arise. After forming a first wiring pattern on a substrate, the silicon nitride layer is formed over the first wiring layer, inevitably creating stepped increases on the surface of the silicon nitride layer according to the wires of the first wiring pattern. When a second layer of a wiring pattern is formed, for example, by sputter deposition on the silicon nitride layer with the stepped elevations therein, the second layer cannot be formed with an even thickness. In particular, the thickness becomes smaller at the places where a stepped elevation occurs. In extreme cases, the second layer breaks in places where the stepped elevation occurs causing breakage in the wiring.

This is further illustrated by Figure 1 which schematically shows a semi-processed article or article 1. The article or article 1 consists of a substrate of silicon with a pattern of aluminum 3 thereon in the form of 8 δ ö 169 4 s »- 2 - a stepped raised pattern layer, over which a silicon nitride layer 4 is formed. The surface profile of the article or object 1 shows cracks or thin places 5.

When a second layer of wiring material is formed on the silicon nitride layer 4 and patterned therein by dry etching, there is a high probability that the wiring material will not be (road) etched on the thin places at the stepped elevations. In an extreme case, the second layer may even have short circuits.

To solve this problem, for example, Japanese Patent Application Laid-Open 51-66778, a method has been proposed for manufacturing a semiconductor device characterized in that a coating of a material having a the same etching rate as that of the layer in which the stepped elevations preform and remove the coating layer and at least a portion of the 20 stepped elevated parts of the (previous) layer by physical etching, so that the surface with the stepped elevations is smoothed or flattened.

However, the above method has the drawback that there are limitations on the type of coating material and that the physical etching rate using Ar gas is very slow, so that the etching takes a long time. This method is therefore not suitable for use in the industrial manufacture of semiconductor devices. In addition, to determine the time for physical etching to achieve smoothing or flattening, it is essential that the height of the stepped elevations, the thickness of the coating layer and the etch rates be pre-measured with the additional problem that is difficult to control reproducible surface smoothing.

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The object of the invention is now to provide a method for manufacturing a semiconductor device having an insulating intermediate layer with cascading increases by depositing over a circuit or wiring pattern with which the cascading increases are smoothed or flattened by etching with a high etching speed.

Another object of the invention is to provide an etching method for smoothing or flattening a surface in which a stepped raised surface of an intermediate silicon-based insulating layer is reliably flattened or made by monitoring the level of flattening during the process .

Another object of the invention is to provide an etching method for smoothing or flattening a surface in which a surface with stepped elevations of an intermediate Si-based insulating layer is coated with a common resist material without some restrictions are imposed and that it is etched at substantially the same speed as applies to the stainless steel materials. According to the invention, there is provided a method of manufacturing a semiconductor device having an intermediate insulating layer on an Si base deposited over a pattern of a (different) material which inevitably shows the layer stepped elevations of the surface 25 corresponding to the pattern. In order to flatten or flatten the surface with the stepped increases of the Si-based insulating layer, a resist layer having a thickness greater than 30 is formed on the surface with the stepped increases of the Si-based insulating layer the height of the cascading elevations. Then, the resist layer and the stepwise elevations of the Si-based insulating layer are etched at substantially the same etching rates by means of a plasma of a gas mixture of a fluorine compound and oxygen until the stepped elevations • BS 0 1 69 4 .....

si - 4 - of the insulating layer and the resist layer have been substantially removed and the insulating layer has obtained a smooth surface. The extent to which material is removed or smoothing takes place 5: is determined by monitoring the intensity of an emission spectrum in the plasma and, in particular, monitoring a nitrogen atom emission spectrum when silicon nitride is used as the insulating layer on Si -base. The insulating layer can be further removed by etching such that the pattern 10 is exposed under the insulating layer. In that case, another insulating layer is deposited over the obtained smooth surface on which a different pattern of a desired material is formed. The insulating layer to be (road) etched with the method according to the invention preferably consists of silicon nitride.

The invention is now described in more detail with reference to the drawings.

Figure 1 shows a schematic side view of a known semi-finished semiconductor device; Figures 2a to 2e schematically show side views illustrating the smoothing of a surface of an insulating intermediate layer with stepped elevations according to the invention;

Figure 3 graphs the etching rate as a function of a change in the concentration of oxygen in a reacting gas for different resist materials and

Figure 4 shows the relationship between the intensity of an emission spectrum and the etching time used to determine the level of smoothing of a surface with stepped increases.

Let us now consider Figures 2a through 2e in which an etching method for flattening a surface according to the invention is illustrated.

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In Figure 2a, a semifinished semiconductor device S is shown comprising a semiconductor substrate 10 and a cartridge 12 of, for example, a conductive wiring material formed on the substrate 10. The substrate 10 can be one.

5 can be a combination of an insulating substrate and a semiconductor layer formed on that substrate. An insulating layer 14, for example a silicon nitride layer, is formed on the substrate 10 by means of a suitable technique, for example deposition from a chemical vapor (CVD). The deposited insulating layer exhibits stepped elevations as shown at 16 / due to the presence of the pattern 12. To flatten the surface with the stepped elevations of the layer 14, a layer 18 of a negative or positive resist material is applied over the stepped elevations of the insulating layer 14. The resist materials for the layer 18 are not critical and any commercially available resist materials can be used for this. After formation of the resist layer 18, the coating material tends to flow out slightly, creating a substantially uniform flat surface of the resist layer 18. This resist layer 18 is sometimes also called a sacrificial layer.

In this state, the semiconductor device S is subjected to an etching treatment by means of a plasma of a gas mixture of a fluorine compound and oxygen. As etching continues, the resist layer 18 and the stepped elevations 16 of the insulating layer 14 are forgotten as shown in Figures 2b to 2d.

In Figure 2c, the insulating layer 14 has a smooth surface and then a pattern of a desired material can be formed on that smooth surface. This guarantees uniform pattern formation due to the lack of stepped elevations on the silicon nitride surface.

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Also, the silicon nitride layer 14 can be further etched as shown in Figure 2d, exposing the pattern 12 at the top. In this case, a uniform insulating layer 20 is formed or applied, on which another pattern can be formed or applied if desired.

In the practice of the invention, etching is performed using a plasma of a gas mixture consisting of a fluorine compound and oxygen in a mixing ratio such that the etching rates for the insulating layer 14 and for the resist layer 18 are substantially equal. It is therefore not necessary to selectively use a resist layer at the same etching rate as the insulating layer, as is necessary in the prior art.

The mixing ratio of fluorine compounds and oxygen providing the same etching rates is determined by etching the respective materials in an atmosphere with different mixing ratios of the gases as will be described in more detail below. Plasma etching using the gas mixture proceeds faster than with known etching techniques using, for example, Ar gas,

The amount of etching or smoothing shown in Figures 2b to 2d can be determined by monitoring the intensity of an emission spectrum in the plasma.

When silicon nitride is used, an atomic emission spectrum of nitrogen in the plasma is used. For example, at the initial stage of etching shown in Figure 2a, the intensity of this emission spectrum is zero. As the stepped elevated portions of the insulating layer 18 become exposed as shown in Figure 2b, the intensity increases.

As etching proceeds and a stage is reached where the resist layer 18 has been completely removed as shown in Figure 2c, the intensity reaches a maximum at a constant level.

As etching continues as shown in 8601694 * »- 7 - Figure 2d and the top of the pattern 12 is exposed, the intensity (of the spectrum) in turn decreases, proportional to the area of the pattern that is exposed.

5 If it is determined that a smoothing has been achieved as is. shown in Figure 2c, etching is stopped, leaving a smooth insulating layer on which a different pattern can be formed. This can completely prevent breaks in the other pattern at the stepped elevated portions that would otherwise occur.

In the practice of the invention, the substrate may be made of a variety of materials, for example silicon, and the pattern 12 formed on the substrate may be made of conductive materials such as Al, Al-Si 15 alloys and the like, generally in a thickness of 0 .5 to 2.0 µm. The intermediate Si-based insulating layer is preferably formed from silicon nitride, although other types of insulating materials, for example SiO4, can also be used. If the insulating layer 20 is to be formed, materials such as silicon nitride or the like can be used for this.

The coating materials for the resist layer 18 must be applied in a thickness greater than the height of the stepped elevations 16 to completely cover stepped elevated portions. In practice, the etching takes place by means of a plasma of a gas mixture of a fluorine compound and oxygen. Examples of the fluorine compound include CF, C, F. and the like, of which 4-26 compounds are preferred carbon tetrafluoride because of the high etching rate. The plasma etching conditions are not critical and the etching generally takes place under a pressure of 50 to 500 mTorr and with an RF power of 100 to 500 W.

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The method of the invention is particularly effective, especially when two layers of wiring material are insulated from each other in desired patterns. through a layer of SiN. In that case, the layer of SiN must be formed over a first pattern of wiring material, creating stepped elevations corresponding to the wire pattern in the SiN layer. These stepped elevated portions can conveniently be flattened or flattened by the method of the invention.

The invention is now further described by means of the following example.

EXAMPLE 1 A semifinished semiconductor device S as shown in Figure 2a was formed, comprising a silicon substrate 1.0, a wiring pattern 12 formed on the substrate 10 in a thickness of 0.8 µm from an Al-Si alloy and a SiN layer 14 on the substrate 10 was formed by plasma CVD in a thickness of 1 µm and a layer 18 of a negative resist material OMR-83 or a positive resist material OFPR-800 (trade names of Tokyo Ohka Ind.

Co., Ltd.) in a thickness of 1.2 µm. The device S was subjected to an etching treatment in an etching device of a parallel type flat plate cathode coupling using a gas mixture of carbon tetrafluoride and oxygen. The mixing ratio of carbon tetrafluoride and oxygen was determined by independently etching the positive and negative resistors and the SiN layer with different oxygen contents so that the resist and SiN layer can be etched at substantially the same rates. The results are shown in figure 3, which shows that for the same etching rates the oxygen concentration in the gas mixture must be 20 volume% for the combination of positive resist and SiN layer and 8 SO 16 9 4 - 9 - 17.5 volume% must be for the combination of negative resist and the SiN layer.

Using the positive resist, etching was performed at a reaction pressure of 5 100 mTorr with a flow rate of CF 4 gas of 80 SCCM

and an oxygen gas flow rate of 20 SCCM at an RF power of 300 W. The etching rate of the silicon nitride layer was found to be 5,350 angstroms / minute and that of the positive resist (OFPR-800) was 5,250 angstroms / minute.

The result was that a smooth surface of the silicon nitride layer could be obtained. Similar results are obtained using the negative resist.

The degree of smoothing of the silicon nitride layer can be approximately controlled and controlled by monitoring the variation in the intensity of a nitrogen atomic emission spectrum in the plasma used for etching. This is described in particular with reference to Figures 2a and 2b and Figure 4. Figure 4 shows the variation in the intensity of the nitrogen emission spectrum (674 nm) as a function of the etching duration as a sample as shown in Figure 2a, etching is performed under conditions as stated in the example described above. The situation (a) in figure 4 corresponds to the situation in the etching according to figure 2a in which the stepped increase of the silicon nitride layer is not yet exposed. The situation (b) of figure 4 in which the intensity of the nitrogen emission spectrum increases abruptly corresponds to the situation in the etching according to figure 2b. The stepped raised portion of the silicon nitride layer and the resist layer are etched simultaneously. The situation (cj in Figure 4 where the spectrum intensity reaches a maximum) corresponds to the condition shown in Figure 2c. The resist layer has been completely removed by etching and the silicon nitride layer has been smoothed in stepped increments.

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As etching continues, the situation (d) of Figure 4, corresponding to the condition shown in Figure 2d, results in the Al-Si alloy being exposed while the silicon nitride layer is smoothed. As the case may be, an insulating layer 20 may be formed depending on the method of manufacturing a semiconductor device (which is used).

The result is that a smoothing or a flat surface as shown in Figure 2e is obtained.

As will be clear from the previous example, the method according to the invention gives a good removal of an insulating layer and of a resist layer by etching it rapidly at substantially the same etching rate.

In the example, CF and CL were used for etching, but other types of fluorine compounds can also be used when their mixing ratio to oxygen is determined such that the insulating layer and the resist layer are etched at substantially the same rate.

The method according to the invention can suitably prevent the occurrence of irregularities, breaks and / or short circuits in the conductive layer which is formed on an insulating layer in the manufacture of semiconductor devices in the presence of stepped increases in the insulating layer. The reliability of the semiconductor devices therefore increases due to the method according to the invention.

8301694

Claims (10)

A method of manufacturing a semiconductor device having an intermediate Si-based insulating layer deposited over a pattern of (other) material such that the Si-based layer inevitably has stepped elevated portions on the surface which correspond to said pattern, characterized in that a resist layer 10 is applied to the surface of the Si-based insulating layer with the stepped elevations in a lacquer thickness greater than the height of the stepped elevations and the resist layer and etch the stepped elevated portions of the Si-based insulating layer by means of a plasma of a gas mixture of a fluorine compound and oxygen at substantially the same etching rates until the stepped elevated portions of the. Si-based insulating layer and the resist layer have been substantially removed and the Si-based insulating layer obtains a smooth surface. 2. A method according to claim 1, characterized in that the fluorine compound is carbon tetrafluoride. 3. A method according to claim 1 or 2, characterized in that the insulating layer on the basis of Si is a layer of SiN and that the degree of etching is influenced by the intensity of one nitrogen atom emission spectrum in the plasma. to guard. Method according to claim 3, characterized in that the nitrogen emission spectrum has a wavelength of 674 nm. A method according to any one of the preceding claims, characterized in that the etching is carried out until a desired pattern covered with the insulating layer based on Si is exposed. ö 5 Ö1694 -12 - 6. A method of manufacturing a semiconductor device having an intermediate layer of silicon nitride applied over a wiring pattern of a conductive material such that this layer inevitably has 5 stepped elevations on its surface corresponding to the wiring pattern characterized in that one resist layer to the surface of the insulating layer with stepped elevations in a layer thickness greater than the height of the 10 stepped elevations and the resist layer and the stepped elevations of the insulating silicon nitride layer by means of a plasma of a gas mixture of a fluorine compound and oxygen etches at substantially the same etching rates until the stepwise elevated portions of the insulating silicon nitride layer and the resist layer are substantially removed and the insulating silicon nitride layer obtains a smooth surface. A method according to claim 6, characterized in that the fluorine compound is carbon tetrafluoride. 8. A method according to claim 6 or 7, characterized in that the degree of etching is controlled by monitoring the intensity of a <nitrogen atom emission spectrum in the plasma. A method according to claim 8, characterized in that the nitrogen emission spectrum has a wavelength of 674 nm. Method according to claims 6-9, characterized in that the etching is carried out until a desired pattern which has been covered with the insulating layer is exposed. 8601 694