NL7907434A - Werkwijze voor het vervaardigen van een halfgeleider- inrichting. - Google Patents
Werkwijze voor het vervaardigen van een halfgeleider- inrichting. Download PDFInfo
- Publication number
- NL7907434A NL7907434A NL7907434A NL7907434A NL7907434A NL 7907434 A NL7907434 A NL 7907434A NL 7907434 A NL7907434 A NL 7907434A NL 7907434 A NL7907434 A NL 7907434A NL 7907434 A NL7907434 A NL 7907434A
- Authority
- NL
- Netherlands
- Prior art keywords
- insulating layer
- insulating
- layer
- conductor pattern
- parts
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D44/00—Charge transfer devices
- H10D44/01—Manufacture or treatment
- H10D44/041—Manufacture or treatment having insulated gates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
-
- H10P76/40—
-
- H10P95/00—
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/981—Utilizing varying dielectric thickness
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Weting (AREA)
- Formation Of Insulating Films (AREA)
Priority Applications (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| NL7907434A NL7907434A (nl) | 1979-10-08 | 1979-10-08 | Werkwijze voor het vervaardigen van een halfgeleider- inrichting. |
| US06/191,101 US4332078A (en) | 1979-10-08 | 1980-09-26 | Method of manufacturing a semiconductor device |
| EP80200926A EP0026953B1 (en) | 1979-10-08 | 1980-10-01 | Method of manufacturing a semiconductor device |
| CA000361925A CA1150855A (en) | 1979-10-08 | 1980-10-01 | Method of manufacturing a semiconductor device |
| DE8080200926T DE3067007D1 (en) | 1979-10-08 | 1980-10-01 | Method of manufacturing a semiconductor device |
| JP13944280A JPS5658246A (en) | 1979-10-08 | 1980-10-07 | Method of manufacturing semiconductor device |
| AU63012/80A AU532313B2 (en) | 1979-10-08 | 1980-10-07 | Insulation in semiconductor device |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| NL7907434A NL7907434A (nl) | 1979-10-08 | 1979-10-08 | Werkwijze voor het vervaardigen van een halfgeleider- inrichting. |
| NL7907434 | 1979-10-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| NL7907434A true NL7907434A (nl) | 1981-04-10 |
Family
ID=19833974
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NL7907434A NL7907434A (nl) | 1979-10-08 | 1979-10-08 | Werkwijze voor het vervaardigen van een halfgeleider- inrichting. |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US4332078A (enExample) |
| EP (1) | EP0026953B1 (enExample) |
| JP (1) | JPS5658246A (enExample) |
| AU (1) | AU532313B2 (enExample) |
| CA (1) | CA1150855A (enExample) |
| DE (1) | DE3067007D1 (enExample) |
| NL (1) | NL7907434A (enExample) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5687346A (en) * | 1979-12-18 | 1981-07-15 | Nec Corp | Manufacture of semiconductor device |
| FR2533371B1 (fr) * | 1982-09-21 | 1985-12-13 | Thomson Csf | Structure de grille pour circuit integre comportant des elements du type grille-isolant-semi-conducteur et procede de realisation d'un circuit integre utilisant une telle structure |
| NL8502478A (nl) * | 1985-09-11 | 1987-04-01 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
| US4888298A (en) * | 1988-12-23 | 1989-12-19 | Eastman Kodak Company | Process to eliminate the re-entrant profile in a double polysilicon gate structure |
| KR930006128B1 (ko) * | 1991-01-31 | 1993-07-07 | 삼성전자 주식회사 | 반도체장치의 금속 배선 형성방법 |
| TW218426B (enExample) * | 1992-05-11 | 1994-01-01 | Samsung Electronics Co Ltd | |
| TW219407B (enExample) * | 1992-06-24 | 1994-01-21 | American Telephone & Telegraph | |
| US5936286A (en) * | 1996-06-20 | 1999-08-10 | United Microelectronics Corp. | Differential poly-edge oxidation for stable SRAM cells |
| JPH10163311A (ja) * | 1996-11-27 | 1998-06-19 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NL7404659A (nl) * | 1974-04-05 | 1975-10-07 | Philips Nv | Werkwijze voor het vervaardigen van een halfge- leiderinrichting, en inrichting vervaardigd door toepassing van de werkwijze. |
| US3909925A (en) * | 1974-05-06 | 1975-10-07 | Telex Computer Products | N-Channel charge coupled device fabrication process |
| US4077112A (en) * | 1974-09-24 | 1978-03-07 | U.S. Philips Corporation | Method of manufacturing charge transfer device |
| JPS5928992B2 (ja) * | 1975-02-14 | 1984-07-17 | 日本電信電話株式会社 | Mosトランジスタおよびその製造方法 |
| US3961999A (en) * | 1975-06-30 | 1976-06-08 | Ibm Corporation | Method for forming recessed dielectric isolation with a minimized "bird's beak" problem |
| US4027382A (en) * | 1975-07-23 | 1977-06-07 | Texas Instruments Incorporated | Silicon gate CCD structure |
| NL7703942A (nl) * | 1977-04-12 | 1978-10-16 | Philips Nv | Werkwijze ter vervaardiging van een halfgelei- derinrichting en inrichting, vervaardigd door toepassing van de werkwijze. |
| JPS5841659B2 (ja) * | 1977-08-30 | 1983-09-13 | 株式会社東芝 | 絶縁膜の形成方法 |
| US4288256A (en) * | 1977-12-23 | 1981-09-08 | International Business Machines Corporation | Method of making FET containing stacked gates |
-
1979
- 1979-10-08 NL NL7907434A patent/NL7907434A/nl not_active Application Discontinuation
-
1980
- 1980-09-26 US US06/191,101 patent/US4332078A/en not_active Expired - Lifetime
- 1980-10-01 EP EP80200926A patent/EP0026953B1/en not_active Expired
- 1980-10-01 DE DE8080200926T patent/DE3067007D1/de not_active Expired
- 1980-10-01 CA CA000361925A patent/CA1150855A/en not_active Expired
- 1980-10-07 AU AU63012/80A patent/AU532313B2/en not_active Ceased
- 1980-10-07 JP JP13944280A patent/JPS5658246A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| AU532313B2 (en) | 1983-09-22 |
| EP0026953A1 (en) | 1981-04-15 |
| DE3067007D1 (en) | 1984-04-19 |
| US4332078A (en) | 1982-06-01 |
| AU6301280A (en) | 1981-04-16 |
| CA1150855A (en) | 1983-07-26 |
| JPH0214784B2 (enExample) | 1990-04-10 |
| EP0026953B1 (en) | 1984-03-14 |
| JPS5658246A (en) | 1981-05-21 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A1B | A search report has been drawn up | ||
| BV | The patent application has lapsed |