NL7812138A - Multi-trap logische keteninrichting. - Google Patents

Multi-trap logische keteninrichting.

Info

Publication number
NL7812138A
NL7812138A NL7812138A NL7812138A NL7812138A NL 7812138 A NL7812138 A NL 7812138A NL 7812138 A NL7812138 A NL 7812138A NL 7812138 A NL7812138 A NL 7812138A NL 7812138 A NL7812138 A NL 7812138A
Authority
NL
Netherlands
Prior art keywords
chain device
logical chain
trap
trap logical
logical
Prior art date
Application number
NL7812138A
Other languages
English (en)
Original Assignee
Western Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co filed Critical Western Electric Co
Publication of NL7812138A publication Critical patent/NL7812138A/nl

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096Synchronous circuits, i.e. using clock signals
    • H03K19/0963Synchronous circuits, i.e. using clock signals using transistors of complementary type
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/017Modifications for accelerating switching in field-effect transistor circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Manipulation Of Pulses (AREA)
  • Control Of El Displays (AREA)
NL7812138A 1977-12-14 1978-12-13 Multi-trap logische keteninrichting. NL7812138A (nl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US86033977A 1977-12-14 1977-12-14

Publications (1)

Publication Number Publication Date
NL7812138A true NL7812138A (nl) 1979-06-18

Family

ID=25332993

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7812138A NL7812138A (nl) 1977-12-14 1978-12-13 Multi-trap logische keteninrichting.

Country Status (6)

Country Link
JP (1) JPS5489558A (nl)
DE (1) DE2853517A1 (nl)
ES (1) ES476008A1 (nl)
GB (1) GB2013438A (nl)
IT (1) IT1101554B (nl)
NL (1) NL7812138A (nl)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5632831A (en) * 1979-08-24 1981-04-02 Mitsubishi Electric Corp Clock driving type logic circuit
US4636661A (en) * 1984-12-21 1987-01-13 Signetics Corporation Ratioless FET programmable logic array
US4692637A (en) * 1985-07-08 1987-09-08 At&T Bell Laboratories CMOS logic circuit with single clock pulse
US5065048A (en) * 1988-09-19 1991-11-12 Hitachi, Ltd. Semiconductor logic circuit with noise suppression circuit
US6717438B2 (en) * 2002-08-30 2004-04-06 Sun Microsystems, Inc. Clocked half-rail differential logic with single-rail logic
JP5322977B2 (ja) * 2010-03-04 2013-10-23 株式会社エヌ・ティ・ティ・データ 消費電力錯乱型論理回路及び情報記憶媒体

Also Published As

Publication number Publication date
IT1101554B (it) 1985-10-07
DE2853517A1 (de) 1979-06-21
ES476008A1 (es) 1979-05-01
JPS5489558A (en) 1979-07-16
GB2013438A (en) 1979-08-08
IT7830789A0 (it) 1978-12-13

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Legal Events

Date Code Title Description
BV The patent application has lapsed