NL7014116A - - Google Patents

Info

Publication number
NL7014116A
NL7014116A NL7014116A NL7014116A NL7014116A NL 7014116 A NL7014116 A NL 7014116A NL 7014116 A NL7014116 A NL 7014116A NL 7014116 A NL7014116 A NL 7014116A NL 7014116 A NL7014116 A NL 7014116A
Authority
NL
Netherlands
Application number
NL7014116A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of NL7014116A publication Critical patent/NL7014116A/xx

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/40Encapsulations, e.g. protective coatings characterised by their materials
    • H10W74/43Encapsulations, e.g. protective coatings characterised by their materials comprising oxides, nitrides or carbides, e.g. ceramics or glasses
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/942Masking
    • Y10S438/945Special, e.g. metal
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/942Masking
    • Y10S438/948Radiation resist
    • Y10S438/95Multilayer mask including nonradiation sensitive layer
NL7014116A 1969-10-29 1970-09-24 NL7014116A (https=)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19691954499 DE1954499A1 (de) 1969-10-29 1969-10-29 Verfahren zur Herstellung von Halbleiterschaltkreisen mit Leitbahnen

Publications (1)

Publication Number Publication Date
NL7014116A true NL7014116A (https=) 1971-05-04

Family

ID=5749597

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7014116A NL7014116A (https=) 1969-10-29 1970-09-24

Country Status (9)

Country Link
US (1) US3689332A (https=)
JP (1) JPS498458B1 (https=)
AT (1) AT312053B (https=)
CH (1) CH515614A (https=)
DE (1) DE1954499A1 (https=)
FR (1) FR2065563B1 (https=)
GB (1) GB1285258A (https=)
NL (1) NL7014116A (https=)
SE (1) SE352200B (https=)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3948701A (en) * 1971-07-20 1976-04-06 Aeg-Isolier-Und Kunststoff Gmbh Process for manufacturing base material for printed circuits
US3874072A (en) * 1972-03-27 1975-04-01 Signetics Corp Semiconductor structure with bumps and method for making the same
NL163370C (nl) * 1972-04-28 1980-08-15 Philips Nv Werkwijze voor het vervaardigen van een halfgeleider- inrichting met een geleiderpatroon.
FR2183603B1 (https=) * 1972-05-12 1974-08-30 Cit Alcatel
US3993515A (en) * 1975-03-31 1976-11-23 Rca Corporation Method of forming raised electrical contacts on a semiconductor device
US4334348A (en) * 1980-07-21 1982-06-15 Data General Corporation Retro-etch process for forming gate electrodes of MOS integrated circuits
US4495222A (en) * 1983-11-07 1985-01-22 Motorola, Inc. Metallization means and method for high temperature applications
US4674174A (en) * 1984-10-17 1987-06-23 Kabushiki Kaisha Toshiba Method for forming a conductor pattern using lift-off
USH434H (en) 1985-02-15 1988-02-02 American Telephone And Telegraph Company, At&T Bell Laboratories Contacts to III-V semiconductors
US4742023A (en) * 1986-08-28 1988-05-03 Fujitsu Limited Method for producing a semiconductor device
US4878990A (en) * 1988-05-23 1989-11-07 General Dynamics Corp., Pomona Division Electroformed and chemical milled bumped tape process
US5620611A (en) * 1996-06-06 1997-04-15 International Business Machines Corporation Method to improve uniformity and reduce excess undercuts during chemical etching in the manufacture of solder pads
EP0914797B1 (de) * 1997-11-06 2005-04-13 LEIFHEIT Aktiengesellschaft Feuchtwischer für plane Flächen
US8584300B2 (en) 2007-11-29 2013-11-19 Carl Freudenberg Kg Squeeze mop

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3507756A (en) * 1967-08-04 1970-04-21 Bell Telephone Labor Inc Method of fabricating semiconductor device contact

Also Published As

Publication number Publication date
GB1285258A (en) 1972-08-16
FR2065563A1 (https=) 1971-07-30
JPS498458B1 (https=) 1974-02-26
AT312053B (de) 1973-12-10
CH515614A (de) 1971-11-15
SE352200B (https=) 1972-12-18
DE1954499A1 (de) 1971-05-06
FR2065563B1 (https=) 1975-02-21
US3689332A (en) 1972-09-05

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