NL6703515A - - Google Patents

Info

Publication number
NL6703515A
NL6703515A NL6703515A NL6703515A NL6703515A NL 6703515 A NL6703515 A NL 6703515A NL 6703515 A NL6703515 A NL 6703515A NL 6703515 A NL6703515 A NL 6703515A NL 6703515 A NL6703515 A NL 6703515A
Authority
NL
Netherlands
Application number
NL6703515A
Other versions
NL139413B (nl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of NL6703515A publication Critical patent/NL6703515A/xx
Publication of NL139413B publication Critical patent/NL139413B/xx

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49146Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Die Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
NL676703515A 1966-03-09 1967-03-06 Halfgeleiderinrichting met een plaatvormig steunlichaam van elektrisch isolerend materiaal, dat aan zijn bovenvlak ten minste twee onderling evenwijdige ribben heeft, en werkwijze voor het vervaardigen daarvan. NL139413B (nl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1449266 1966-03-09

Publications (2)

Publication Number Publication Date
NL6703515A true NL6703515A (de) 1967-09-11
NL139413B NL139413B (nl) 1973-07-16

Family

ID=11862534

Family Applications (1)

Application Number Title Priority Date Filing Date
NL676703515A NL139413B (nl) 1966-03-09 1967-03-06 Halfgeleiderinrichting met een plaatvormig steunlichaam van elektrisch isolerend materiaal, dat aan zijn bovenvlak ten minste twee onderling evenwijdige ribben heeft, en werkwijze voor het vervaardigen daarvan.

Country Status (5)

Country Link
US (1) US3461549A (de)
DE (1) DE1614133B2 (de)
FR (1) FR1516465A (de)
GB (1) GB1107498A (de)
NL (1) NL139413B (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3648121A (en) * 1967-09-06 1972-03-07 Tokyo Shibaura Electric Co A laminated semiconductor structure
DE3106376A1 (de) * 1981-02-20 1982-09-09 Siemens AG, 1000 Berlin und 8000 München Halbleiteranordnung mit aus blech ausgeschnittenen anschlussleitern
JPH03136267A (ja) * 1989-10-20 1991-06-11 Texas Instr Japan Ltd 半導体装置及びその製造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3084300A (en) * 1961-02-17 1963-04-02 Micro Systems Inc Semiconductor strain gauge
US3349481A (en) * 1964-12-29 1967-10-31 Alpha Microelectronics Company Integrated circuit sealing method and structure
US3271507A (en) * 1965-11-02 1966-09-06 Alloys Unltd Inc Flat package for semiconductors

Also Published As

Publication number Publication date
DE1614133B2 (de) 1971-09-02
NL139413B (nl) 1973-07-16
GB1107498A (en) 1968-03-27
DE1614133A1 (de) 1970-10-29
US3461549A (en) 1969-08-19
FR1516465A (fr) 1968-03-08

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Legal Events

Date Code Title Description
NL80 Abbreviated name of patent owner mentioned of already nullified patent

Owner name: MATSUSHITA E

V4 Discontinued because of reaching the maximum lifetime of a patent