NL273524A - - Google Patents

Info

Publication number
NL273524A
NL273524A NL273524DA NL273524A NL 273524 A NL273524 A NL 273524A NL 273524D A NL273524D A NL 273524DA NL 273524 A NL273524 A NL 273524A
Authority
NL
Netherlands
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Publication of NL273524A publication Critical patent/NL273524A/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491—Computations with decimal numbers radix 12 or 20.
    • G06F7/4912—Adding; Subtracting
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/085—Error detection or correction by redundancy in data representation, e.g. by using checking codes using codes with inherent redundancy, e.g. n-out-of-m codes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/383—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using magnetic or similar elements
    • G06F7/386—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using magnetic or similar elements decimal, radix 20 or 12

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
  • Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)
  • Complex Calculations (AREA)
NL273524D 1958-11-06 NL273524A (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR778475A FR1271017A (fr) 1958-11-06 1958-11-06 Dispositif et procédé pour effectuer des opérations arithmétiques
FR849992A FR80453E (fr) 1958-11-06 1961-01-18 Dispositif et procédé pour effectuer des opérations arithmétiques

Publications (1)

Publication Number Publication Date
NL273524A true NL273524A (fr)

Family

ID=26183630

Family Applications (2)

Application Number Title Priority Date Filing Date
NL273524D NL273524A (fr) 1958-11-06
NL244992D NL244992A (fr) 1958-11-06

Family Applications After (1)

Application Number Title Priority Date Filing Date
NL244992D NL244992A (fr) 1958-11-06

Country Status (5)

Country Link
US (1) US3069086A (fr)
DE (2) DE1206180B (fr)
FR (2) FR1271017A (fr)
GB (2) GB904841A (fr)
NL (2) NL244992A (fr)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3110015A (en) * 1957-10-28 1963-11-05 Honeywell Regulator Co Memory circuitry for digital data
NL260164A (fr) * 1960-03-30
US3166669A (en) * 1960-06-28 1965-01-19 Ibm Core matrix coded decimal parallel adder utilizing propagated carries
US3212064A (en) * 1961-11-27 1965-10-12 Sperry Rand Corp Matrix having thin magnetic film logical gates for transferring signals from plural input means to plural output means
US3238377A (en) * 1961-12-04 1966-03-01 Ibm Cryogenic m out of n logic circuits
US3460092A (en) * 1965-03-31 1969-08-05 Bell Telephone Labor Inc Selector matrix check circuit
DE1574592B1 (de) * 1966-09-23 1972-02-03 Siemens Ag Vorrcihtun zur arithmethischen verknuepfung binaerer operanden unter verwendung einer matrix
US3510638A (en) * 1967-02-09 1970-05-05 Richard F Pond Decimal matrix adder utilizing gas discharge tubes
US3875392A (en) * 1973-06-18 1975-04-01 Ii Miner S Keeler Electrical computing system for simultaneously performing a plurality of operations on two or more operands
DE102012220849A1 (de) * 2012-11-15 2014-05-15 Rohde & Schwarz Gmbh & Co. Kg Schaltung zur arithmetischen Verknüpfung mehrerer Eingangssignale

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE900281C (de) * 1939-04-06 1953-12-21 Adelheid Huendorf Elektrische Rechenzelle
NL218497A (fr) * 1956-06-30
US2955303A (en) * 1958-05-07 1960-10-11 Racine Ind Plant Inc Tray for electric brush

Also Published As

Publication number Publication date
GB974362A (en) 1964-11-04
FR80453E (fr) 1963-05-03
US3069086A (en) 1962-12-18
NL244992A (fr)
GB904841A (en) 1962-08-29
DE1206180B (de) 1965-12-02
FR1271017A (fr) 1961-09-08
DE1192700B (de) 1965-05-13

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