NL2014818A - Method for producing solar cells with a p-doped CdTe layer with reduced thickness. - Google Patents

Abstract

The present invention proposes a method to produce thin film CdTe solar cells having a pin-hole free and uniformly doped CdTe layer with a reduced layer thickness. The method according to the present invention is an efficient way to prevent shunting of the solar cells, to improve reliability and long-term stability of the solar cells and to provide a uniform doping of the CdTe layer. This is achieved by applying a sacrificial doping layer between a first CdTe layer having large grains and a second CdTe layer having small grains, which together form the CdTe layer of the solar cells. Furthermore it provides the possibility to eliminate the CdCb activation treatment step in case the sacrificial doping layer comprises a halogen.

Description

Title: Method for producing solar cells with a p-doped CdTe layer with reduced thickness

The objective of the present invention is a method of producing CdTe solar cells with increased efficiency.

The distribution of thin-film solar cells may be accelerated further by increasing their electric efficiency in fight conversion. Solar cells based on CdTe have proven particularly promising in this respect.

In the state of the art, the CdTe solar cell has the following structure: on a glass substrate, a transparent conducting oxide layer (TCO) is deposited as front contact. The TCO layer can include a high resistive buffer layer which helps to minimise the shunting effect in solar cell. On this, a layer of cadmium sulfide (CdS) and on top of that, a layer of cadmium telluride (CdTe) are deposited. Finally a metal layer is applied to collect the charge carriers. This process is called superstrate configuration.

In producing the solar cells the substrate (preferably glass) forms the base on which the subsequent layers are deposited one after another.

In CdTe solar module preparation normally the thickness of the CdTe layer is maintained in the range of 4 to 5 pm. However, theoretical simulations of the CdTe solar cells show that solar cells with 1 pm CdTe layer could also yield reasonable high efficiency. In principle reducing the CdTe film thickness from 4 to 2 pm could help to reduce CdTe material consumption by 30-40 % in module production. The CdTe film thickness reduction would also help to reduce layer deposition time and thereby expedite module production.

High efficiency solar cells are normally achieved with CdTe deposition at substrate temperatures >500°C. The CdTe layer at this temperature has large grains which could result in formation of pinholes. Therefore, simply reducing the layer thickness has several negative influences over the solar cell efficiency and longtime stability. While reducing the film thickness (<3 μηι), pinholes are formed in the CdTe layer leading to shunting of the solar cells. This problem will be more pronounced if there is an etching process involved in solar cell production which will lead to poor performance of the solar cell. Furthermore, the reduction in shunt resistance value leads to a low fill factor and eventually reduced efficiency. Therefore, minimizing the pinhole formation in CdTe layer is necessary in order to obtain high efficiency solar cells.

In addition to this, increasing the p-doping of the CdTe layer is also important to achieve high efficiency solar cells. Further increase in efficiency of the CdTe solar cells may be achieved by doping the CdTe layer. According to the theoretical predictions, heavy p-doping of CdTe is limited due to the formation of the self-compensation effect. Only a certain level of p-doping can be achieved by using an appropriate doping element and a process providing a doping element to the CdTe layer after depositing the CdTe layer. During the preparation of the CdTe solar cell, the extrinsic p-doping of CdTe layer is normally done after the activation process and involves post annealing treatment to induce diffusion of doping elements. The well-known and easy p-dopant for CdTe layer is Cu.

The object of the present invention is to obtain a solar cell comprising a doped CdTe layer with a reduced thickness and without pinholes. Furthermore, it is the object of the present invention to simplify the production process of CdTe solar cells.

According to the invention, the process of producing a CdTe solar cell comprises a step of forming a first CdTe layer having large grains on a base layer, a step of forming a sacrificial doping layer comprising a doping element on the first CdTe layer and a step of forming a second CdTe layer having small grains on the sacrificial doping layer.

The preferred material of the sacrificial doping layer is selected out of a group of materials comprising copper, phosphorus, antimony, bismuth, molybdenum or manganese as the doping element. According to one embodiment, the doping element is provided as an elemental layer. In another embodiment, the doping element is provided in a combination of different elements, for instance copper and antimony or antimony and bismuth, or in a composition, wherein the composition is preferably a compound of any of the mentioned doping elements with a halogen, for instance SbCD. The preferred halogen for the composition of the sacrificial doping layer is fluorine (F), most preferred chlorine (Cl). The preferably used compounds are chlorides.

The sacrificial doping layer can be applied using methods according to state of the art. Preferably used are physical or dry chemical processes or wet chemical processes such as, but not limited to: - Sputtering, - Electro-deposition, - Spraying solution of compound comprising halogen, wherein the compound is dissolved in water or in another known solvent, - Spin coating, - Dipping the substrate (or the surface of the first CdTe layer) into a solution which contains the doping element or a compound of it, Sponge roller coating, etc.

Compounds comprising a halogen are preferably applied by wet processing, more preferably by sponge roller coating.

The thickness of the sacrificial doping layer depends on the dimensions of the CdTe layer resulting from fusion of the first CdTe layer and the second CdTe layer and on the used doping element. Regarding the thickness of the CdTe layer, the thickness of the sacrificial doping layer is chosen such that a predetermined doping level of the CdTe layer is achieved when the sacrificial doping layer is completely dissolved. In case of elemental antimony as the sacrificial doping layer, the thickness of the sacrificial doping layer is preferably approximately one thousandth of the thickness of the CdTe layer. Some examples are given in Table 1, where also the respective aproximate thicknesses of the first and the second CdTe layer are given.

Table 1

However, also other doping elements or compositions comprising the doping element may be used. Generally, the thickness of the sacrificial doping layer is preferably in a range of 2 nm to 15 nm. If copper is used as the doping element, the thickness of the sacrificial doping layer should be reduced with respect to that when using other doping elements, since a high degree of copper would lead to degradation of the solar cell over time. Preferably, the thickness of a sacrificial doping layer comprising copper as the doping element should be 30% smaller than the thickness of a sacrificial doping layer comprising another doping element, for instance antimony.

The sacrificial doping layer is preferably applied on the first CdTe layer at a substrate temperature in the range from room temperature to 350°C. The substrate temperature should not exceed 350°C, since higher substrate temperatures would make it difficult to apply the sacrificial doping layer with the mentioned small thickness due to re-evaporation issues. If compounds comprising a halogen are used for applying the sacrificial doping layer, the substrate temperature is preferably in the range of room temperature to 100°C.

The first CdTe layer is applied on a base layer as a layer having large grains. The grains of the first CdTe layer have sizes in the order of micrometers, for instance in the range of 2 pm to 5 pm. This is achieved by depositing the first CdTe layer at a substrate temperature in the range of 490°C to 540°C, wherein the thickness of the first CdTe layer lies between 0.5 pm and 6 pm, more preferably between 1 pm and 1.8 pm. The base layer is a layer stack comprising a transparent substrate, a transparent front contact layer and a CdS layer in case the solar cell is produced in a superstrate configuration. The base layer is a layer stack comprising a substrate and a back contact layer in case the solar cell is produced in a substrate configuration. Further details of these configurations are described later.

The thickness of the second CdTe layer lies preferably between 1% and 100% of the total thickness of the first CdTe layer depending on the total CdTe layer thickness requirement. More preferably, the thickness of the second CdTe layer lies between 20% and 30% of the total CdTe layer thickness. The total CdTe layer thickness can be in the range of 0.5 pm to 8 pm. Only for very thin total CdTe layers with a layer thickness of 0.5 pm to 1.5 pm, the thickness of the second CdTe layer can be around 40-50% of the total CdTe layer thickness in order to fill the pin-holes and/or grain boundaries of the first CdTe layer. The thickness percentage of the second layer thickness is given only as an example. According to the invention, the method can work with second layer thickness in any of the thickness range.

The second CdTe layer is applied as a layer having small grains and serves to fill or cover the pin-holes and/or grain boundaries of the first CdTe layer. The grains of the second CdTe layer have sizes in the order of nanometers, for instance in the range of 100 nm to 500 nm. Thus the formation of shunting between the back contact and the front contact of the solar cell as well as the migration of impurities along the grain boundaries within the CdTe layer can be reduced or avoided. The deposition of a small-grain layer is achieved by depositing the second CdTe layer at a substrate temperature in the range from 200°C to 350°C.

The first and the second CdTe layer can be deposited by any known method including but not limited to close space(d) sublimation (CSS), chemical bath deposition (CBD), sputtering, electro-deposition or any other physical or chemical methods.

According to one embodiment of the method for producing a solar cell, the method further comprises a temperature treatment step performed after depositing the second CdTe layer. That is, the temperature treatment step may be performed directly following the step of applying the second CdTe layer or may be performed at a later process step, for instance after applying a cover layer, which might be a sacrificial cover layer.

The temperature treatment step includes heating the substrate to a temperature in the range of 300°C to 550°C. Most preferably, the substrate temperature during the temperature treatment process should not exceed 450°C if the second CdTe layer lies open, i.e. is not covered by another layer, in order to prevent re-evaporation of the CdTe.

Preferably, a material containing a halogen is provided on the surface of the second CdTe layer during the temperature treatment step. This process step corresponds to the so called activation step known from the state of the art in the production of CdTe solar cells. Usually, CdCU is used as the material containing a halogen for this temperature treatment step, wherein the CdCU is applied onto the CdTe layer by wet chemical method or by vacuum evaporation followed by annealing in air atmosphere at defined temperature (normally in the range of 380°C - 440°C). The benefits of this activation step include reduction of lattice mismatch between the CdS/CdTe layers and CdTe layer grain boundary passivation. The CdCh activation induced inter-diffusion between the CdS and CdTe layer helps to achieve smooth electronic band transition at the CdS/CdTe junction. However, a disadvantage of this approach is that the CdCb is a potentially hazardous material and therefore difficult to manage in production line.

If the sacrificial doping layer comprises a halogen, the use of CdCb may be avoided, since the halogen component comprised in the sacrificial doping layer helps in passivating the grain boundaries in the CdTe layer. Therefore, the temperature treatment step of the present invention is preferably performed without providing a halogen containing material on the surface of the second CdTe layer, since the inventive method mimics the CdCh activation process under these conditions.

The thermal energy available during the temperature treatment step induces decomposition of the sacrificial doping layer into its components and/or diffusion of its components, in particular of the doping element, into and/or through the CdTe layer. Thus, the sacrificial doping layer is broken down, which characterises the doping layer as a sacrificial layer. In the result, the first CdTe layer and the second CdTe layer are now bordering on each other and form the CdTe layer of the solar cell.

However, the production process of solar cells may comprise different process steps involving higher temperatures, for instance the deposition of CdTe layers. Therefore, dissolving of the sacrificial doping layer and diffusion of its components may also occur, at least partially, during the deposition of the sacrificial doping layer, the deposition of the second CdTe layer and/or other process steps performed after applying the second CdTe layer, for instance a process step for applying a contact layer. Therefore, the above mentioned temperature treatment step may be preserved, if a halogen containing sacrificial doping layer is used and if the process steps following the step of applying the sacrificial doping layer provide a thermal budget sufficient for dissolving the sacrificial doping layer and diffusing the doping element.

Since the diffusion of doping elements takes place from “inside” the CdTe layer, the CdTe layer is doped more uniform than it is in case of providing a doping layer on top of the deposited complete CdTe layer as it is state of the art. At least, a nearly uniform doping of the CdTe layer is achieved applying a lower thermal budget to the solar cell during the production process as compared to processes according to the state of the art. “Nearly uniform doping” means that no or only a small concentration gradient of the doping element can be measured within the CdTe layer.

In another embodiment of the invention, depending on the doping layer material selection, the excess doping element, i.e. doping element atoms which cannot be incorported into the CdTe crystals, can accumulate on the surface of the second CdTe layer. This happens due to the grain boundary assisted preferential impurity diffusion, especially due to the second CdTe layer with smaller grains. The excess doping elements can be washed or rinsed away by using suitable solvents or a following process of nitric-phosphoric acid etching can remove it.

The inventive method for producing a solar cell may be used for producing solar cells in a superstrate configuration or in a substrate configuration.

The method for producing a solar cell in superstrate configuration further comprises providing a transparent substrate, preferably of glass, applying a transparent front contact layer or layer stack, for instance of TCO, and applying a CdS layer on the transparent front contact layer or layer stack. After applying the CdS layer, the above described inventive method is performed, wherein the layer stack comprising the transparent substrate, the transparent front contact layer and the CdS layer serves as the base layer for applying the first CdTe layer. That is, the first CdTe layer, the sacrificial doping layer and the second CdTe layer are applied in this order onto the CdS layer. Further, the described temperature treatment process, for instance a CdCh activation process and nitric-phosphoric acid etching process, may be performed, before applying a back contact layer or layer stack. The CdTe surface is washed using suitable solution such as water or methanol. The back contact layer may comprise a metal, any other suitable conductive material or a suitable semiconducting layer (such as Sb3Te2) according to the state of art.

In the production process of substrate configuration solar cells, the steps in addition to the steps of applying the first CdTe layer having large grains, applying the sacrificial doping layer and applying the second CdTe layer having small grains are performed basically in a reverse order. The substrate can be a flexible metal foil such as molybdenum which can serve as back contact to collect the photo induced electrical charges or can be any other suitable substrate according to the state of art. Thus, first a substrate is provided on which the back contact layer or layer stack is applied, followed by applying the first CdTe layer, the sacrificial doping layer and the second CdTe layer. That is, the layer stack comprising the substrate and the back contact layer serves as the base layer for applying the first CdTe layer. Subsequently, the CdS layer and the transparent front contact layer, for instance TCO, are applied, wherein a temperature treatment process as described above may be performed after applying the second CdTe layer or even after applying the CdS layer and/or the transparent front contact layer. Optionally, depending on the CdS and TCO deposition methods, the diffusion of the doping element can also happen already during CdS and/or TCO deposition process. In case a CdCh activation process is involved, the doping element can also diffuse during the activation process. In such conditions, an additional post annealing treatment to diffuse the doping element may not be necessary.

The process steps of applying a (transparent) substrate, applying a front contact layer, applying a CdS layer and applying a back contact layer are performed according to well-known methods from prior art and are therefore not described in detail herein. It should be noted that, in the production process of substrate configuration solar cells, the step of applying a CdS layer should be performed at relatively low substrate temperatures in the range of 200°C to 350°C in order to prevent re-evaporation of the CdTe layer. This can be achieved by using a well-known sputtering process for depositing the CdS layer.

Figures

Fig. 1 schematically shows the layer structure of a solar cell according to the state of the art. Said solar cell comprises on the substrate (1) a layer sequence consisting of front contact (21), CdS layer (3), CdTe layer (4) and back contact (22).

Fig. 2a to 2d schematically shows the layer sequences, as they may be observed during the course of the method according to the invention. Exemplary Embodiment

The method according to the invention is explained in the following in a first exemplary embodiment showing the making of a solar cell in superstrate configuration, without intending to imply a restriction to said embodiment.

As shown in Fig. 2a, the front contact (21) and the CdS layer (3) have already been applied on the transparent substrate (1) by means of methods according to the state of the art. As front contact (21), a 450 nm thick transparent bi-layer [Fluorine doped tin oxide (350 nm) as conducting layer and tin oxide (100 nm) as high resistive buffer] was applied (as TCO). The CdS layer (3) reaches a thickness of 90 nm and was deposited using CSS technique. On this, the first CdTe layer (41) according to the invention is deposited with a thickness of 1.6 pm. The deposition process was performed as a CSS process at a substrate temperature of 530°C resulting in large grains of the deposited layer.

Fig. 2b schematically shows the applied sacrificial doping layer (5) above the first CdTe layer (41). The sacrificial doping layer (5) consists of elemental antimony (Sb) and was deposited with a thickness of 2 nm using a sputter process at a substrate temperature of 280°C.

Fig. 2c schematically shows the layer stack of the solar cell after depositing the second CdTe layer (42) on the sacrificial doping layer (5). The second CdTe layer (42) was deposited with a thickness of 400 nm using a CSS process at a substrate temperature of 300°C. The second CdTe layer (42) has small grains which cover the grain boundaries of the first CdTe layer (41). The sacrificial doping layer (5) does not cover the grain boundaries of the first CdTe layer (41) completely caused by the very small layer thickness of the sacrificial doping layer (5). However, it is uniformly distributed over the first CdTe layer surface. This ensures uniform doping of the resulting CdTe layer. Furthermore, the sacrificial doping layer (5) starts to break up during the deposition of the second CdTe layer (42), wherein the antimony moves into the first CdTe layer (41) as well as in the partly deposited second CdTe layer (42). However, since the antimony is not diffused into the first CdTe layer (41) and the second CdTe layer (42) to a large degree at this process step, the already diffused antimony atoms as well as a reduced thickness of the sacrificial doping layer (5) are not illustrated in Fig. 2c.

Subsequently, the known CdCH activation step is performed at a temperature of 385°C for 20 min.

Fig. 2d schematically shows a solar cell after completing the back contact procedure. A back contact (22) comprising a metal, in this case molybdenum (Mo), has been created having a layer sequence which corresponds to that known from prior art. As shown, the sacrificial doping layer (5) is completely broken down and diffused into the CdTe layer (40) resulting from the fusion of the first CdTe layer (41) and the second CdTe layer (42), wherein the resulting CdTe layer (40) is doped with antimony (indicated by the points within the CdTe layer (40)). The diffusion of the doping element into the first and the second CdTe layers (41, 42) as well as the total breakdown of the sacrificial doping layer (5) may happen at any time during the CdCH activation step and/or during the creation of the back contact (22) resulting in the shown layer arrangement.

The CdTe layer (40) is nearly uniformly doped, which means that no or only a small concentration gradient of the antimony in the CdTe layer (40) can be seen.

Reference numerals 1 Substrate (glass) 21 Front contact (transparent, TCO) 22 back contact (metal) 3 CdS layer 4 CdTe layer (state of the art) 40 CdTe layer 41 first CdTe layer 42 second CdTe layer 5 sacrificial doping layer

Claims (16)

A method for manufacturing a solar cell, comprising the steps of: a) applying a first CdTe layer to a base layer, wherein the CdTe layer has granules of a first size, b) applying a sacrificial doping layer comprising a doping element on the first CdTe layer, and c) applying a second CdTe layer to the sacrificial doping layer, wherein the second CdTe layer has grains of a second size, the second size being smaller than the first size. Method according to claim 1, characterized in that the sacrificial doping layer comprises one of the group comprising copper, phosphorus, antimony, bismuth, molybdenum or manganese as the doping element. Method according to claim 1 or 2, characterized in that the doping element is presented as a layer that contains only one element. Method according to claim 1 or 2, characterized in that the doping element is applied in a combination of different doping elements or in a composition. The method according to claim 4, characterized in that the composition comprises a halogen. A method according to any one of the preceding claims, characterized in that the sacrificial doping layer is applied by a sputtering process or by a process using a liquid solution comprising the doping element. A method according to any one of the preceding claims, characterized in that the sacrificial doping layer is applied with a thickness in a range of 2 nm to 15 nm. A method according to any one of the preceding claims, characterized in that the sacrificial doping layer is applied to a substrate temperature in a range of room temperature to 350 ° C. A method according to any one of the preceding claims, characterized in that the first CdTe layer is deposited at a substrate temperature in the range of 490 ° C to 540 ° C with a thickness in the range of 0.5 µm to 6 µm. The method according to claim 9, characterized in that the first CdTe layer is deposited with a thickness in the range of lpm to 1.8pm. A method according to any one of the preceding claims, characterized in that the second CdTe layer is deposited at a substrate temperature in the range of 200 ° C to 350 ° C with a thickness of 20% to 40% of the total layer thickness of a CdTe layer it consists of the first CdTe layer and the second CdTe layer. A method according to any one of the preceding claims, characterized in that the method further comprises a temperature treatment step which after said step c) is carried out at a temperature in the range of 300 ° C to 550 ° C. Method according to claim 12, characterized in that the temperature treatment step is carried out at a temperature in the range of 300 ° C to 450 ° C. A method according to claim 12 or 13, characterized in that during the temperature treatment step a material comprising a halogen is applied to the surface of the second CdTe layer. A method according to any one of the preceding claims, characterized in that the method further comprises the steps of: d) making a transparent substrate available, e) applying a transparent front contact layer, f) applying a CdS layer, and g ) applying a back-contact layer in which steps d), e) and f) are performed in this order before performing steps a), b) and c) and wherein step g) is performed after performing of steps a), b) and c) and wherein the layer stack of transparent substrate, the transparent front contact layer and the CdS layer forms the base layer. A method according to any one of the preceding claims, characterized in that the method further comprises the steps of: h) making a substrate available, i) applying a back contact layer, j) applying a CdS layer, and k) applying a a transparent front contact layer, in which steps h) and i) are performed in this order before performing steps a), b) and c) and steps j) and k) are performed after performing steps a), b) and c) and wherein the layer stack comprises substrate and the back contact forms the base layer.