MY164683A - Manufacturing method of semiconductor device using a heat-resistant adhesive sheet - Google Patents
Manufacturing method of semiconductor device using a heat-resistant adhesive sheetInfo
- Publication number
- MY164683A MY164683A MYPI2010002639A MYPI2010002639A MY164683A MY 164683 A MY164683 A MY 164683A MY PI2010002639 A MYPI2010002639 A MY PI2010002639A MY PI2010002639 A MYPI2010002639 A MY PI2010002639A MY 164683 A MY164683 A MY 164683A
- Authority
- MY
- Malaysia
- Prior art keywords
- heat
- resistant adhesive
- adhesive sheets
- lead frame
- semiconductor chip
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector involving a temporary auxiliary member not forming part of the bonding apparatus, e.g. removable or sacrificial coating, film or substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
- H01L2924/15747—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Die Bonding (AREA)
- Adhesives Or Adhesive Processes (AREA)
- Adhesive Tapes (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
THIS DISCLOSURE PROVIDES A METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES USING HEAT-RESISTANT ADHESIVE SHEETS (3), MORE SPECIFICALLY TO A METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES USING HEAT-RESISTANT ADHESIVE SHEETS (3) WHICH CAN PRECLUDE DEFECTIVE PRODUCTS CAUSED BY ADHESIVE SHEETS DURING THE INSTALLATION PROCESS BY ATTACHING THE HEAT-RESISTANT ADHESIVE SHEETS (3) AFTER THE INSTALLATION PROCESS IN WHICH THE HEAT-RESISTANT ADHESIVE SHEETS (3) ARE EXPOSED TO HIGH TEMPERATURE FOR A LONG TIME, WHICH NOT ONLY CAN DESIRABLY PREVENT THE LEAKAGE OF RESIN WITH HIGH WETTABILITY OF AN ADHESIVE LAYER DURING THE SEALING PROCESS, BUT ALSO CAN PREVENT ANY RESIDUES FROM REMAINING ON AN ATTACHMENT SURFACE DURING THE PEELING PROCESS WITH THE HEAT-RESISTANCE SECURED BY A CROSS-LINKING REACTION THROUGH ENERGY-BEAM IRRADIATION, AND WHICH CAN AVOID OXIDATION ON THE ATTACHMENT SURFACE OF METAL OR THE LIKE AT HIGH TEMPERATURE, THEREBY SECURING RELIABILITY AND WORKABILITY. A METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES USING HEAT-RESISTANT ADHESIVE SHEETS (3) COMPRISING THE PROCESSES OF: (A) PREPARING A METALLIC LEAD FRAME; (B) INSTALLING A SEMICONDUCTOR CHIP (5) ONTO THE METALLIC LEAD FRAME; (C) CONNECTING LEADS OF THE METALLIC LEAD FRAME WITH THE SEMICONDUCTOR CHIP (5) THROUGH WIRES; (D) ATTACHING AND LAMINATING THE METALLIC LEAD FRAME THAT HAS THE SEMICONDUCTOR CHIP (5) INSTALLED THEREON AND THE WIRES CONNECTED THERETO WITH A HEAT-RESISTANT ADHESIVE SHEET (3); (E) SEALING THE SEMICONDUCTOR CHIP (5) WITH A SEALING RESIN (8); AND (F) REMOVING THE HEAT-RESISTANT ADHESIVE SHEET (3) AFTER THE COMPLETION OF THE SEALING.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020100007018A KR20110087547A (en) | 2010-01-26 | 2010-01-26 | Manufacturing method of semiconductor device using a heat-resistant adhesive sheet |
Publications (1)
Publication Number | Publication Date |
---|---|
MY164683A true MY164683A (en) | 2018-01-30 |
Family
ID=44296172
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MYPI2010002639A MY164683A (en) | 2010-01-26 | 2010-06-08 | Manufacturing method of semiconductor device using a heat-resistant adhesive sheet |
Country Status (4)
Country | Link |
---|---|
KR (1) | KR20110087547A (en) |
CN (1) | CN102136432B (en) |
MY (1) | MY164683A (en) |
TW (1) | TWI427715B (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101364438B1 (en) * | 2012-09-21 | 2014-02-18 | 도레이첨단소재 주식회사 | Manufacturing method of semiconductor device using a energy ray -responsive heat-resistant adhesive sheet |
CN103923577B (en) * | 2014-05-12 | 2016-06-01 | 吴江友鑫新材料科技有限公司 | It is applicable to high temperature resistant protective membrane and its preparation method of non-ITO conducting film |
WO2018178821A2 (en) * | 2017-03-31 | 2018-10-04 | 3M Innovative Properties Company | Electronic devices including solid semiconductor dies |
KR102203869B1 (en) | 2018-03-28 | 2021-01-18 | 주식회사 엘지화학 | Adhesieve sheet for temporary-attamchment and methode for producing semiconductor device using the same |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3849978B2 (en) * | 2002-06-10 | 2006-11-22 | 日東電工株式会社 | Semiconductor device manufacturing method and heat-resistant adhesive tape used therefor |
JP3934041B2 (en) * | 2002-12-02 | 2007-06-20 | 日東電工株式会社 | Semiconductor device manufacturing method and heat-resistant adhesive tape used therefor |
JP4421204B2 (en) * | 2003-03-25 | 2010-02-24 | 株式会社巴川製紙所 | Adhesive sheet for manufacturing semiconductor device, semiconductor device using the same, and manufacturing method |
JP4319892B2 (en) * | 2003-11-07 | 2009-08-26 | 株式会社巴川製紙所 | Adhesive sheet for manufacturing semiconductor device and method for manufacturing semiconductor device |
JP4566568B2 (en) * | 2004-01-23 | 2010-10-20 | 日東電工株式会社 | Semiconductor device manufacturing method and heat-resistant adhesive tape used therefor |
US7169651B2 (en) * | 2004-08-11 | 2007-01-30 | Advanced Semiconductor Engineering, Inc. | Process and lead frame for making leadless semiconductor packages |
JP2008144047A (en) * | 2006-12-11 | 2008-06-26 | Three M Innovative Properties Co | Heat-resistant masking tape and method for using the same |
-
2010
- 2010-01-26 KR KR1020100007018A patent/KR20110087547A/en active Application Filing
- 2010-06-08 MY MYPI2010002639A patent/MY164683A/en unknown
- 2010-06-25 TW TW099120799A patent/TWI427715B/en active
- 2010-07-30 CN CN2010102433979A patent/CN102136432B/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN102136432A (en) | 2011-07-27 |
TW201126617A (en) | 2011-08-01 |
KR20110087547A (en) | 2011-08-03 |
TWI427715B (en) | 2014-02-21 |
CN102136432B (en) | 2013-09-11 |
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