MX348002B - Dispositivo semiconductor que tiene características para evitar la ingeniería inversa. - Google Patents
Dispositivo semiconductor que tiene características para evitar la ingeniería inversa.Info
- Publication number
- MX348002B MX348002B MX2015008948A MX2015008948A MX348002B MX 348002 B MX348002 B MX 348002B MX 2015008948 A MX2015008948 A MX 2015008948A MX 2015008948 A MX2015008948 A MX 2015008948A MX 348002 B MX348002 B MX 348002B
- Authority
- MX
- Mexico
- Prior art keywords
- disclosed
- devices
- reverse engineering
- features
- semiconductor device
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/57—Protection from inspection, reverse engineering or tampering
- H01L23/573—Protection from inspection, reverse engineering or tampering using passive means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
Es deseable diseñar y fabricar chips electrónicos que sean resistentes a las técnicas de ingeniería inversa modernas; se divulga un método y dispositivo que permiten el diseño de los chips cuya ingeniería inversa es difícil de ejecutar utilizando técnicas de desmontaje modernas; el dispositivo divulgado utiliza dispositivos que tienen la misma geometría pero diferentes niveles de voltaje para crear diferentes niveles lógicos; alternativamente, la invención divulgada utiliza dispositivos que tienen diferentes geometrías y las mismas características operativas; también se divulga un método para diseñar un chip utilizando estos dispositivos.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/739,401 US20130320491A1 (en) | 2011-06-07 | 2013-01-11 | Semiconductor Device Having Features to Prevent Reverse Engineering |
PCT/US2014/010185 WO2014109961A1 (en) | 2013-01-11 | 2014-01-03 | Semiconductor device having features to prevent reverse engineering |
Publications (2)
Publication Number | Publication Date |
---|---|
MX2015008948A MX2015008948A (es) | 2015-09-28 |
MX348002B true MX348002B (es) | 2017-01-05 |
Family
ID=51167305
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2015008948A MX348002B (es) | 2013-01-11 | 2014-01-03 | Dispositivo semiconductor que tiene características para evitar la ingeniería inversa. |
Country Status (7)
Country | Link |
---|---|
EP (1) | EP2943979A4 (es) |
CN (1) | CN104969345B (es) |
AP (1) | AP2015008585A0 (es) |
CA (1) | CA2897082A1 (es) |
EA (1) | EA201591224A1 (es) |
MX (1) | MX348002B (es) |
WO (1) | WO2014109961A1 (es) |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4766516A (en) * | 1987-09-24 | 1988-08-23 | Hughes Aircraft Company | Method and apparatus for securing integrated circuits from unauthorized copying and use |
US4933898A (en) * | 1989-01-12 | 1990-06-12 | General Instrument Corporation | Secure integrated circuit chip with conductive shield |
US5783846A (en) * | 1995-09-22 | 1998-07-21 | Hughes Electronics Corporation | Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering |
US20020096744A1 (en) * | 2001-01-24 | 2002-07-25 | Hrl Laboratories, Llc | Integrated circuits protected against reverse engineering and method for fabricating the same using etched passivation openings in integrated circuits |
US7135734B2 (en) * | 2001-08-30 | 2006-11-14 | Micron Technology, Inc. | Graded composition metal oxide tunnel barrier interpoly insulators |
JP2010016164A (ja) | 2008-07-03 | 2010-01-21 | Nec Electronics Corp | 半導体集積回路の設計方法、製造方法、回路設計プログラム、及び半導体集積回路 |
US20120313664A1 (en) * | 2011-06-07 | 2012-12-13 | Static Control Components, Inc. | Semiconductor Device Having Features to Prevent Reverse Engineering |
-
2014
- 2014-01-03 EP EP14737723.8A patent/EP2943979A4/en not_active Withdrawn
- 2014-01-03 MX MX2015008948A patent/MX348002B/es active IP Right Grant
- 2014-01-03 AP AP2015008585A patent/AP2015008585A0/xx unknown
- 2014-01-03 CA CA2897082A patent/CA2897082A1/en not_active Abandoned
- 2014-01-03 CN CN201480004534.XA patent/CN104969345B/zh not_active Expired - Fee Related
- 2014-01-03 WO PCT/US2014/010185 patent/WO2014109961A1/en active Application Filing
- 2014-01-03 EA EA201591224A patent/EA201591224A1/ru unknown
Also Published As
Publication number | Publication date |
---|---|
EA201591224A1 (ru) | 2016-02-29 |
EP2943979A4 (en) | 2017-05-17 |
EP2943979A1 (en) | 2015-11-18 |
WO2014109961A1 (en) | 2014-07-17 |
MX2015008948A (es) | 2015-09-28 |
CN104969345A (zh) | 2015-10-07 |
AP2015008585A0 (en) | 2015-07-31 |
CN104969345B (zh) | 2018-12-07 |
CA2897082A1 (en) | 2014-07-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FG | Grant or registration | ||
HC | Change of company name or juridical status |
Owner name: SUNPOWER CORPORATION |