MX347111B - Transmision libre de bloqueo de datos de codigo ejecutable. - Google Patents
Transmision libre de bloqueo de datos de codigo ejecutable.Info
- Publication number
- MX347111B MX347111B MX2015001127A MX2015001127A MX347111B MX 347111 B MX347111 B MX 347111B MX 2015001127 A MX2015001127 A MX 2015001127A MX 2015001127 A MX2015001127 A MX 2015001127A MX 347111 B MX347111 B MX 347111B
- Authority
- MX
- Mexico
- Prior art keywords
- opcode
- memory
- opcodes
- long
- executable code
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/3016—Decoding the operand specifier, e.g. specifier format
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3816—Instruction alignment, e.g. cache line crossing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3818—Decoding for concurrent execution
- G06F9/382—Pipelined decoding, e.g. using predecoding
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
Abstract
Un desensamblador recibe instrucciones y las desensambla en una pluralidad de códigos de operación separados. El desensamblador crea una tabla que identifica los límites entre cada código de operación. Cada código de operación es escrito a una memoria en una forma de código de operación por código de operación al escribir automáticamente bloques estándares de memoria. Se anexan códigos de operación de punto de ruptura de depuración al código de operación para crear un bloque completo de memoria cuando es necesario. El bloque de memoria puede tener una longitud de treinta y dos bits o sesenta y cuatro bits, por ejemplo, los códigos de operación largos pueden traslapar dos o más bloques de memoria. Los códigos de operación de punto de ruptura de depuración pueden ser anexados a una segunda porción del código de operación largo para crear un bloque completo de memoria. Un interceptar de falla de transmisión identifica cuando una página de datos solicitada no está disponible y recupera la página de datos.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/560,216 US9436474B2 (en) | 2012-07-27 | 2012-07-27 | Lock free streaming of executable code data |
PCT/US2013/052153 WO2014018812A1 (en) | 2012-07-27 | 2013-07-26 | Lock free streaming of executable code data |
Publications (2)
Publication Number | Publication Date |
---|---|
MX2015001127A MX2015001127A (es) | 2015-04-08 |
MX347111B true MX347111B (es) | 2017-04-12 |
Family
ID=48985821
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2015001127A MX347111B (es) | 2012-07-27 | 2013-07-26 | Transmision libre de bloqueo de datos de codigo ejecutable. |
Country Status (11)
Country | Link |
---|---|
US (2) | US9436474B2 (es) |
EP (1) | EP2877918B1 (es) |
JP (1) | JP6328632B2 (es) |
KR (1) | KR102042304B1 (es) |
CN (1) | CN104508626B (es) |
AU (2) | AU2013295686B2 (es) |
BR (1) | BR112015001476B1 (es) |
CA (1) | CA2878558C (es) |
MX (1) | MX347111B (es) |
RU (1) | RU2639235C2 (es) |
WO (1) | WO2014018812A1 (es) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9747189B2 (en) | 2015-11-12 | 2017-08-29 | International Business Machines Corporation | Breakpoint for predicted tuple processing time in a streaming environment |
CN107797821B (zh) * | 2016-09-05 | 2021-10-08 | 上海宝存信息科技有限公司 | 重试读取方法以及使用该方法的装置 |
Family Cites Families (45)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5768575A (en) * | 1989-02-24 | 1998-06-16 | Advanced Micro Devices, Inc. | Semi-Autonomous RISC pipelines for overlapped execution of RISC-like instructions within the multiple superscalar execution units of a processor having distributed pipeline control for sepculative and out-of-order execution of complex instructions |
JPH0395629A (ja) | 1989-09-08 | 1991-04-22 | Fujitsu Ltd | データ処理装置 |
JPH03216734A (ja) * | 1990-01-22 | 1991-09-24 | Hitachi Micro Comput Eng Ltd | データ処理方法及び中央処理装置 |
JPH05312838A (ja) * | 1992-05-12 | 1993-11-26 | Iwatsu Electric Co Ltd | ロジック・アナライザ |
US6009508A (en) * | 1994-06-21 | 1999-12-28 | Sgs-Thomson Microelectronics Limited | System and method for addressing plurality of data values with a single address in a multi-value store on FIFO basis |
GB9412434D0 (en) * | 1994-06-21 | 1994-08-10 | Inmos Ltd | Computer instruction compression |
WO1996017291A1 (en) * | 1994-12-02 | 1996-06-06 | Intel Corporation | Microprocessor with packing operation of composite operands |
US6212574B1 (en) | 1997-04-04 | 2001-04-03 | Microsoft Corporation | User mode proxy of kernel mode operations in a computer operating system |
US5946484A (en) * | 1997-05-08 | 1999-08-31 | The Source Recovery Company, Llc | Method of recovering source code from object code |
US6061772A (en) * | 1997-06-30 | 2000-05-09 | Sun Microsystems, Inc. | Split write data processing mechanism for memory controllers utilizing inactive periods during write data processing for other transactions |
US6282698B1 (en) * | 1998-02-09 | 2001-08-28 | Lucent Technologies Inc. | Detecting similarities in Java sources from bytecodes |
US6119115A (en) | 1998-03-12 | 2000-09-12 | Microsoft Corporation | Method and computer program product for reducing lock contention in a multiple instruction execution stream processing environment |
EP0955578A1 (en) * | 1998-05-04 | 1999-11-10 | International Business Machines Corporation | Method and device for carrying out a function assigned to an instruction code |
US6077312A (en) * | 1998-05-06 | 2000-06-20 | International Business Machines Corporation | Apparatus, program product and method of debugging utilizing a context sensitive breakpoint |
US6253309B1 (en) | 1998-09-21 | 2001-06-26 | Advanced Micro Devices, Inc. | Forcing regularity into a CISC instruction set by padding instructions |
US6397273B2 (en) | 1998-12-18 | 2002-05-28 | Emc Corporation | System having an enhanced parity mechanism in a data assembler/disassembler for use in a pipeline of a host-storage system interface to global memory |
US6408382B1 (en) * | 1999-10-21 | 2002-06-18 | Bops, Inc. | Methods and apparatus for abbreviated instruction sets adaptable to configurable processor architecture |
US20030023960A1 (en) * | 2001-07-25 | 2003-01-30 | Shoab Khan | Microprocessor instruction format using combination opcodes and destination prefixes |
US7444500B1 (en) | 2000-08-14 | 2008-10-28 | General Software, Inc. | Method for executing a 32-bit flat address program during a system management mode interrupt |
US6708326B1 (en) * | 2000-11-10 | 2004-03-16 | International Business Machines Corporation | Method, system and program product comprising breakpoint handling mechanism for debugging and/or monitoring a computer instruction sequence |
US20040059641A1 (en) * | 2002-06-25 | 2004-03-25 | Lucas Brown | System and method for creating user selected customized digital data compilations |
US7917734B2 (en) * | 2003-06-30 | 2011-03-29 | Intel Corporation | Determining length of instruction with multiple byte escape code based on information from other than opcode byte |
US7581082B2 (en) | 2005-05-13 | 2009-08-25 | Texas Instruments Incorporated | Software source transfer selects instruction word sizes |
US7506206B2 (en) | 2005-06-07 | 2009-03-17 | Atmel Corporation | Mechanism for providing program breakpoints in a microcontroller with flash program memory |
US20070006189A1 (en) * | 2005-06-30 | 2007-01-04 | Intel Corporation | Apparatus, system, and method of detecting modification in a self modifying code |
US7761864B2 (en) * | 2005-08-09 | 2010-07-20 | Intermec Ip Corp. | Method, apparatus and article to load new instructions on processor based devices, for example, automatic data collection devices |
US20070079177A1 (en) * | 2005-09-30 | 2007-04-05 | Charles Spirakis | Process monitoring and diagnosis apparatus, systems, and methods |
US7703088B2 (en) * | 2005-09-30 | 2010-04-20 | Intel Corporation | Compressing “warm” code in a dynamic binary translation environment |
US20070168736A1 (en) * | 2005-12-19 | 2007-07-19 | Ottavi Robert P | Breakpoint groups |
US8584109B2 (en) * | 2006-10-27 | 2013-11-12 | Microsoft Corporation | Virtualization for diversified tamper resistance |
US8037459B2 (en) * | 2007-07-31 | 2011-10-11 | International Business Machines Corporation | Recovery from nested exceptions in an instrumentation routine |
US8185783B2 (en) | 2007-11-22 | 2012-05-22 | Microsoft Corporation | Split user-mode/kernel-mode device driver architecture |
CN102077195A (zh) * | 2008-05-08 | 2011-05-25 | Mips技术公司 | 具有紧凑指令集架构的微处理器 |
US8423961B2 (en) | 2008-06-06 | 2013-04-16 | Microsoft Corporation | Simulating operations through out-of-process execution |
US8103912B2 (en) * | 2008-09-07 | 2012-01-24 | EADS North America, Inc. | Sequencer and test system including the sequencer |
KR101581001B1 (ko) * | 2009-03-30 | 2015-12-30 | 삼성전자주식회사 | 프로그램의 동적 분석 방법 및 그 장치 |
US9274796B2 (en) * | 2009-05-11 | 2016-03-01 | Arm Finance Overseas Limited | Variable register and immediate field encoding in an instruction set architecture |
CN101853148B (zh) | 2009-05-19 | 2014-04-23 | 威盛电子股份有限公司 | 适用于微处理器的装置及方法 |
US20120079459A1 (en) * | 2010-09-29 | 2012-03-29 | International Business Machines Corporation | Tracing multiple threads via breakpoints |
US9176738B2 (en) * | 2011-01-12 | 2015-11-03 | Advanced Micro Devices, Inc. | Method and apparatus for fast decoding and enhancing execution speed of an instruction |
US9053233B2 (en) * | 2011-08-15 | 2015-06-09 | Freescale Semiconductor, Inc. | Method and device for controlling debug event resources |
GB2501299A (en) * | 2012-04-19 | 2013-10-23 | Ibm | Analysing computer program instructions to determine if an instruction can be replaced with a trap or break point. |
US8990627B2 (en) * | 2012-05-23 | 2015-03-24 | Red Hat, Inc. | Leveraging page fault and page reclaim capabilities in debugging |
US9342284B2 (en) * | 2013-09-27 | 2016-05-17 | Intel Corporation | Optimization of instructions to reduce memory access violations |
US9619346B2 (en) * | 2013-10-31 | 2017-04-11 | Assured Information Security, Inc. | Virtual machine introspection facilities |
-
2012
- 2012-07-27 US US13/560,216 patent/US9436474B2/en active Active
-
2013
- 2013-07-26 AU AU2013295686A patent/AU2013295686B2/en active Active
- 2013-07-26 BR BR112015001476-3A patent/BR112015001476B1/pt active IP Right Grant
- 2013-07-26 CN CN201380039991.8A patent/CN104508626B/zh active Active
- 2013-07-26 WO PCT/US2013/052153 patent/WO2014018812A1/en active Application Filing
- 2013-07-26 MX MX2015001127A patent/MX347111B/es active IP Right Grant
- 2013-07-26 CA CA2878558A patent/CA2878558C/en active Active
- 2013-07-26 RU RU2015102341A patent/RU2639235C2/ru active
- 2013-07-26 KR KR1020157002060A patent/KR102042304B1/ko active IP Right Grant
- 2013-07-26 EP EP13748402.8A patent/EP2877918B1/en active Active
- 2013-07-26 JP JP2015524457A patent/JP6328632B2/ja active Active
-
2016
- 2016-09-06 US US15/257,794 patent/US9841976B2/en active Active
-
2018
- 2018-07-13 AU AU2018205196A patent/AU2018205196B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US9841976B2 (en) | 2017-12-12 |
CA2878558A1 (en) | 2014-01-30 |
WO2014018812A1 (en) | 2014-01-30 |
KR102042304B1 (ko) | 2019-11-07 |
AU2013295686B2 (en) | 2018-04-19 |
RU2639235C2 (ru) | 2017-12-20 |
JP2015524591A (ja) | 2015-08-24 |
EP2877918B1 (en) | 2022-02-16 |
KR20150040277A (ko) | 2015-04-14 |
MX2015001127A (es) | 2015-04-08 |
AU2013295686A1 (en) | 2015-01-29 |
CA2878558C (en) | 2020-11-03 |
EP2877918A1 (en) | 2015-06-03 |
RU2015102341A (ru) | 2016-08-10 |
AU2018205196A1 (en) | 2018-08-02 |
BR112015001476A2 (pt) | 2017-07-04 |
CN104508626A (zh) | 2015-04-08 |
US20160371083A1 (en) | 2016-12-22 |
AU2018205196B2 (en) | 2019-07-25 |
CN104508626B (zh) | 2017-06-13 |
JP6328632B2 (ja) | 2018-05-23 |
BR112015001476B1 (pt) | 2022-06-28 |
US20140032883A1 (en) | 2014-01-30 |
US9436474B2 (en) | 2016-09-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
BR112016007138A2 (pt) | gerenciamento de dados para dispositivos conecta-dos | |
GB2495360B (en) | Exploiting an architected last-use operand indication in a computer system operand resource pool | |
BR112015006450A2 (pt) | teste de conformidade de fluxo de bits em codificação de vídeo | |
BR112016004057A8 (pt) | Dispositivo e método de comunicação | |
GB201211274D0 (en) | Method and system method for pipelining out-of-order instructions | |
IN2013DE00589A (es) | ||
EP2979180A4 (en) | METHODS, SYSTEMS, AND COMPUTER-READABLE MEDIA FOR EMULATING VIRTUALIZATION RESOURCES | |
BR112014007935A8 (pt) | Sistema para criar um relatório em uma planilha e métodos para identificar relações entre tabelas em uma planilha | |
BR112014026659A8 (pt) | aparelho e método para decodificar um fluxo de mídia e aparelho para enviar um fluxo de mídia codificado | |
MX343372B (es) | Instrucción de cargar datos a una frontera de memoria especificada indicada por la instrucción. | |
BR112012007445A2 (pt) | dados de treinamento de face compartilhados | |
BR112014022638A8 (pt) | Método, suporte físico e equipamento para transformar especificadores de instrução de um ambiente computacional | |
MY172572A (en) | Exception handling in a data processing apparatus having a secure domain and a less secure domain | |
BR102013031320A8 (pt) | sistema e meio legível por computador não-transitório | |
BR112015030122A2 (pt) | aparelho e método para acelerar operações de compressão e descompressão | |
BR112013006661A2 (pt) | método e aparelho para operações de lógica universal | |
BR112014007472A2 (pt) | recuperação de imagens | |
BR112014032523A2 (pt) | sincronismo de tempo de uma alimentação paralela de conteúdo secundário com conteúdo de meio primário | |
BR112014023577A8 (pt) | método e dispositivo de codificação de sinal de áudio e método e dispositivo de decodificação de sinal de áudio | |
BR112018006100A2 (pt) | método e aparelho para deduplicação de linha de cache por meio de correspondência de dados | |
MX370195B (es) | Tubo con etiqueta y metodo para mantenimiento del tubo. | |
WO2014071058A3 (en) | Tracking and reclaiming physical registers | |
BR112015008303A2 (pt) | sistema, método implantado por processador e artigo | |
BR112015019392A2 (pt) | gerenciamento de latência de memória | |
GB201211273D0 (en) | Multilevel cache system |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
FG | Grant or registration |