MX2019015458A - Diseño de valores de desplazamiento para codigos de ldpc cuasi-ciclicos. - Google Patents

Diseño de valores de desplazamiento para codigos de ldpc cuasi-ciclicos.

Info

Publication number
MX2019015458A
MX2019015458A MX2019015458A MX2019015458A MX2019015458A MX 2019015458 A MX2019015458 A MX 2019015458A MX 2019015458 A MX2019015458 A MX 2019015458A MX 2019015458 A MX2019015458 A MX 2019015458A MX 2019015458 A MX2019015458 A MX 2019015458A
Authority
MX
Mexico
Prior art keywords
pcm
quasi
design
shift values
ldpc codes
Prior art date
Application number
MX2019015458A
Other languages
English (en)
Inventor
Blankenship Yufei
Andersson Mattias
Sandberg Sara
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=62748996&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=MX2019015458(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Publication of MX2019015458A publication Critical patent/MX2019015458A/es

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1168—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices wherein the sub-matrices have column and row weights greater than one, e.g. multi-diagonal sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/033—Theoretical methods to calculate these checking codes
    • H03M13/036—Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H04L1/0042—Encoding specially adapted to other signal generation operation, e.g. in order to reduce transmit distortions, jitter, or to improve signal shape
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0047—Decoding adapted to other signal detection operation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Algebra (AREA)
  • General Physics & Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Error Detection And Correction (AREA)

Abstract

De acuerdo con algunas modalidades, un método para usarse en un transmisor inalámbrico de una red de comunicación inalámbrica comprende codificar bits de información usando una matriz de verificación de paridad (PCM) y transmitir los bits de información codificados a un receptor inalámbrico. La matriz de verificación de paridad (PCM) es optimizada de acuerdo con dos o más restricciones de grado de mensaje extrínseco de ciclo aproximado (ACE). En algunas modalidades, una primera porción de la PCM se optimiza de acuerdo con una primera restricción de ACE y una segunda porción de la PCM se optimiza de acuerdo con una segunda restricción de ACE.
MX2019015458A 2017-06-27 2018-06-26 Diseño de valores de desplazamiento para codigos de ldpc cuasi-ciclicos. MX2019015458A (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201762525453P 2017-06-27 2017-06-27
PCT/EP2018/067098 WO2019002284A1 (en) 2017-06-27 2018-06-26 DESIGN OF QUAD-CYCLIC LDPC CODES SHIFT VALUES

Publications (1)

Publication Number Publication Date
MX2019015458A true MX2019015458A (es) 2020-02-12

Family

ID=62748996

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2019015458A MX2019015458A (es) 2017-06-27 2018-06-26 Diseño de valores de desplazamiento para codigos de ldpc cuasi-ciclicos.

Country Status (17)

Country Link
US (4) US10644724B2 (es)
EP (2) EP3672085A1 (es)
JP (1) JP6876834B2 (es)
KR (1) KR102181784B1 (es)
CN (1) CN110832782B (es)
AU (1) AU2018293680B2 (es)
BR (1) BR112019027009A2 (es)
CA (1) CA3067701C (es)
DK (1) DK3491741T3 (es)
ES (1) ES2776098T3 (es)
MA (1) MA47656B1 (es)
MX (1) MX2019015458A (es)
PH (1) PH12019502740A1 (es)
PL (1) PL3491741T3 (es)
PT (1) PT3491741T (es)
WO (1) WO2019002284A1 (es)
ZA (1) ZA201908076B (es)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
MX2019015458A (es) * 2017-06-27 2020-02-12 Ericsson Telefon Ab L M Diseño de valores de desplazamiento para codigos de ldpc cuasi-ciclicos.
EP3507909A1 (en) 2017-08-24 2019-07-10 Telefonaktiebolaget LM Ericsson (PUBL) Base graph selection for 3gpp new radio
WO2019164515A1 (en) * 2018-02-23 2019-08-29 Nokia Technologies Oy Ldpc codes for 3gpp nr ultra-reliable low-latency communications

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1993892B (zh) 2004-08-10 2012-12-26 三星电子株式会社 用于编码和解码块低密度奇偶校验码的装置和方法
CN100550655C (zh) * 2004-11-04 2009-10-14 中兴通讯股份有限公司 一种低密度奇偶校验码的编码器/译码器及其生成方法
US7343548B2 (en) * 2004-12-15 2008-03-11 Motorola, Inc. Method and apparatus for encoding and decoding data
KR101503058B1 (ko) 2008-02-26 2015-03-18 삼성전자주식회사 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서의 채널 부호화/복호화 방법 및 장치
US8341492B2 (en) 2008-07-28 2012-12-25 Broadcom Corporation Quasi-cyclic LDPC (low density parity check) code construction
US8103931B2 (en) * 2008-08-27 2012-01-24 Mitsubishi Electric Research Laboratories, Inc. Method for constructing large-girth quasi-cyclic low-density parity-check codes
CN101686061A (zh) 2008-09-27 2010-03-31 松下电器产业株式会社 构造低密度奇偶校验码的方法及发送/接收装置和系统
US20100153819A1 (en) 2008-12-12 2010-06-17 Yeong-Luh Ueng Decoding Method and System for Low-Density Parity Check Code
US8433972B2 (en) * 2009-04-06 2013-04-30 Nec Laboratories America, Inc. Systems and methods for constructing the base matrix of quasi-cyclic low-density parity-check codes
US8595589B2 (en) 2011-09-30 2013-11-26 Mitsubishi Electric Research Laboratories, Inc. Quasi-cyclic low-density parity-check codes
CN102412845A (zh) 2011-11-24 2012-04-11 桂林市思奇通信设备有限公司 基于欧氏几何的准循环低密度校验码的构造方法
KR102019893B1 (ko) * 2013-07-22 2019-09-09 삼성전자주식회사 저밀도 패리티 검사 부호를 지원하는 통신 시스템에서 신호 수신 장치 및 방법
US10313054B2 (en) 2015-01-07 2019-06-04 Avago Technologies International Sales Pte. Limited Low density parity check (LDPC) codes for communication devices and systems
MX2019015458A (es) * 2017-06-27 2020-02-12 Ericsson Telefon Ab L M Diseño de valores de desplazamiento para codigos de ldpc cuasi-ciclicos.

Also Published As

Publication number Publication date
CN110832782A (zh) 2020-02-21
PT3491741T (pt) 2020-01-16
US20200228142A1 (en) 2020-07-16
RU2731883C1 (ru) 2020-09-08
MA47656A1 (fr) 2020-11-30
JP2020535670A (ja) 2020-12-03
WO2019002284A1 (en) 2019-01-03
EP3491741A1 (en) 2019-06-05
EP3491741B1 (en) 2019-11-27
JP6876834B2 (ja) 2021-05-26
CA3067701A1 (en) 2019-01-03
CN110832782B (zh) 2024-04-02
AU2018293680B2 (en) 2021-07-29
PH12019502740A1 (en) 2020-07-13
AU2018293680A1 (en) 2020-01-02
US20190296767A1 (en) 2019-09-26
CA3067701C (en) 2022-08-16
US10644724B2 (en) 2020-05-05
KR20200004404A (ko) 2020-01-13
US20240146331A1 (en) 2024-05-02
ZA201908076B (en) 2021-04-28
DK3491741T3 (da) 2020-03-02
PL3491741T3 (pl) 2020-05-18
KR102181784B1 (ko) 2020-11-24
US20230087194A1 (en) 2023-03-23
ES2776098T3 (es) 2020-07-29
BR112019027009A2 (pt) 2020-06-30
EP3672085A1 (en) 2020-06-24
US11848685B2 (en) 2023-12-19
US11515893B2 (en) 2022-11-29
MA47656B1 (fr) 2021-02-26

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