MX2020003930A - Transmisor y metodo para generar paridad adicional del mismo. - Google Patents
Transmisor y metodo para generar paridad adicional del mismo.Info
- Publication number
- MX2020003930A MX2020003930A MX2020003930A MX2020003930A MX2020003930A MX 2020003930 A MX2020003930 A MX 2020003930A MX 2020003930 A MX2020003930 A MX 2020003930A MX 2020003930 A MX2020003930 A MX 2020003930A MX 2020003930 A MX2020003930 A MX 2020003930A
- Authority
- MX
- Mexico
- Prior art keywords
- bits
- ldpc codeword
- transmitter
- additional parity
- transmitted
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2778—Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2792—Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/3769—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 using symbol combining, e.g. Chase combining of symbols received twice or more
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/611—Specific encoding aspects, e.g. encoding by means of decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6356—Error control coding in combination with rate matching by repetition or insertion of dummy data, i.e. rate reduction
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6362—Error control coding in combination with rate matching by puncturing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0064—Concatenated codes
- H04L1/0065—Serial concatenated codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0067—Rate matching
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0067—Rate matching
- H04L1/0068—Rate matching by puncturing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0067—Rate matching
- H04L1/0068—Rate matching by puncturing
- H04L1/0069—Puncturing patterns
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Mathematical Physics (AREA)
- Multimedia (AREA)
- Algebra (AREA)
- General Physics & Mathematics (AREA)
- Pure & Applied Mathematics (AREA)
- Error Detection And Correction (AREA)
- Detection And Correction Of Errors (AREA)
Abstract
Se proporciona un transmisor. El transmisor incluye: un codificador de Comprobación de Paridad de Baja Densidad (LDPC - Low Density Parity Check) configurado para codificar los bits de entrada para generar una palabra clave de LDPC que incluye los bits de entrada y bits de paridad a ser transmitidos a un receptor en una trama actual; un repetidor configurado para repetir, en la palabra clave de LDPC, al menos algunos bits de la palabra clave de LDPC en la palabra clave de LDPC de manera tal que los bits repetidos se van a transmitir en la trama actual; un perforador configurado para perforar algunos bits de paridad; y un generador de paridad adicional configurado para seleccionar al menos algunos bits de la palabra clave de LDPC que incluye los bits repetidos, y generar bits de paridad adicionales a transmitirse en una trama anterior de la trama actual.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201562127062P | 2015-03-02 | 2015-03-02 | |
KR1020150137186A KR101800414B1 (ko) | 2015-03-02 | 2015-09-27 | 송신 장치 및 그의 부가 패리티 생성 방법 |
Publications (1)
Publication Number | Publication Date |
---|---|
MX2020003930A true MX2020003930A (es) | 2020-08-13 |
Family
ID=56848144
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2020003926A MX2020003926A (es) | 2015-03-02 | 2017-08-29 | Transmisor y metodo para generar paridad adicional del mismo. |
MX2020003930A MX2020003930A (es) | 2015-03-02 | 2017-08-29 | Transmisor y metodo para generar paridad adicional del mismo. |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2020003926A MX2020003926A (es) | 2015-03-02 | 2017-08-29 | Transmisor y metodo para generar paridad adicional del mismo. |
Country Status (6)
Country | Link |
---|---|
US (4) | US10291256B2 (es) |
KR (1) | KR102411870B1 (es) |
CN (2) | CN115567062A (es) |
CA (1) | CA3207618A1 (es) |
MX (2) | MX2020003926A (es) |
WO (1) | WO2016140511A1 (es) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10348448B2 (en) * | 2015-01-22 | 2019-07-09 | Samsung Electronics Co., Ltd. | Transmitter and repetition method thereof |
CN111711513B (zh) | 2015-02-13 | 2023-08-04 | 三星电子株式会社 | 发送器及其附加奇偶校验产生方法 |
WO2016137234A1 (en) * | 2015-02-24 | 2016-09-01 | Samsung Electronics Co., Ltd. | Transmitter and repetition method thereof |
WO2017127973A1 (en) * | 2016-01-25 | 2017-08-03 | Qualcomm Incorporated | Generation of polar codes with a variable block length utilizing puncturing |
EP3610591A1 (en) * | 2017-04-12 | 2020-02-19 | Sony Semiconductor Solutions Corporation | Transmission apparatus and method, in particular for use in a low throughput network |
US10942809B2 (en) * | 2018-12-20 | 2021-03-09 | Micron Technology, Inc. | Changing of error correction codes based on the wear of a memory sub-system |
US11582594B2 (en) * | 2019-10-11 | 2023-02-14 | Samsung Electronics Co., Ltd. | Methods and systems for managing decoding of control channels on a multi-SIM UE |
Family Cites Families (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100539864B1 (ko) | 2001-07-25 | 2005-12-28 | 삼성전자주식회사 | 부호분할다중접속 이동통신시스템에서 고속 데이터의 재전송장치 및 방법 |
KR100827147B1 (ko) | 2001-10-19 | 2008-05-02 | 삼성전자주식회사 | 부호분할다중접속 이동통신시스템에서 고속 데이터의효율적 재전송 및 복호화를 위한 송,수신장치 및 방법 |
KR20050118056A (ko) | 2004-05-12 | 2005-12-15 | 삼성전자주식회사 | 다양한 부호율을 갖는 Block LDPC 부호를 이용한이동 통신 시스템에서의 채널부호화 복호화 방법 및 장치 |
KR100856235B1 (ko) | 2005-09-26 | 2008-09-03 | 삼성전자주식회사 | 가변 부호화율을 가지는 블록 저밀도 패리티 검사 부호부호화/복호 장치 및 방법 |
KR101102396B1 (ko) | 2006-02-08 | 2012-01-05 | 엘지전자 주식회사 | 이동통신 시스템에서의 코드워드 크기 정합 방법 및 송신장치 |
RU2323520C2 (ru) * | 2006-03-21 | 2008-04-27 | Самсунг Электроникс Ко., Лтд. | Способ передачи голосовых данных в системе цифровой радиосвязи и способ перемежения последовательности кодовых символов (варианты) |
KR100834650B1 (ko) | 2006-09-04 | 2008-06-02 | 삼성전자주식회사 | 통신 시스템에서 신호 송수신 장치 및 방법 |
US7783952B2 (en) * | 2006-09-08 | 2010-08-24 | Motorola, Inc. | Method and apparatus for decoding data |
KR100981501B1 (ko) | 2006-11-06 | 2010-09-10 | 연세대학교 산학협력단 | 통신 시스템에서 신호 송신 장치 및 방법 |
KR101502623B1 (ko) | 2008-02-11 | 2015-03-16 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널부호/복호 방법 및 장치 |
CN101465655B (zh) | 2009-01-20 | 2011-04-06 | 清华大学 | 极短码长低密度奇偶校验码的编码方法 |
US8245097B2 (en) | 2009-04-27 | 2012-08-14 | Kan Ling Capital, L.L.C. | Iterative decoding of punctured low-density parity check codes by selection of decoding matrices |
US8290073B2 (en) | 2009-10-08 | 2012-10-16 | Intel Corporation | Device, system and method of communicating data over wireless communication symbols with check code |
KR20110055410A (ko) | 2009-11-18 | 2011-05-25 | 삼성전자주식회사 | 통신 시스템에서 데이터 송수신 방법 및 장치 |
EP2337259B1 (en) * | 2009-11-18 | 2021-08-25 | Samsung Electronics Co., Ltd. | Method and apparatus for transmitting and receiving data in a communication system |
US8683555B2 (en) * | 2010-02-10 | 2014-03-25 | Raytheon Company | Systems and methods to prevent denial of service attacks |
KR101806212B1 (ko) | 2011-02-22 | 2017-12-08 | 삼성전자주식회사 | 디지털 방송 시스템에서 시그널링 정보 전송 방법 및 장치 |
WO2013032156A1 (en) | 2011-08-30 | 2013-03-07 | Samsung Electronics Co., Ltd. | Method and apparatus for transmitting and receiving information in a broadcasting/communication system |
KR101922555B1 (ko) | 2011-08-30 | 2018-11-28 | 삼성전자주식회사 | 방송/통신시스템에서 정보 송수신 방법 및 장치 |
JP6025076B2 (ja) | 2012-01-11 | 2016-11-16 | マーベル ワールド トレード リミテッド | Wlanの情報ビットパディングスキーム |
US9130748B2 (en) * | 2012-02-25 | 2015-09-08 | Telefonaktiebolaget L M Ericsson (Publ) | Hybrid automatic repeat request with feedback dependent BIT selection |
WO2014122772A1 (ja) * | 2013-02-08 | 2014-08-14 | 三菱電機株式会社 | 誤り訂正符号の検査行列のデータ構造、並びに誤り訂正符号の符号化率可変装置および可変方法 |
US20150046765A1 (en) * | 2013-02-08 | 2015-02-12 | Sony Corporation | Data processing apparatus and data processing method |
EP3017596A4 (en) * | 2013-07-05 | 2017-05-31 | LG Electronics Inc. | Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals |
KR101840203B1 (ko) * | 2013-09-03 | 2018-03-20 | 엘지전자 주식회사 | 방송 신호 전송 장치, 방송 신호 수신 장치, 방송 신호 전송 방법, 및 방송 신호 수신 방법 |
KR101869222B1 (ko) * | 2013-09-15 | 2018-07-19 | 엘지전자 주식회사 | 방송 수신 장치 및 방송 수신 장치의 동작 방법 |
EP3075162A4 (en) * | 2013-11-29 | 2017-07-26 | LG Electronics Inc. | Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals |
CN104917536B (zh) * | 2014-03-11 | 2019-11-12 | 中兴通讯股份有限公司 | 一种支持低码率编码的方法及装置 |
-
2016
- 2016-03-02 CN CN202211327098.2A patent/CN115567062A/zh active Pending
- 2016-03-02 US US15/058,415 patent/US10291256B2/en active Active
- 2016-03-02 WO PCT/KR2016/002088 patent/WO2016140511A1/en active Application Filing
- 2016-03-02 CN CN202211327085.5A patent/CN115642919A/zh active Pending
- 2016-03-02 CA CA3207618A patent/CA3207618A1/en active Pending
- 2016-04-15 US US15/130,040 patent/US10291257B2/en active Active
-
2017
- 2017-08-29 MX MX2020003926A patent/MX2020003926A/es unknown
- 2017-08-29 MX MX2020003930A patent/MX2020003930A/es unknown
-
2020
- 2020-12-30 US US17/138,080 patent/US11277152B2/en active Active
-
2021
- 2021-03-08 KR KR1020210030317A patent/KR102411870B1/ko active IP Right Grant
-
2022
- 2022-01-24 US US17/582,635 patent/US11791842B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
KR20210029758A (ko) | 2021-03-16 |
CN115567062A (zh) | 2023-01-03 |
WO2016140511A1 (en) | 2016-09-09 |
US10291257B2 (en) | 2019-05-14 |
CA3207618A1 (en) | 2016-09-09 |
US20160261370A1 (en) | 2016-09-08 |
US20220149867A1 (en) | 2022-05-12 |
US20160261286A1 (en) | 2016-09-08 |
US11277152B2 (en) | 2022-03-15 |
KR102411870B1 (ko) | 2022-06-22 |
US11791842B2 (en) | 2023-10-17 |
MX2020003926A (es) | 2020-08-13 |
CN115642919A (zh) | 2023-01-24 |
US20210119644A1 (en) | 2021-04-22 |
US10291256B2 (en) | 2019-05-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
MX2020003930A (es) | Transmisor y metodo para generar paridad adicional del mismo. | |
MX2020004298A (es) | Transmisor y metodo de generacion de paridad adicional del mismo. | |
MY195547A (en) | Transmitter and Method for Generating Additional Parity Thereof | |
MX2019009591A (es) | Transmisor y metodo para generar paridad adicional del mismo. | |
MY189607A (en) | Transmitter and method for generating additional parity thereof | |
MX2019005428A (es) | Entrelazador de bits para palabra codigo de revision de paridad de baja densidad que tiene una longitud de 64800 y un indice de codigo de 4/15 y mapeo de 256 simbolos, y metodo para entrelazar bits que utiliza el mismo. | |
MX2019009590A (es) | Transmisor y metodo para generar paridad adicional del mismo. | |
MX2020004654A (es) | Transmisor y metodo de segmentacion del mismo. | |
MX2016010776A (es) | Aparato de transmision y metodo de intercalacion del mismo. | |
MX2017011082A (es) | Transmisor y metodo para generar paridad adicional del mismo. | |
MX2020003791A (es) | Entrelazador de bits para palabra codigo de revision de paridad de baja densidad que tiene una longitud de 16200 y un indice de codigo de 10/15 y mapeo de 256 simbolos, y metodo para entrelazar bits que utiliza el mismo. | |
MX2020003792A (es) | Entrelazador de bits para palabra codigo de revision de paridad de baja densidad que tiene una longitud de 16200 y un indice de codigo de 4/15 y mapeo de 16 simbolos, y metodo para entrelazar bits que utiliza el mismo. | |
MX2019008668A (es) | Transmisor y metodo de repeticion del mismo. | |
MX2019014724A (es) | Aparato de transmision y metodo de intercalacion del mismo. | |
MX2019015599A (es) | Transmisor y metodo de permutacion de paridad del mismo. | |
MX368002B (es) | Transmisor y método para generar paridad adicional del mismo. | |
MX2020010203A (es) | Transmisor y metodo de perforacion del mismo. | |
EP2624493A3 (en) | Apparatus and method for transmitting/receiving data in communication system | |
MX2019009589A (es) | Transmisor y metodo de permutacion de paridad del mismo. | |
MX2017011152A (es) | Transmisor y metodo de segmentacion del mismo. | |
MX350409B (es) | Entrelazador de bits para palabra codigo de revision de paridad de baja densidad que tiene una longitud de 64800 y un indice de codigo de 4/15 y mapeo de 256 simbolos, y metodo para entrelazar bits que utiliza el mismo. | |
MX2017010344A (es) | Transmisor y metodo de generacion de paridad adicional del mismo. | |
MX2019010687A (es) | Transmisor y metodo para generar paridad adicional del mismo. | |
MX348679B (es) | Entrelazador de bits para palabra codigo de revision de paridad de baja densidad que tiene una longitud de 16200 y un indice de codigo de 3/15 y mapeo de 64 simbolos, y metodo para entrelazar bits que utiliza el mismo. | |
MX2017011151A (es) | Transmisor y metodo de perforacion del mismo. |