MX2018005155A - Metodo para incorporar un chip invertido de circuito integrado. - Google Patents

Metodo para incorporar un chip invertido de circuito integrado.

Info

Publication number
MX2018005155A
MX2018005155A MX2018005155A MX2018005155A MX2018005155A MX 2018005155 A MX2018005155 A MX 2018005155A MX 2018005155 A MX2018005155 A MX 2018005155A MX 2018005155 A MX2018005155 A MX 2018005155A MX 2018005155 A MX2018005155 A MX 2018005155A
Authority
MX
Mexico
Prior art keywords
smart card
flip chip
vertical plane
contact pad
substrate
Prior art date
Application number
MX2018005155A
Other languages
English (en)
Inventor
Seng Ng Eng
Yong Pang Sze
Original Assignee
Seng Ng Eng
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seng Ng Eng filed Critical Seng Ng Eng
Publication of MX2018005155A publication Critical patent/MX2018005155A/es

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745Mounting details of integrated circuit chips
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/0772Physical layout of the record carrier
    • G06K19/07722Physical layout of the record carrier the record carrier being multilayered, e.g. laminated sheets
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07743External electrical contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657Stacked arrangements of devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06513Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Credit Cards Or The Like (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

Las modalidades de la invención se refieren a procesos para fabricar un dispositivo inteligente, por ejemplo una tarjeta inteligente, y configuraciones para los dispositivos de tarjetas inteligentes con mayor fiabilidad y vida útil, y un acabado mejorado. En el dispositivo de tarjeta inteligente que comprende capas de sustrato laminadas que interponen una película flexible que tiene patrón conductor en la misma, al menos un chip invertido para operar el dispositivo de tarjeta inteligente se incorpora en un primer sustrato de manera que el primer sustrato proporciona una encapsulación a al menos el chip invertido, en donde el al menos un chip invertido se dispone en una posición en un primer plano vertical; y una almohadilla de contacto, para proporcionar conexión eléctrica cuando el dispositivo de tarjeta inteligente se inserta en un lector de tarjetas inteligentes, se dispone en una posición en un segundo plano vertical, en donde el primer plano vertical no se superpone con el segundo plano vertical. La almohadilla de contacto se proyecta a través de una cavidad en un segundo sustrato para formar un plano uniforme continuo desde una superficie exterior de las capas de sustrato laminadas hasta la almohadilla de contacto.
MX2018005155A 2015-12-04 2016-11-22 Metodo para incorporar un chip invertido de circuito integrado. MX2018005155A (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201562263105P 2015-12-04 2015-12-04
PCT/SG2016/050574 WO2017095329A1 (en) 2015-12-04 2016-11-22 Method for embedding integrated circuit flip chip

Publications (1)

Publication Number Publication Date
MX2018005155A true MX2018005155A (es) 2018-08-15

Family

ID=57530791

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2018005155A MX2018005155A (es) 2015-12-04 2016-11-22 Metodo para incorporar un chip invertido de circuito integrado.

Country Status (19)

Country Link
US (2) US10558906B2 (es)
EP (1) EP3384434B1 (es)
JP (1) JP6544759B2 (es)
KR (1) KR101897944B1 (es)
CN (1) CN108292373B (es)
AU (1) AU2016361882B2 (es)
BR (2) BR112018011000B1 (es)
CA (1) CA3002778C (es)
ES (1) ES2747913T3 (es)
HU (1) HUE045755T2 (es)
MA (1) MA43370B1 (es)
MX (1) MX2018005155A (es)
PH (1) PH12018500683A1 (es)
PL (1) PL3384434T3 (es)
PT (1) PT3384434T (es)
RU (1) RU2667741C1 (es)
UA (1) UA118640C2 (es)
WO (1) WO2017095329A1 (es)
ZA (1) ZA201802189B (es)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3063555B1 (fr) * 2017-03-03 2021-07-09 Linxens Holding Carte a puce et procede de fabrication d’une carte a puce
KR102107795B1 (ko) * 2018-11-22 2020-05-28 주식회사 엔에이블 플렉시블 기판을 이용한 스마트 카드 제조방법
DE102019202715A1 (de) 2019-02-28 2020-09-03 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Folienbasiertes package mit distanzausgleich
DE102019202716B4 (de) * 2019-02-28 2020-12-24 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Flex-folien-package mit coplanarer topologie für hochfrequenzsignale und verfahren zum herstellen eines derartigen flex-folien-packages
DE102019202721B4 (de) 2019-02-28 2021-03-25 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. 3d-flexfolien-package
DE102019202718B4 (de) 2019-02-28 2020-12-24 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Dünnes Dual-Folienpackage und Verfahren zum Herstellen desselben
ES2949221T3 (es) * 2020-08-05 2023-09-26 Smartflex Tech Pte Ltd Tarjetas inteligentes que tienen un LED y métodos para fabricar las mismas
DE102021001579A1 (de) 2021-03-25 2022-09-29 Giesecke+Devrient Mobile Security Gmbh Chipkarte und Verfahren zur Herstellung einer Chipkarte
WO2023284616A1 (en) * 2021-07-16 2023-01-19 Act Identity Technology Limited Chip module and method of forming same
US11960951B1 (en) * 2022-09-23 2024-04-16 Capital One Services, Llc Transaction card with multiple orientations

Family Cites Families (13)

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Publication number Priority date Publication date Assignee Title
US5837153A (en) * 1997-01-15 1998-11-17 Kawan; Joseph C. Method and system for creating and using a logotype contact module with a smart card
US6832730B2 (en) * 2001-07-27 2004-12-21 Storcard, Inc. Smart card with rotating storage
DE10303740B4 (de) * 2003-01-30 2006-09-14 Infineon Technologies Flash Gmbh & Co. Kg Sicherheitsspeicherkarte und Herstellungsverfahren
US9430732B2 (en) * 2014-05-08 2016-08-30 Tego, Inc. Three-dimension RFID tag with opening through structure
US20070290048A1 (en) * 2006-06-20 2007-12-20 Innovatier, Inc. Embedded electronic device and method for manufacturing an embedded electronic device
CN102231193B (zh) * 2011-07-06 2013-05-08 黄艳 一种双界面智能卡
US9390364B2 (en) * 2011-08-08 2016-07-12 Féinics Amatech Teoranta Transponder chip module with coupling frame on a common substrate for secure and non-secure smartcards and tags
JP5482746B2 (ja) * 2011-08-25 2014-05-07 大日本印刷株式会社 カード、カードの製造方法
FR2980015B1 (fr) * 2011-09-08 2013-11-22 Sansystems Dispositif electronique a puce et procede de fabrication par bobines
US20140042230A1 (en) * 2012-08-09 2014-02-13 Infineon Technologies Ag Chip card module with separate antenna and chip card inlay using same
WO2014082401A1 (zh) * 2012-11-30 2014-06-05 Xue Yuan 双界面智能卡及其制造方法
FR2999753B1 (fr) * 2012-12-13 2015-02-13 Oberthur Technologies Procede de fabrication par lamination en continu de cartes a microcircuit du type a contact
EP2784724A3 (en) * 2013-03-27 2015-04-22 Féinics AmaTech Teoranta Selective deposition of magnetic particles, and using magnetic material as a carrier medium to deposit other particles

Also Published As

Publication number Publication date
BR112018011000A2 (pt) 2018-12-04
PH12018500683B1 (en) 2018-10-15
WO2017095329A1 (en) 2017-06-08
UA118640C2 (uk) 2019-02-11
AU2016361882B2 (en) 2018-11-01
JP6544759B2 (ja) 2019-07-17
PT3384434T (pt) 2019-10-28
US10558906B2 (en) 2020-02-11
BR112018011000B1 (pt) 2020-10-20
ZA201802189B (en) 2019-08-28
EP3384434A1 (en) 2018-10-10
CA3002778C (en) 2018-09-18
PL3384434T3 (pl) 2020-01-31
EP3384434B1 (en) 2019-08-21
HUE045755T2 (hu) 2020-01-28
BR122019027776B1 (pt) 2020-10-20
KR20180069000A (ko) 2018-06-22
CN108292373B (zh) 2019-07-23
MA43370B1 (fr) 2019-10-31
CA3002778A1 (en) 2017-06-08
ES2747913T3 (es) 2020-03-12
KR101897944B1 (ko) 2018-09-12
US20180300597A1 (en) 2018-10-18
CN108292373A (zh) 2018-07-17
RU2667741C1 (ru) 2018-09-24
US10685275B2 (en) 2020-06-16
AU2016361882A1 (en) 2018-04-19
US20200134413A1 (en) 2020-04-30
JP2019500749A (ja) 2019-01-10
PH12018500683A1 (en) 2018-10-15

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