MX2014012117A - Low density parity check encoder having length of 64800 and code rate of 3/15, and low density parity check encoding method using the same. - Google Patents

Low density parity check encoder having length of 64800 and code rate of 3/15, and low density parity check encoding method using the same.

Info

Publication number
MX2014012117A
MX2014012117A MX2014012117A MX2014012117A MX2014012117A MX 2014012117 A MX2014012117 A MX 2014012117A MX 2014012117 A MX2014012117 A MX 2014012117A MX 2014012117 A MX2014012117 A MX 2014012117A MX 2014012117 A MX2014012117 A MX 2014012117A
Authority
MX
Mexico
Prior art keywords
parity check
low density
density parity
ldpc
length
Prior art date
Application number
MX2014012117A
Other languages
Spanish (es)
Other versions
MX350609B (en
Inventor
Sung-Ik Park
Heung-Mook Kim
Sun-Hyoung Kwon
Nam-Ho Hur
Original Assignee
Korea Electronics Telecomm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Korea Electronics Telecomm filed Critical Korea Electronics Telecomm
Publication of MX2014012117A publication Critical patent/MX2014012117A/en
Publication of MX350609B publication Critical patent/MX350609B/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148Structural properties of the code parity-check or generator matrix
    • H03M13/116Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1165QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148Structural properties of the code parity-check or generator matrix
    • H03M13/118Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H03M13/1185Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041Arrangements at the transmitter end
    • H04L1/0043Realisations of complexity reduction techniques, e.g. use of look-up tables

Abstract

A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 3/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
MX2014012117A 2014-08-14 2014-10-07 Low density parity check encoder having length of 64800 and code rate of 3/15, and low density parity check encoding method using the same. MX350609B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR20140106179 2014-08-14
KR1020140120013A KR102184831B1 (en) 2014-08-14 2014-09-11 Low density parity check encoder with 64800 length and 3/15 rate, and method using the same

Publications (2)

Publication Number Publication Date
MX2014012117A true MX2014012117A (en) 2016-02-15
MX350609B MX350609B (en) 2017-09-11

Family

ID=55449744

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2014012117A MX350609B (en) 2014-08-14 2014-10-07 Low density parity check encoder having length of 64800 and code rate of 3/15, and low density parity check encoding method using the same.

Country Status (2)

Country Link
KR (3) KR102184831B1 (en)
MX (1) MX350609B (en)

Also Published As

Publication number Publication date
KR102184831B1 (en) 2020-12-01
KR20160020995A (en) 2016-02-24
KR102312428B1 (en) 2021-10-15
KR20200136344A (en) 2020-12-07
KR20210124158A (en) 2021-10-14
KR102506683B1 (en) 2023-03-07
MX350609B (en) 2017-09-11

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