MX2020003765A - Low density parity check encoder, and low density parity check encoding method using the same. - Google Patents
Low density parity check encoder, and low density parity check encoding method using the same.Info
- Publication number
- MX2020003765A MX2020003765A MX2020003765A MX2020003765A MX2020003765A MX 2020003765 A MX2020003765 A MX 2020003765A MX 2020003765 A MX2020003765 A MX 2020003765A MX 2020003765 A MX2020003765 A MX 2020003765A MX 2020003765 A MX2020003765 A MX 2020003765A
- Authority
- MX
- Mexico
- Prior art keywords
- parity check
- low density
- density parity
- ldpc
- memory
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
- H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6522—Intended application, e.g. transmission or communication standard
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Multimedia (AREA)
- Error Detection And Correction (AREA)
Abstract
A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword. The second memory is initialized to 0. The processor generates the LDPC codeword by performing accumulation with respect to the second memory using information bits. The accumulation is performed at parity bit addresses that are updated using a sequence corresponding to a parity check matrix (PCM).
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR20140111764 | 2014-08-26 | ||
KR1020140116872A KR102270310B1 (en) | 2014-08-26 | 2014-09-03 | Low density parity check encoder and method using the same |
Publications (1)
Publication Number | Publication Date |
---|---|
MX2020003765A true MX2020003765A (en) | 2020-07-29 |
Family
ID=55540172
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2020003765A MX2020003765A (en) | 2014-08-26 | 2014-10-07 | Low density parity check encoder, and low density parity check encoding method using the same. |
MX2014012120A MX350599B (en) | 2014-08-26 | 2014-10-07 | Low density parity check encoder, and low density parity check encoding method using the same. |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2014012120A MX350599B (en) | 2014-08-26 | 2014-10-07 | Low density parity check encoder, and low density parity check encoding method using the same. |
Country Status (2)
Country | Link |
---|---|
KR (3) | KR102270310B1 (en) |
MX (2) | MX2020003765A (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110677157B (en) * | 2017-06-27 | 2023-02-07 | 华为技术有限公司 | Information processing method and device and communication equipment |
KR20230159005A (en) | 2022-05-13 | 2023-11-21 | 전남대학교산학협력단 | A Method and Apparatus for Construction and Encoding of Low Density Parity Check Code |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA2674719A1 (en) * | 2007-01-24 | 2008-07-31 | Qualcomm Incorporated | Ldpc encoding and decoding of packets of variable sizes |
-
2014
- 2014-09-03 KR KR1020140116872A patent/KR102270310B1/en active IP Right Grant
- 2014-10-07 MX MX2020003765A patent/MX2020003765A/en unknown
- 2014-10-07 MX MX2014012120A patent/MX350599B/en active IP Right Grant
-
2021
- 2021-06-22 KR KR1020210081171A patent/KR102395237B1/en active IP Right Grant
-
2022
- 2022-04-29 KR KR1020220053730A patent/KR102540338B1/en active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
KR102270310B1 (en) | 2021-06-30 |
KR20220063131A (en) | 2022-05-17 |
MX350599B (en) | 2017-09-11 |
MX2014012120A (en) | 2016-02-25 |
KR20210084371A (en) | 2021-07-07 |
KR102395237B1 (en) | 2022-05-10 |
KR20160024711A (en) | 2016-03-07 |
KR102540338B1 (en) | 2023-06-05 |
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